2 * Copyright © 2012 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Ben Widawsky <ben@bwidawsk.net>
28 #include <linux/device.h>
29 #include <linux/module.h>
30 #include <linux/stat.h>
31 #include <linux/sysfs.h>
32 #include "intel_drv.h"
35 #define dev_to_drm_minor(d) dev_get_drvdata((d))
38 static u32 calc_residency(struct drm_device *dev, const u32 reg)
40 struct drm_i915_private *dev_priv = dev->dev_private;
41 u64 raw_time; /* 32b value may overflow during fixed point math */
42 u64 units = 128ULL, div = 100000ULL, bias = 100ULL;
45 if (!intel_enable_rc6(dev))
48 intel_runtime_pm_get(dev_priv);
50 /* On VLV, residency time is in CZ units rather than 1.28us */
51 if (IS_VALLEYVIEW(dev)) {
54 clkctl2 = I915_READ(VLV_CLK_CTL2) >>
55 CLK_CTL2_CZCOUNT_30NS_SHIFT;
57 WARN(!clkctl2, "bogus CZ count value");
61 units = DIV_ROUND_UP_ULL(30ULL * bias, (u64)clkctl2);
62 if (I915_READ(VLV_COUNTER_CONTROL) & VLV_COUNT_RANGE_HIGH)
65 div = 1000000ULL * bias;
68 raw_time = I915_READ(reg) * units;
69 ret = DIV_ROUND_UP_ULL(raw_time, div);
72 intel_runtime_pm_put(dev_priv);
77 show_rc6_mask(struct device *kdev, struct device_attribute *attr, char *buf)
79 struct drm_minor *dminor = dev_to_drm_minor(kdev);
80 return snprintf(buf, PAGE_SIZE, "%x\n", intel_enable_rc6(dminor->dev));
84 show_rc6_ms(struct device *kdev, struct device_attribute *attr, char *buf)
86 struct drm_minor *dminor = dev_get_drvdata(kdev);
87 u32 rc6_residency = calc_residency(dminor->dev, GEN6_GT_GFX_RC6);
88 return snprintf(buf, PAGE_SIZE, "%u\n", rc6_residency);
92 show_rc6p_ms(struct device *kdev, struct device_attribute *attr, char *buf)
94 struct drm_minor *dminor = dev_to_drm_minor(kdev);
95 u32 rc6p_residency = calc_residency(dminor->dev, GEN6_GT_GFX_RC6p);
96 if (IS_VALLEYVIEW(dminor->dev))
98 return snprintf(buf, PAGE_SIZE, "%u\n", rc6p_residency);
102 show_rc6pp_ms(struct device *kdev, struct device_attribute *attr, char *buf)
104 struct drm_minor *dminor = dev_to_drm_minor(kdev);
105 u32 rc6pp_residency = calc_residency(dminor->dev, GEN6_GT_GFX_RC6pp);
106 if (IS_VALLEYVIEW(dminor->dev))
108 return snprintf(buf, PAGE_SIZE, "%u\n", rc6pp_residency);
111 static DEVICE_ATTR(rc6_enable, S_IRUGO, show_rc6_mask, NULL);
112 static DEVICE_ATTR(rc6_residency_ms, S_IRUGO, show_rc6_ms, NULL);
113 static DEVICE_ATTR(rc6p_residency_ms, S_IRUGO, show_rc6p_ms, NULL);
114 static DEVICE_ATTR(rc6pp_residency_ms, S_IRUGO, show_rc6pp_ms, NULL);
116 static struct attribute *rc6_attrs[] = {
117 &dev_attr_rc6_enable.attr,
118 &dev_attr_rc6_residency_ms.attr,
119 &dev_attr_rc6p_residency_ms.attr,
120 &dev_attr_rc6pp_residency_ms.attr,
124 static struct attribute_group rc6_attr_group = {
125 .name = power_group_name,
130 static int l3_access_valid(struct drm_device *dev, loff_t offset)
132 if (!HAS_L3_DPF(dev))
138 if (offset >= GEN7_L3LOG_SIZE)
145 i915_l3_read(struct file *filp, struct kobject *kobj,
146 struct bin_attribute *attr, char *buf,
147 loff_t offset, size_t count)
149 struct device *dev = container_of(kobj, struct device, kobj);
150 struct drm_minor *dminor = dev_to_drm_minor(dev);
151 struct drm_device *drm_dev = dminor->dev;
152 struct drm_i915_private *dev_priv = drm_dev->dev_private;
153 int slice = (int)(uintptr_t)attr->private;
156 count = round_down(count, 4);
158 ret = l3_access_valid(drm_dev, offset);
162 count = min_t(size_t, GEN7_L3LOG_SIZE - offset, count);
164 ret = i915_mutex_lock_interruptible(drm_dev);
168 if (dev_priv->l3_parity.remap_info[slice])
170 dev_priv->l3_parity.remap_info[slice] + (offset/4),
173 memset(buf, 0, count);
175 mutex_unlock(&drm_dev->struct_mutex);
181 i915_l3_write(struct file *filp, struct kobject *kobj,
182 struct bin_attribute *attr, char *buf,
183 loff_t offset, size_t count)
185 struct device *dev = container_of(kobj, struct device, kobj);
186 struct drm_minor *dminor = dev_to_drm_minor(dev);
187 struct drm_device *drm_dev = dminor->dev;
188 struct drm_i915_private *dev_priv = drm_dev->dev_private;
189 struct i915_hw_context *ctx;
190 u32 *temp = NULL; /* Just here to make handling failures easy */
191 int slice = (int)(uintptr_t)attr->private;
194 if (!HAS_HW_CONTEXTS(drm_dev))
197 ret = l3_access_valid(drm_dev, offset);
201 ret = i915_mutex_lock_interruptible(drm_dev);
205 if (!dev_priv->l3_parity.remap_info[slice]) {
206 temp = kzalloc(GEN7_L3LOG_SIZE, GFP_KERNEL);
208 mutex_unlock(&drm_dev->struct_mutex);
213 ret = i915_gpu_idle(drm_dev);
216 mutex_unlock(&drm_dev->struct_mutex);
220 /* TODO: Ideally we really want a GPU reset here to make sure errors
221 * aren't propagated. Since I cannot find a stable way to reset the GPU
222 * at this point it is left as a TODO.
225 dev_priv->l3_parity.remap_info[slice] = temp;
227 memcpy(dev_priv->l3_parity.remap_info[slice] + (offset/4), buf, count);
229 /* NB: We defer the remapping until we switch to the context */
230 list_for_each_entry(ctx, &dev_priv->context_list, link)
231 ctx->remap_slice |= (1<<slice);
233 mutex_unlock(&drm_dev->struct_mutex);
238 static struct bin_attribute dpf_attrs = {
239 .attr = {.name = "l3_parity", .mode = (S_IRUSR | S_IWUSR)},
240 .size = GEN7_L3LOG_SIZE,
241 .read = i915_l3_read,
242 .write = i915_l3_write,
247 static struct bin_attribute dpf_attrs_1 = {
248 .attr = {.name = "l3_parity_slice_1", .mode = (S_IRUSR | S_IWUSR)},
249 .size = GEN7_L3LOG_SIZE,
250 .read = i915_l3_read,
251 .write = i915_l3_write,
256 static ssize_t gt_cur_freq_mhz_show(struct device *kdev,
257 struct device_attribute *attr, char *buf)
259 struct drm_minor *minor = dev_to_drm_minor(kdev);
260 struct drm_device *dev = minor->dev;
261 struct drm_i915_private *dev_priv = dev->dev_private;
264 flush_delayed_work(&dev_priv->rps.delayed_resume_work);
266 mutex_lock(&dev_priv->rps.hw_lock);
267 if (IS_VALLEYVIEW(dev_priv->dev)) {
269 freq = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);
270 ret = vlv_gpu_freq(dev_priv, (freq >> 8) & 0xff);
272 ret = dev_priv->rps.cur_delay * GT_FREQUENCY_MULTIPLIER;
274 mutex_unlock(&dev_priv->rps.hw_lock);
276 return snprintf(buf, PAGE_SIZE, "%d\n", ret);
279 static ssize_t vlv_rpe_freq_mhz_show(struct device *kdev,
280 struct device_attribute *attr, char *buf)
282 struct drm_minor *minor = dev_to_drm_minor(kdev);
283 struct drm_device *dev = minor->dev;
284 struct drm_i915_private *dev_priv = dev->dev_private;
286 return snprintf(buf, PAGE_SIZE, "%d\n",
287 vlv_gpu_freq(dev_priv, dev_priv->rps.rpe_delay));
290 static ssize_t gt_max_freq_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf)
292 struct drm_minor *minor = dev_to_drm_minor(kdev);
293 struct drm_device *dev = minor->dev;
294 struct drm_i915_private *dev_priv = dev->dev_private;
297 flush_delayed_work(&dev_priv->rps.delayed_resume_work);
299 mutex_lock(&dev_priv->rps.hw_lock);
300 if (IS_VALLEYVIEW(dev_priv->dev))
301 ret = vlv_gpu_freq(dev_priv, dev_priv->rps.max_delay);
303 ret = dev_priv->rps.max_delay * GT_FREQUENCY_MULTIPLIER;
304 mutex_unlock(&dev_priv->rps.hw_lock);
306 return snprintf(buf, PAGE_SIZE, "%d\n", ret);
309 static ssize_t gt_max_freq_mhz_store(struct device *kdev,
310 struct device_attribute *attr,
311 const char *buf, size_t count)
313 struct drm_minor *minor = dev_to_drm_minor(kdev);
314 struct drm_device *dev = minor->dev;
315 struct drm_i915_private *dev_priv = dev->dev_private;
316 u32 val, rp_state_cap, hw_max, hw_min, non_oc_max;
319 ret = kstrtou32(buf, 0, &val);
323 flush_delayed_work(&dev_priv->rps.delayed_resume_work);
325 mutex_lock(&dev_priv->rps.hw_lock);
327 if (IS_VALLEYVIEW(dev_priv->dev)) {
328 val = vlv_freq_opcode(dev_priv, val);
330 hw_max = valleyview_rps_max_freq(dev_priv);
331 hw_min = valleyview_rps_min_freq(dev_priv);
334 val /= GT_FREQUENCY_MULTIPLIER;
336 rp_state_cap = I915_READ(GEN6_RP_STATE_CAP);
337 hw_max = dev_priv->rps.hw_max;
338 non_oc_max = (rp_state_cap & 0xff);
339 hw_min = ((rp_state_cap & 0xff0000) >> 16);
342 if (val < hw_min || val > hw_max ||
343 val < dev_priv->rps.min_delay) {
344 mutex_unlock(&dev_priv->rps.hw_lock);
348 if (val > non_oc_max)
349 DRM_DEBUG("User requested overclocking to %d\n",
350 val * GT_FREQUENCY_MULTIPLIER);
352 dev_priv->rps.max_delay = val;
354 if (dev_priv->rps.cur_delay > val) {
355 if (IS_VALLEYVIEW(dev))
356 valleyview_set_rps(dev, val);
358 gen6_set_rps(dev, val);
359 } else if (!IS_VALLEYVIEW(dev)) {
360 /* We still need gen6_set_rps to process the new max_delay and
361 * update the interrupt limits even though frequency request is
363 gen6_set_rps(dev, dev_priv->rps.cur_delay);
366 mutex_unlock(&dev_priv->rps.hw_lock);
371 static ssize_t gt_min_freq_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf)
373 struct drm_minor *minor = dev_to_drm_minor(kdev);
374 struct drm_device *dev = minor->dev;
375 struct drm_i915_private *dev_priv = dev->dev_private;
378 flush_delayed_work(&dev_priv->rps.delayed_resume_work);
380 mutex_lock(&dev_priv->rps.hw_lock);
381 if (IS_VALLEYVIEW(dev_priv->dev))
382 ret = vlv_gpu_freq(dev_priv, dev_priv->rps.min_delay);
384 ret = dev_priv->rps.min_delay * GT_FREQUENCY_MULTIPLIER;
385 mutex_unlock(&dev_priv->rps.hw_lock);
387 return snprintf(buf, PAGE_SIZE, "%d\n", ret);
390 static ssize_t gt_min_freq_mhz_store(struct device *kdev,
391 struct device_attribute *attr,
392 const char *buf, size_t count)
394 struct drm_minor *minor = dev_to_drm_minor(kdev);
395 struct drm_device *dev = minor->dev;
396 struct drm_i915_private *dev_priv = dev->dev_private;
397 u32 val, rp_state_cap, hw_max, hw_min;
400 ret = kstrtou32(buf, 0, &val);
404 flush_delayed_work(&dev_priv->rps.delayed_resume_work);
406 mutex_lock(&dev_priv->rps.hw_lock);
408 if (IS_VALLEYVIEW(dev)) {
409 val = vlv_freq_opcode(dev_priv, val);
411 hw_max = valleyview_rps_max_freq(dev_priv);
412 hw_min = valleyview_rps_min_freq(dev_priv);
414 val /= GT_FREQUENCY_MULTIPLIER;
416 rp_state_cap = I915_READ(GEN6_RP_STATE_CAP);
417 hw_max = dev_priv->rps.hw_max;
418 hw_min = ((rp_state_cap & 0xff0000) >> 16);
421 if (val < hw_min || val > hw_max || val > dev_priv->rps.max_delay) {
422 mutex_unlock(&dev_priv->rps.hw_lock);
426 dev_priv->rps.min_delay = val;
428 if (dev_priv->rps.cur_delay < val) {
429 if (IS_VALLEYVIEW(dev))
430 valleyview_set_rps(dev, val);
432 gen6_set_rps(dev, val);
433 } else if (!IS_VALLEYVIEW(dev)) {
434 /* We still need gen6_set_rps to process the new min_delay and
435 * update the interrupt limits even though frequency request is
437 gen6_set_rps(dev, dev_priv->rps.cur_delay);
440 mutex_unlock(&dev_priv->rps.hw_lock);
446 static DEVICE_ATTR(gt_cur_freq_mhz, S_IRUGO, gt_cur_freq_mhz_show, NULL);
447 static DEVICE_ATTR(gt_max_freq_mhz, S_IRUGO | S_IWUSR, gt_max_freq_mhz_show, gt_max_freq_mhz_store);
448 static DEVICE_ATTR(gt_min_freq_mhz, S_IRUGO | S_IWUSR, gt_min_freq_mhz_show, gt_min_freq_mhz_store);
450 static DEVICE_ATTR(vlv_rpe_freq_mhz, S_IRUGO, vlv_rpe_freq_mhz_show, NULL);
452 static ssize_t gt_rp_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf);
453 static DEVICE_ATTR(gt_RP0_freq_mhz, S_IRUGO, gt_rp_mhz_show, NULL);
454 static DEVICE_ATTR(gt_RP1_freq_mhz, S_IRUGO, gt_rp_mhz_show, NULL);
455 static DEVICE_ATTR(gt_RPn_freq_mhz, S_IRUGO, gt_rp_mhz_show, NULL);
457 /* For now we have a static number of RP states */
458 static ssize_t gt_rp_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf)
460 struct drm_minor *minor = dev_to_drm_minor(kdev);
461 struct drm_device *dev = minor->dev;
462 struct drm_i915_private *dev_priv = dev->dev_private;
463 u32 val, rp_state_cap;
466 ret = mutex_lock_interruptible(&dev->struct_mutex);
469 intel_runtime_pm_get(dev_priv);
470 rp_state_cap = I915_READ(GEN6_RP_STATE_CAP);
471 intel_runtime_pm_put(dev_priv);
472 mutex_unlock(&dev->struct_mutex);
474 if (attr == &dev_attr_gt_RP0_freq_mhz) {
475 val = ((rp_state_cap & 0x0000ff) >> 0) * GT_FREQUENCY_MULTIPLIER;
476 } else if (attr == &dev_attr_gt_RP1_freq_mhz) {
477 val = ((rp_state_cap & 0x00ff00) >> 8) * GT_FREQUENCY_MULTIPLIER;
478 } else if (attr == &dev_attr_gt_RPn_freq_mhz) {
479 val = ((rp_state_cap & 0xff0000) >> 16) * GT_FREQUENCY_MULTIPLIER;
483 return snprintf(buf, PAGE_SIZE, "%d\n", val);
486 static const struct attribute *gen6_attrs[] = {
487 &dev_attr_gt_cur_freq_mhz.attr,
488 &dev_attr_gt_max_freq_mhz.attr,
489 &dev_attr_gt_min_freq_mhz.attr,
490 &dev_attr_gt_RP0_freq_mhz.attr,
491 &dev_attr_gt_RP1_freq_mhz.attr,
492 &dev_attr_gt_RPn_freq_mhz.attr,
496 static const struct attribute *vlv_attrs[] = {
497 &dev_attr_gt_cur_freq_mhz.attr,
498 &dev_attr_gt_max_freq_mhz.attr,
499 &dev_attr_gt_min_freq_mhz.attr,
500 &dev_attr_vlv_rpe_freq_mhz.attr,
504 static ssize_t error_state_read(struct file *filp, struct kobject *kobj,
505 struct bin_attribute *attr, char *buf,
506 loff_t off, size_t count)
509 struct device *kdev = container_of(kobj, struct device, kobj);
510 struct drm_minor *minor = dev_to_drm_minor(kdev);
511 struct drm_device *dev = minor->dev;
512 struct i915_error_state_file_priv error_priv;
513 struct drm_i915_error_state_buf error_str;
514 ssize_t ret_count = 0;
517 memset(&error_priv, 0, sizeof(error_priv));
519 ret = i915_error_state_buf_init(&error_str, count, off);
523 error_priv.dev = dev;
524 i915_error_state_get(dev, &error_priv);
526 ret = i915_error_state_to_str(&error_str, &error_priv);
530 ret_count = count < error_str.bytes ? count : error_str.bytes;
532 memcpy(buf, error_str.buf, ret_count);
534 i915_error_state_put(&error_priv);
535 i915_error_state_buf_release(&error_str);
537 return ret ?: ret_count;
540 static ssize_t error_state_write(struct file *file, struct kobject *kobj,
541 struct bin_attribute *attr, char *buf,
542 loff_t off, size_t count)
544 struct device *kdev = container_of(kobj, struct device, kobj);
545 struct drm_minor *minor = dev_to_drm_minor(kdev);
546 struct drm_device *dev = minor->dev;
549 DRM_DEBUG_DRIVER("Resetting error state\n");
551 ret = mutex_lock_interruptible(&dev->struct_mutex);
555 i915_destroy_error_state(dev);
556 mutex_unlock(&dev->struct_mutex);
561 static struct bin_attribute error_state_attr = {
562 .attr.name = "error",
563 .attr.mode = S_IRUSR | S_IWUSR,
565 .read = error_state_read,
566 .write = error_state_write,
569 void i915_setup_sysfs(struct drm_device *dev)
574 if (INTEL_INFO(dev)->gen >= 6) {
575 ret = sysfs_merge_group(&dev->primary->kdev->kobj,
578 DRM_ERROR("RC6 residency sysfs setup failed\n");
581 if (HAS_L3_DPF(dev)) {
582 ret = device_create_bin_file(dev->primary->kdev, &dpf_attrs);
584 DRM_ERROR("l3 parity sysfs setup failed\n");
586 if (NUM_L3_SLICES(dev) > 1) {
587 ret = device_create_bin_file(dev->primary->kdev,
590 DRM_ERROR("l3 parity slice 1 setup failed\n");
595 if (IS_VALLEYVIEW(dev))
596 ret = sysfs_create_files(&dev->primary->kdev->kobj, vlv_attrs);
597 else if (INTEL_INFO(dev)->gen >= 6)
598 ret = sysfs_create_files(&dev->primary->kdev->kobj, gen6_attrs);
600 DRM_ERROR("RPS sysfs setup failed\n");
602 ret = sysfs_create_bin_file(&dev->primary->kdev->kobj,
605 DRM_ERROR("error_state sysfs setup failed\n");
608 void i915_teardown_sysfs(struct drm_device *dev)
610 sysfs_remove_bin_file(&dev->primary->kdev->kobj, &error_state_attr);
611 if (IS_VALLEYVIEW(dev))
612 sysfs_remove_files(&dev->primary->kdev->kobj, vlv_attrs);
614 sysfs_remove_files(&dev->primary->kdev->kobj, gen6_attrs);
615 device_remove_bin_file(dev->primary->kdev, &dpf_attrs_1);
616 device_remove_bin_file(dev->primary->kdev, &dpf_attrs);
618 sysfs_unmerge_group(&dev->primary->kdev->kobj, &rc6_attr_group);