drivers/gpu/drm/i915/intel_crt.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Eric Anholt <eric@anholt.net>
  25  */
  26
  27 #include <linux/dmi.h>
  28 #include <linux/i2c.h>
  29 #include <linux/slab.h>
  30 #include <drm/drmP.h>
  31 #include <drm/drm_crtc.h>
  32 #include <drm/drm_crtc_helper.h>
  33 #include <drm/drm_edid.h>
  34 #include "intel_drv.h"
  35 #include <drm/i915_drm.h>
  36 #include "i915_drv.h"
  37
  38 /* Here's the desired hotplug mode */
  39 #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 |                \
  40                            ADPA_CRT_HOTPLUG_WARMUP_10MS |               \
  41                            ADPA_CRT_HOTPLUG_SAMPLE_4S |                 \
  42                            ADPA_CRT_HOTPLUG_VOLTAGE_50 |                \
  43                            ADPA_CRT_HOTPLUG_VOLREF_325MV |              \
  44                            ADPA_CRT_HOTPLUG_ENABLE)
  45
  46 struct intel_crt {
  47         struct intel_encoder base;
  48         /* DPMS state is stored in the connector, which we need in the
  49          * encoder's enable/disable callbacks */
  50         struct intel_connector *connector;
  51         bool force_hotplug_required;
  52         u32 adpa_reg;
  53 };
  54
  55 static struct intel_crt *intel_encoder_to_crt(struct intel_encoder *encoder)
  56 {
  57         return container_of(encoder, struct intel_crt, base);
  58 }
  59
  60 static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
  61 {
  62         return intel_encoder_to_crt(intel_attached_encoder(connector));
  63 }
  64
  65 static bool intel_crt_get_hw_state(struct intel_encoder *encoder,
  66                                    enum pipe *pipe)
  67 {
  68         struct drm_device *dev = encoder->base.dev;
  69         struct drm_i915_private *dev_priv = dev->dev_private;
  70         struct intel_crt *crt = intel_encoder_to_crt(encoder);
  71         u32 tmp;
  72
  73         tmp = I915_READ(crt->adpa_reg);
  74
  75         if (!(tmp & ADPA_DAC_ENABLE))
  76                 return false;
  77
  78         if (HAS_PCH_CPT(dev))
  79                 *pipe = PORT_TO_PIPE_CPT(tmp);
  80         else
  81                 *pipe = PORT_TO_PIPE(tmp);
  82
  83         return true;
  84 }
  85
  86 static void intel_crt_get_config(struct intel_encoder *encoder,
  87                                  struct intel_crtc_config *pipe_config)
  88 {
  89         struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
  90         struct intel_crt *crt = intel_encoder_to_crt(encoder);
  91         u32 tmp, flags = 0;
  92         int dotclock;
  93
  94         tmp = I915_READ(crt->adpa_reg);
  95
  96         if (tmp & ADPA_HSYNC_ACTIVE_HIGH)
  97                 flags |= DRM_MODE_FLAG_PHSYNC;
  98         else
  99                 flags |= DRM_MODE_FLAG_NHSYNC;
 100
 101         if (tmp & ADPA_VSYNC_ACTIVE_HIGH)
 102                 flags |= DRM_MODE_FLAG_PVSYNC;
 103         else
 104                 flags |= DRM_MODE_FLAG_NVSYNC;
 105
 106         pipe_config->adjusted_mode.flags |= flags;
 107
 108         dotclock = pipe_config->port_clock;
 109
 110         if (HAS_PCH_SPLIT(dev_priv->dev))
 111                 ironlake_check_encoder_dotclock(pipe_config, dotclock);
 112
 113         pipe_config->adjusted_mode.clock = dotclock;
 114 }
 115
 116 /* Note: The caller is required to filter out dpms modes not supported by the
 117  * platform. */
 118 static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode)
 119 {
 120         struct drm_device *dev = encoder->base.dev;
 121         struct drm_i915_private *dev_priv = dev->dev_private;
 122         struct intel_crt *crt = intel_encoder_to_crt(encoder);
 123         u32 temp;
 124
 125         temp = I915_READ(crt->adpa_reg);
 126         temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
 127         temp &= ~ADPA_DAC_ENABLE;
 128
 129         switch (mode) {
 130         case DRM_MODE_DPMS_ON:
 131                 temp |= ADPA_DAC_ENABLE;
 132                 break;
 133         case DRM_MODE_DPMS_STANDBY:
 134                 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
 135                 break;
 136         case DRM_MODE_DPMS_SUSPEND:
 137                 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
 138                 break;
 139         case DRM_MODE_DPMS_OFF:
 140                 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
 141                 break;
 142         }
 143
 144         I915_WRITE(crt->adpa_reg, temp);
 145 }
 146
 147 static void intel_disable_crt(struct intel_encoder *encoder)
 148 {
 149         intel_crt_set_dpms(encoder, DRM_MODE_DPMS_OFF);
 150 }
 151
 152 static void intel_enable_crt(struct intel_encoder *encoder)
 153 {
 154         struct intel_crt *crt = intel_encoder_to_crt(encoder);
 155
 156         intel_crt_set_dpms(encoder, crt->connector->base.dpms);
 157 }
 158
 159 /* Special dpms function to support cloning between dvo/sdvo/crt. */
 160 static void intel_crt_dpms(struct drm_connector *connector, int mode)
 161 {
 162         struct drm_device *dev = connector->dev;
 163         struct intel_encoder *encoder = intel_attached_encoder(connector);
 164         struct drm_crtc *crtc;
 165         int old_dpms;
 166
 167         /* PCH platforms and VLV only support on/off. */
 168         if (INTEL_INFO(dev)->gen >= 5 && mode != DRM_MODE_DPMS_ON)
 169                 mode = DRM_MODE_DPMS_OFF;
 170
 171         if (mode == connector->dpms)
 172                 return;
 173
 174         old_dpms = connector->dpms;
 175         connector->dpms = mode;
 176
 177         /* Only need to change hw state when actually enabled */
 178         crtc = encoder->base.crtc;
 179         if (!crtc) {
 180                 encoder->connectors_active = false;
 181                 return;
 182         }
 183
 184         /* We need the pipe to run for anything but OFF. */
 185         if (mode == DRM_MODE_DPMS_OFF)
 186                 encoder->connectors_active = false;
 187         else
 188                 encoder->connectors_active = true;
 189
 190         /* We call connector dpms manually below in case pipe dpms doesn't
 191          * change due to cloning. */
 192         if (mode < old_dpms) {
 193                 /* From off to on, enable the pipe first. */
 194                 intel_crtc_update_dpms(crtc);
 195
 196                 intel_crt_set_dpms(encoder, mode);
 197         } else {
 198                 intel_crt_set_dpms(encoder, mode);
 199
 200                 intel_crtc_update_dpms(crtc);
 201         }
 202
 203         intel_modeset_check_state(connector->dev);
 204 }
 205
 206 static int intel_crt_mode_valid(struct drm_connector *connector,
 207                                 struct drm_display_mode *mode)
 208 {
 209         struct drm_device *dev = connector->dev;
 210
 211         int max_clock = 0;
 212         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
 213                 return MODE_NO_DBLESCAN;
 214
 215         if (mode->clock < 25000)
 216                 return MODE_CLOCK_LOW;
 217
 218         if (IS_GEN2(dev))
 219                 max_clock = 350000;
 220         else
 221                 max_clock = 400000;
 222         if (mode->clock > max_clock)
 223                 return MODE_CLOCK_HIGH;
 224
 225         /* The FDI receiver on LPT only supports 8bpc and only has 2 lanes. */
 226         if (HAS_PCH_LPT(dev) &&
 227             (ironlake_get_lanes_required(mode->clock, 270000, 24) > 2))
 228                 return MODE_CLOCK_HIGH;
 229
 230         return MODE_OK;
 231 }
 232
 233 static bool intel_crt_compute_config(struct intel_encoder *encoder,
 234                                      struct intel_crtc_config *pipe_config)
 235 {
 236         struct drm_device *dev = encoder->base.dev;
 237
 238         if (HAS_PCH_SPLIT(dev))
 239                 pipe_config->has_pch_encoder = true;
 240
 241         /* LPT FDI RX only supports 8bpc. */
 242         if (HAS_PCH_LPT(dev))
 243                 pipe_config->pipe_bpp = 24;
 244
 245         return true;
 246 }
 247
 248 static void intel_crt_mode_set(struct intel_encoder *encoder)
 249 {
 250
 251         struct drm_device *dev = encoder->base.dev;
 252         struct intel_crt *crt = intel_encoder_to_crt(encoder);
 253         struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
 254         struct drm_i915_private *dev_priv = dev->dev_private;
 255         struct drm_display_mode *adjusted_mode = &crtc->config.adjusted_mode;
 256         u32 adpa;
 257
 258         if (HAS_PCH_SPLIT(dev))
 259                 adpa = ADPA_HOTPLUG_BITS;
 260         else
 261                 adpa = 0;
 262
 263         if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
 264                 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
 265         if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
 266                 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
 267
 268         /* For CPT allow 3 pipe config, for others just use A or B */
 269         if (HAS_PCH_LPT(dev))
 270                 ; /* Those bits don't exist here */
 271         else if (HAS_PCH_CPT(dev))
 272                 adpa |= PORT_TRANS_SEL_CPT(crtc->pipe);
 273         else if (crtc->pipe == 0)
 274                 adpa |= ADPA_PIPE_A_SELECT;
 275         else
 276                 adpa |= ADPA_PIPE_B_SELECT;
 277
 278         if (!HAS_PCH_SPLIT(dev))
 279                 I915_WRITE(BCLRPAT(crtc->pipe), 0);
 280
 281         I915_WRITE(crt->adpa_reg, adpa);
 282 }
 283
 284 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
 285 {
 286         struct drm_device *dev = connector->dev;
 287         struct intel_crt *crt = intel_attached_crt(connector);
 288         struct drm_i915_private *dev_priv = dev->dev_private;
 289         u32 adpa;
 290         bool ret;
 291
 292         /* The first time through, trigger an explicit detection cycle */
 293         if (crt->force_hotplug_required) {
 294                 bool turn_off_dac = HAS_PCH_SPLIT(dev);
 295                 u32 save_adpa;
 296
 297                 crt->force_hotplug_required = 0;
 298
 299                 save_adpa = adpa = I915_READ(crt->adpa_reg);
 300                 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
 301
 302                 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
 303                 if (turn_off_dac)
 304                         adpa &= ~ADPA_DAC_ENABLE;
 305
 306                 I915_WRITE(crt->adpa_reg, adpa);
 307
 308                 if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
 309                              1000))
 310                         DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
 311
 312                 if (turn_off_dac) {
 313                         I915_WRITE(crt->adpa_reg, save_adpa);
 314                         POSTING_READ(crt->adpa_reg);
 315                 }
 316         }
 317
 318         /* Check the status to see if both blue and green are on now */
 319         adpa = I915_READ(crt->adpa_reg);
 320         if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
 321                 ret = true;
 322         else
 323                 ret = false;
 324         DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
 325
 326         return ret;
 327 }
 328
 329 static bool valleyview_crt_detect_hotplug(struct drm_connector *connector)
 330 {
 331         struct drm_device *dev = connector->dev;
 332         struct intel_crt *crt = intel_attached_crt(connector);
 333         struct drm_i915_private *dev_priv = dev->dev_private;
 334         u32 adpa;
 335         bool ret;
 336         u32 save_adpa;
 337
 338         save_adpa = adpa = I915_READ(crt->adpa_reg);
 339         DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
 340
 341         adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
 342
 343         I915_WRITE(crt->adpa_reg, adpa);
 344
 345         if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
 346                      1000)) {
 347                 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
 348                 I915_WRITE(crt->adpa_reg, save_adpa);
 349         }
 350
 351         /* Check the status to see if both blue and green are on now */
 352         adpa = I915_READ(crt->adpa_reg);
 353         if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
 354                 ret = true;
 355         else
 356                 ret = false;
 357
 358         DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);
 359
 360         return ret;
 361 }
 362
 363 /**
 364  * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
 365  *
 366  * Not for i915G/i915GM
 367  *
 368  * \return true if CRT is connected.
 369  * \return false if CRT is disconnected.
 370  */
 371 static bool intel_crt_detect_hotplug(struct drm_connector *connector)
 372 {
 373         struct drm_device *dev = connector->dev;
 374         struct drm_i915_private *dev_priv = dev->dev_private;
 375         u32 hotplug_en, orig, stat;
 376         bool ret = false;
 377         int i, tries = 0;
 378
 379         if (HAS_PCH_SPLIT(dev))
 380                 return intel_ironlake_crt_detect_hotplug(connector);
 381
 382         if (IS_VALLEYVIEW(dev))
 383                 return valleyview_crt_detect_hotplug(connector);
 384
 385         /*
 386          * On 4 series desktop, CRT detect sequence need to be done twice
 387          * to get a reliable result.
 388          */
 389
 390         if (IS_G4X(dev) && !IS_GM45(dev))
 391                 tries = 2;
 392         else
 393                 tries = 1;
 394         hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
 395         hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
 396
 397         for (i = 0; i < tries ; i++) {
 398                 /* turn on the FORCE_DETECT */
 399                 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
 400                 /* wait for FORCE_DETECT to go off */
 401                 if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
 402                               CRT_HOTPLUG_FORCE_DETECT) == 0,
 403                              1000))
 404                         DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
 405         }
 406
 407         stat = I915_READ(PORT_HOTPLUG_STAT);
 408         if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
 409                 ret = true;
 410
 411         /* clear the interrupt we just generated, if any */
 412         I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
 413
 414         /* and put the bits back */
 415         I915_WRITE(PORT_HOTPLUG_EN, orig);
 416
 417         return ret;
 418 }
 419
 420 static struct edid *intel_crt_get_edid(struct drm_connector *connector,
 421                                 struct i2c_adapter *i2c)
 422 {
 423         struct edid *edid;
 424
 425         edid = drm_get_edid(connector, i2c);
 426
 427         if (!edid && !intel_gmbus_is_forced_bit(i2c)) {
 428                 DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
 429                 intel_gmbus_force_bit(i2c, true);
 430                 edid = drm_get_edid(connector, i2c);
 431                 intel_gmbus_force_bit(i2c, false);
 432         }
 433
 434         return edid;
 435 }
 436
 437 /* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */
 438 static int intel_crt_ddc_get_modes(struct drm_connector *connector,
 439                                 struct i2c_adapter *adapter)
 440 {
 441         struct edid *edid;
 442         int ret;
 443
 444         edid = intel_crt_get_edid(connector, adapter);
 445         if (!edid)
 446                 return 0;
 447
 448         ret = intel_connector_update_modes(connector, edid);
 449         kfree(edid);
 450
 451         return ret;
 452 }
 453
 454 static bool intel_crt_detect_ddc(struct drm_connector *connector)
 455 {
 456         struct intel_crt *crt = intel_attached_crt(connector);
 457         struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
 458         struct edid *edid;
 459         struct i2c_adapter *i2c;
 460
 461         BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG);
 462
 463         i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
 464         edid = intel_crt_get_edid(connector, i2c);
 465
 466         if (edid) {
 467                 bool is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
 468
 469                 /*
 470                  * This may be a DVI-I connector with a shared DDC
 471                  * link between analog and digital outputs, so we
 472                  * have to check the EDID input spec of the attached device.
 473                  */
 474                 if (!is_digital) {
 475                         DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
 476                         return true;
 477                 }
 478
 479                 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
 480         } else {
 481                 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
 482         }
 483
 484         kfree(edid);
 485
 486         return false;
 487 }
 488
 489 static enum drm_connector_status
 490 intel_crt_load_detect(struct intel_crt *crt)
 491 {
 492         struct drm_device *dev = crt->base.base.dev;
 493         struct drm_i915_private *dev_priv = dev->dev_private;
 494         uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe;
 495         uint32_t save_bclrpat;
 496         uint32_t save_vtotal;
 497         uint32_t vtotal, vactive;
 498         uint32_t vsample;
 499         uint32_t vblank, vblank_start, vblank_end;
 500         uint32_t dsl;
 501         uint32_t bclrpat_reg;
 502         uint32_t vtotal_reg;
 503         uint32_t vblank_reg;
 504         uint32_t vsync_reg;
 505         uint32_t pipeconf_reg;
 506         uint32_t pipe_dsl_reg;
 507         uint8_t st00;
 508         enum drm_connector_status status;
 509
 510         DRM_DEBUG_KMS("starting load-detect on CRT\n");
 511
 512         bclrpat_reg = BCLRPAT(pipe);
 513         vtotal_reg = VTOTAL(pipe);
 514         vblank_reg = VBLANK(pipe);
 515         vsync_reg = VSYNC(pipe);
 516         pipeconf_reg = PIPECONF(pipe);
 517         pipe_dsl_reg = PIPEDSL(pipe);
 518
 519         save_bclrpat = I915_READ(bclrpat_reg);
 520         save_vtotal = I915_READ(vtotal_reg);
 521         vblank = I915_READ(vblank_reg);
 522
 523         vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
 524         vactive = (save_vtotal & 0x7ff) + 1;
 525
 526         vblank_start = (vblank & 0xfff) + 1;
 527         vblank_end = ((vblank >> 16) & 0xfff) + 1;
 528
 529         /* Set the border color to purple. */
 530         I915_WRITE(bclrpat_reg, 0x500050);
 531
 532         if (!IS_GEN2(dev)) {
 533                 uint32_t pipeconf = I915_READ(pipeconf_reg);
 534                 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
 535                 POSTING_READ(pipeconf_reg);
 536                 /* Wait for next Vblank to substitue
 537                  * border color for Color info */
 538                 intel_wait_for_vblank(dev, pipe);
 539                 st00 = I915_READ8(VGA_MSR_WRITE);
 540                 status = ((st00 & (1 << 4)) != 0) ?
 541                         connector_status_connected :
 542                         connector_status_disconnected;
 543
 544                 I915_WRITE(pipeconf_reg, pipeconf);
 545         } else {
 546                 bool restore_vblank = false;
 547                 int count, detect;
 548
 549                 /*
 550                 * If there isn't any border, add some.
 551                 * Yes, this will flicker
 552                 */
 553                 if (vblank_start <= vactive && vblank_end >= vtotal) {
 554                         uint32_t vsync = I915_READ(vsync_reg);
 555                         uint32_t vsync_start = (vsync & 0xffff) + 1;
 556
 557                         vblank_start = vsync_start;
 558                         I915_WRITE(vblank_reg,
 559                                    (vblank_start - 1) |
 560                                    ((vblank_end - 1) << 16));
 561                         restore_vblank = true;
 562                 }
 563                 /* sample in the vertical border, selecting the larger one */
 564                 if (vblank_start - vactive >= vtotal - vblank_end)
 565                         vsample = (vblank_start + vactive) >> 1;
 566                 else
 567                         vsample = (vtotal + vblank_end) >> 1;
 568
 569                 /*
 570                  * Wait for the border to be displayed
 571                  */
 572                 while (I915_READ(pipe_dsl_reg) >= vactive)
 573                         ;
 574                 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
 575                         ;
 576                 /*
 577                  * Watch ST00 for an entire scanline
 578                  */
 579                 detect = 0;
 580                 count = 0;
 581                 do {
 582                         count++;
 583                         /* Read the ST00 VGA status register */
 584                         st00 = I915_READ8(VGA_MSR_WRITE);
 585                         if (st00 & (1 << 4))
 586                                 detect++;
 587                 } while ((I915_READ(pipe_dsl_reg) == dsl));
 588
 589                 /* restore vblank if necessary */
 590                 if (restore_vblank)
 591                         I915_WRITE(vblank_reg, vblank);
 592                 /*
 593                  * If more than 3/4 of the scanline detected a monitor,
 594                  * then it is assumed to be present. This works even on i830,
 595                  * where there isn't any way to force the border color across
 596                  * the screen
 597                  */
 598                 status = detect * 4 > count * 3 ?
 599                          connector_status_connected :
 600                          connector_status_disconnected;
 601         }
 602
 603         /* Restore previous settings */
 604         I915_WRITE(bclrpat_reg, save_bclrpat);
 605
 606         return status;
 607 }
 608
 609 static enum drm_connector_status
 610 intel_crt_detect(struct drm_connector *connector, bool force)
 611 {
 612         struct drm_device *dev = connector->dev;
 613         struct intel_crt *crt = intel_attached_crt(connector);
 614         enum drm_connector_status status;
 615         struct intel_load_detect_pipe tmp;
 616
 617         DRM_DEBUG_KMS("[CONNECTOR:%d:%s] force=%d\n",
 618                       connector->base.id, drm_get_connector_name(connector),
 619                       force);
 620
 621         if (I915_HAS_HOTPLUG(dev)) {
 622                 /* We can not rely on the HPD pin always being correctly wired
 623                  * up, for example many KVM do not pass it through, and so
 624                  * only trust an assertion that the monitor is connected.
 625                  */
 626                 if (intel_crt_detect_hotplug(connector)) {
 627                         DRM_DEBUG_KMS("CRT detected via hotplug\n");
 628                         return connector_status_connected;
 629                 } else
 630                         DRM_DEBUG_KMS("CRT not detected via hotplug\n");
 631         }
 632
 633         if (intel_crt_detect_ddc(connector))
 634                 return connector_status_connected;
 635
 636         /* Load detection is broken on HPD capable machines. Whoever wants a
 637          * broken monitor (without edid) to work behind a broken kvm (that fails
 638          * to have the right resistors for HP detection) needs to fix this up.
 639          * For now just bail out. */
 640         if (I915_HAS_HOTPLUG(dev))
 641                 return connector_status_disconnected;
 642
 643         if (!force)
 644                 return connector->status;
 645
 646         /* for pre-945g platforms use load detect */
 647         if (intel_get_load_detect_pipe(connector, NULL, &tmp)) {
 648                 if (intel_crt_detect_ddc(connector))
 649                         status = connector_status_connected;
 650                 else
 651                         status = intel_crt_load_detect(crt);
 652                 intel_release_load_detect_pipe(connector, &tmp);
 653         } else
 654                 status = connector_status_unknown;
 655
 656         return status;
 657 }
 658
 659 static void intel_crt_destroy(struct drm_connector *connector)
 660 {
 661         drm_sysfs_connector_remove(connector);
 662         drm_connector_cleanup(connector);
 663         kfree(connector);
 664 }
 665
 666 static int intel_crt_get_modes(struct drm_connector *connector)
 667 {
 668         struct drm_device *dev = connector->dev;
 669         struct drm_i915_private *dev_priv = dev->dev_private;
 670         int ret;
 671         struct i2c_adapter *i2c;
 672
 673         i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
 674         ret = intel_crt_ddc_get_modes(connector, i2c);
 675         if (ret || !IS_G4X(dev))
 676                 return ret;
 677
 678         /* Try to probe digital port for output in DVI-I -> VGA mode. */
 679         i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
 680         return intel_crt_ddc_get_modes(connector, i2c);
 681 }
 682
 683 static int intel_crt_set_property(struct drm_connector *connector,
 684                                   struct drm_property *property,
 685                                   uint64_t value)
 686 {
 687         return 0;
 688 }
 689
 690 static void intel_crt_reset(struct drm_connector *connector)
 691 {
 692         struct drm_device *dev = connector->dev;
 693         struct drm_i915_private *dev_priv = dev->dev_private;
 694         struct intel_crt *crt = intel_attached_crt(connector);
 695
 696         if (INTEL_INFO(dev)->gen >= 5) {
 697                 u32 adpa;
 698
 699                 adpa = I915_READ(crt->adpa_reg);
 700                 adpa &= ~ADPA_CRT_HOTPLUG_MASK;
 701                 adpa |= ADPA_HOTPLUG_BITS;
 702                 I915_WRITE(crt->adpa_reg, adpa);
 703                 POSTING_READ(crt->adpa_reg);
 704
 705                 DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa);
 706                 crt->force_hotplug_required = 1;
 707         }
 708
 709 }
 710
 711 /*
 712  * Routines for controlling stuff on the analog port
 713  */
 714
 715 static const struct drm_connector_funcs intel_crt_connector_funcs = {
 716         .reset = intel_crt_reset,
 717         .dpms = intel_crt_dpms,
 718         .detect = intel_crt_detect,
 719         .fill_modes = drm_helper_probe_single_connector_modes,
 720         .destroy = intel_crt_destroy,
 721         .set_property = intel_crt_set_property,
 722 };
 723
 724 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
 725         .mode_valid = intel_crt_mode_valid,
 726         .get_modes = intel_crt_get_modes,
 727         .best_encoder = intel_best_encoder,
 728 };
 729
 730 static const struct drm_encoder_funcs intel_crt_enc_funcs = {
 731         .destroy = intel_encoder_destroy,
 732 };
 733
 734 static int __init intel_no_crt_dmi_callback(const struct dmi_system_id *id)
 735 {
 736         DRM_INFO("Skipping CRT initialization for %s\n", id->ident);
 737         return 1;
 738 }
 739
 740 static const struct dmi_system_id intel_no_crt[] = {
 741         {
 742                 .callback = intel_no_crt_dmi_callback,
 743                 .ident = "ACER ZGB",
 744                 .matches = {
 745                         DMI_MATCH(DMI_SYS_VENDOR, "ACER"),
 746                         DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"),
 747                 },
 748         },
 749         { }
 750 };
 751
 752 void intel_crt_init(struct drm_device *dev)
 753 {
 754         struct drm_connector *connector;
 755         struct intel_crt *crt;
 756         struct intel_connector *intel_connector;
 757         struct drm_i915_private *dev_priv = dev->dev_private;
 758
 759         /* Skip machines without VGA that falsely report hotplug events */
 760         if (dmi_check_system(intel_no_crt))
 761                 return;
 762
 763         crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
 764         if (!crt)
 765                 return;
 766
 767         intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
 768         if (!intel_connector) {
 769                 kfree(crt);
 770                 return;
 771         }
 772
 773         connector = &intel_connector->base;
 774         crt->connector = intel_connector;
 775         drm_connector_init(dev, &intel_connector->base,
 776                            &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
 777
 778         drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
 779                          DRM_MODE_ENCODER_DAC);
 780
 781         intel_connector_attach_encoder(intel_connector, &crt->base);
 782
 783         crt->base.type = INTEL_OUTPUT_ANALOG;
 784         crt->base.cloneable = true;
 785         if (IS_I830(dev))
 786                 crt->base.crtc_mask = (1 << 0);
 787         else
 788                 crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
 789
 790         if (IS_GEN2(dev))
 791                 connector->interlace_allowed = 0;
 792         else
 793                 connector->interlace_allowed = 1;
 794         connector->doublescan_allowed = 0;
 795
 796         if (HAS_PCH_SPLIT(dev))
 797                 crt->adpa_reg = PCH_ADPA;
 798         else if (IS_VALLEYVIEW(dev))
 799                 crt->adpa_reg = VLV_ADPA;
 800         else
 801                 crt->adpa_reg = ADPA;
 802
 803         crt->base.compute_config = intel_crt_compute_config;
 804         crt->base.mode_set = intel_crt_mode_set;
 805         crt->base.disable = intel_disable_crt;
 806         crt->base.enable = intel_enable_crt;
 807         crt->base.get_config = intel_crt_get_config;
 808         if (I915_HAS_HOTPLUG(dev))
 809                 crt->base.hpd_pin = HPD_CRT;
 810         if (HAS_DDI(dev))
 811                 crt->base.get_hw_state = intel_ddi_get_hw_state;
 812         else
 813                 crt->base.get_hw_state = intel_crt_get_hw_state;
 814         intel_connector->get_hw_state = intel_connector_get_hw_state;
 815
 816         drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
 817
 818         drm_sysfs_connector_add(connector);
 819
 820         if (!I915_HAS_HOTPLUG(dev))
 821                 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
 822
 823         /*
 824          * Configure the automatic hotplug detection stuff
 825          */
 826         crt->force_hotplug_required = 0;
 827
 828         /*
 829          * TODO: find a proper way to discover whether we need to set the the
 830          * polarity and link reversal bits or not, instead of relying on the
 831          * BIOS.
 832          */
 833         if (HAS_PCH_LPT(dev)) {
 834                 u32 fdi_config = FDI_RX_POLARITY_REVERSED_LPT |
 835                                  FDI_RX_LINK_REVERSAL_OVERRIDE;
 836
 837                 dev_priv->fdi_rx_config = I915_READ(_FDI_RXA_CTL) & fdi_config;
 838         }
 839 }