drivers/gpu/drm/i915/intel_crt.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Eric Anholt <eric@anholt.net>
  25  */
  26
  27 #include <linux/i2c.h>
  28 #include "drmP.h"
  29 #include "drm.h"
  30 #include "drm_crtc.h"
  31 #include "drm_crtc_helper.h"
  32 #include "intel_drv.h"
  33 #include "i915_drm.h"
  34 #include "i915_drv.h"
  35
  36 static void intel_crt_dpms(struct drm_encoder *encoder, int mode)
  37 {
  38         struct drm_device *dev = encoder->dev;
  39         struct drm_i915_private *dev_priv = dev->dev_private;
  40         u32 temp, reg;
  41
  42         if (IS_IGDNG(dev))
  43                 reg = PCH_ADPA;
  44         else
  45                 reg = ADPA;
  46
  47         temp = I915_READ(reg);
  48         temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
  49         temp &= ~ADPA_DAC_ENABLE;
  50
  51         switch(mode) {
  52         case DRM_MODE_DPMS_ON:
  53                 temp |= ADPA_DAC_ENABLE;
  54                 break;
  55         case DRM_MODE_DPMS_STANDBY:
  56                 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
  57                 break;
  58         case DRM_MODE_DPMS_SUSPEND:
  59                 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
  60                 break;
  61         case DRM_MODE_DPMS_OFF:
  62                 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
  63                 break;
  64         }
  65
  66         I915_WRITE(reg, temp);
  67
  68         if (IS_IGD(dev)) {
  69                 if (mode == DRM_MODE_DPMS_OFF) {
  70                         /* turn off DAC */
  71                         temp = I915_READ(PORT_HOTPLUG_EN);
  72                         temp &= ~CRT_EOS_INT_EN;
  73                         I915_WRITE(PORT_HOTPLUG_EN, temp);
  74
  75                         temp = I915_READ(PORT_HOTPLUG_STAT);
  76                         if (temp & CRT_EOS_INT_STATUS)
  77                                 I915_WRITE(PORT_HOTPLUG_STAT,
  78                                         CRT_EOS_INT_STATUS);
  79                 } else {
  80                         /* turn on DAC. EOS interrupt must be enabled after DAC
  81                          * is enabled, so it sounds not good to enable it in
  82                          * i915_driver_irq_postinstall()
  83                          * wait 12.5ms after DAC is enabled
  84                          */
  85                         msleep(13);
  86                         temp = I915_READ(PORT_HOTPLUG_STAT);
  87                         if (temp & CRT_EOS_INT_STATUS)
  88                                 I915_WRITE(PORT_HOTPLUG_STAT,
  89                                         CRT_EOS_INT_STATUS);
  90                         temp = I915_READ(PORT_HOTPLUG_EN);
  91                         temp |= CRT_EOS_INT_EN;
  92                         I915_WRITE(PORT_HOTPLUG_EN, temp);
  93                 }
  94         }
  95 }
  96
  97 static int intel_crt_mode_valid(struct drm_connector *connector,
  98                                 struct drm_display_mode *mode)
  99 {
 100         struct drm_device *dev = connector->dev;
 101
 102         int max_clock = 0;
 103         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
 104                 return MODE_NO_DBLESCAN;
 105
 106         if (mode->clock < 25000)
 107                 return MODE_CLOCK_LOW;
 108
 109         if (!IS_I9XX(dev))
 110                 max_clock = 350000;
 111         else
 112                 max_clock = 400000;
 113         if (mode->clock > max_clock)
 114                 return MODE_CLOCK_HIGH;
 115
 116         return MODE_OK;
 117 }
 118
 119 static bool intel_crt_mode_fixup(struct drm_encoder *encoder,
 120                                  struct drm_display_mode *mode,
 121                                  struct drm_display_mode *adjusted_mode)
 122 {
 123         return true;
 124 }
 125
 126 static void intel_crt_mode_set(struct drm_encoder *encoder,
 127                                struct drm_display_mode *mode,
 128                                struct drm_display_mode *adjusted_mode)
 129 {
 130
 131         struct drm_device *dev = encoder->dev;
 132         struct drm_crtc *crtc = encoder->crtc;
 133         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 134         struct drm_i915_private *dev_priv = dev->dev_private;
 135         int dpll_md_reg;
 136         u32 adpa, dpll_md;
 137         u32 adpa_reg;
 138
 139         if (intel_crtc->pipe == 0)
 140                 dpll_md_reg = DPLL_A_MD;
 141         else
 142                 dpll_md_reg = DPLL_B_MD;
 143
 144         if (IS_IGDNG(dev))
 145                 adpa_reg = PCH_ADPA;
 146         else
 147                 adpa_reg = ADPA;
 148
 149         /*
 150          * Disable separate mode multiplier used when cloning SDVO to CRT
 151          * XXX this needs to be adjusted when we really are cloning
 152          */
 153         if (IS_I965G(dev) && !IS_IGDNG(dev)) {
 154                 dpll_md = I915_READ(dpll_md_reg);
 155                 I915_WRITE(dpll_md_reg,
 156                            dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
 157         }
 158
 159         adpa = 0;
 160         if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
 161                 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
 162         if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
 163                 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
 164
 165         if (intel_crtc->pipe == 0) {
 166                 adpa |= ADPA_PIPE_A_SELECT;
 167                 if (!IS_IGDNG(dev))
 168                         I915_WRITE(BCLRPAT_A, 0);
 169         } else {
 170                 adpa |= ADPA_PIPE_B_SELECT;
 171                 if (!IS_IGDNG(dev))
 172                         I915_WRITE(BCLRPAT_B, 0);
 173         }
 174
 175         I915_WRITE(adpa_reg, adpa);
 176 }
 177
 178 static bool intel_igdng_crt_detect_hotplug(struct drm_connector *connector)
 179 {
 180         struct drm_device *dev = connector->dev;
 181         struct drm_i915_private *dev_priv = dev->dev_private;
 182         u32 adpa, temp;
 183         bool ret;
 184
 185         temp = adpa = I915_READ(PCH_ADPA);
 186
 187         adpa &= ~ADPA_DAC_ENABLE;
 188         I915_WRITE(PCH_ADPA, adpa);
 189
 190         adpa &= ~ADPA_CRT_HOTPLUG_MASK;
 191
 192         adpa |= (ADPA_CRT_HOTPLUG_PERIOD_128 |
 193                         ADPA_CRT_HOTPLUG_WARMUP_10MS |
 194                         ADPA_CRT_HOTPLUG_SAMPLE_4S |
 195                         ADPA_CRT_HOTPLUG_VOLTAGE_50 | /* default */
 196                         ADPA_CRT_HOTPLUG_VOLREF_325MV |
 197                         ADPA_CRT_HOTPLUG_ENABLE |
 198                         ADPA_CRT_HOTPLUG_FORCE_TRIGGER);
 199
 200         DRM_DEBUG("pch crt adpa 0x%x", adpa);
 201         I915_WRITE(PCH_ADPA, adpa);
 202
 203         while ((I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) != 0)
 204                 ;
 205
 206         /* Check the status to see if both blue and green are on now */
 207         adpa = I915_READ(PCH_ADPA);
 208         adpa &= ADPA_CRT_HOTPLUG_MONITOR_MASK;
 209         if ((adpa == ADPA_CRT_HOTPLUG_MONITOR_COLOR) ||
 210                 (adpa == ADPA_CRT_HOTPLUG_MONITOR_MONO))
 211                 ret = true;
 212         else
 213                 ret = false;
 214
 215         /* restore origin register */
 216         I915_WRITE(PCH_ADPA, temp);
 217         return ret;
 218 }
 219
 220 /**
 221  * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
 222  *
 223  * Not for i915G/i915GM
 224  *
 225  * \return true if CRT is connected.
 226  * \return false if CRT is disconnected.
 227  */
 228 static bool intel_crt_detect_hotplug(struct drm_connector *connector)
 229 {
 230         struct drm_device *dev = connector->dev;
 231         struct drm_i915_private *dev_priv = dev->dev_private;
 232         u32 hotplug_en;
 233         int i, tries = 0;
 234
 235         if (IS_IGDNG(dev))
 236                 return intel_igdng_crt_detect_hotplug(connector);
 237
 238         /*
 239          * On 4 series desktop, CRT detect sequence need to be done twice
 240          * to get a reliable result.
 241          */
 242
 243         if (IS_G4X(dev) && !IS_GM45(dev))
 244                 tries = 2;
 245         else
 246                 tries = 1;
 247         hotplug_en = I915_READ(PORT_HOTPLUG_EN);
 248         hotplug_en &= CRT_FORCE_HOTPLUG_MASK;
 249         hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
 250
 251         if (IS_G4X(dev))
 252                 hotplug_en |= CRT_HOTPLUG_ACTIVATION_PERIOD_64;
 253
 254         hotplug_en |= CRT_HOTPLUG_VOLTAGE_COMPARE_50;
 255
 256         for (i = 0; i < tries ; i++) {
 257                 unsigned long timeout;
 258                 /* turn on the FORCE_DETECT */
 259                 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
 260                 timeout = jiffies + msecs_to_jiffies(1000);
 261                 /* wait for FORCE_DETECT to go off */
 262                 do {
 263                         if (!(I915_READ(PORT_HOTPLUG_EN) &
 264                                         CRT_HOTPLUG_FORCE_DETECT))
 265                                 break;
 266                         msleep(1);
 267                 } while (time_after(timeout, jiffies));
 268         }
 269
 270         if ((I915_READ(PORT_HOTPLUG_STAT) & CRT_HOTPLUG_MONITOR_MASK) ==
 271             CRT_HOTPLUG_MONITOR_COLOR)
 272                 return true;
 273
 274         return false;
 275 }
 276
 277 static bool intel_crt_detect_ddc(struct drm_connector *connector)
 278 {
 279         struct intel_output *intel_output = to_intel_output(connector);
 280
 281         /* CRT should always be at 0, but check anyway */
 282         if (intel_output->type != INTEL_OUTPUT_ANALOG)
 283                 return false;
 284
 285         return intel_ddc_probe(intel_output);
 286 }
 287
 288 static enum drm_connector_status
 289 intel_crt_load_detect(struct drm_crtc *crtc, struct intel_output *intel_output)
 290 {
 291         struct drm_encoder *encoder = &intel_output->enc;
 292         struct drm_device *dev = encoder->dev;
 293         struct drm_i915_private *dev_priv = dev->dev_private;
 294         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 295         uint32_t pipe = intel_crtc->pipe;
 296         uint32_t save_bclrpat;
 297         uint32_t save_vtotal;
 298         uint32_t vtotal, vactive;
 299         uint32_t vsample;
 300         uint32_t vblank, vblank_start, vblank_end;
 301         uint32_t dsl;
 302         uint32_t bclrpat_reg;
 303         uint32_t vtotal_reg;
 304         uint32_t vblank_reg;
 305         uint32_t vsync_reg;
 306         uint32_t pipeconf_reg;
 307         uint32_t pipe_dsl_reg;
 308         uint8_t st00;
 309         enum drm_connector_status status;
 310
 311         if (pipe == 0) {
 312                 bclrpat_reg = BCLRPAT_A;
 313                 vtotal_reg = VTOTAL_A;
 314                 vblank_reg = VBLANK_A;
 315                 vsync_reg = VSYNC_A;
 316                 pipeconf_reg = PIPEACONF;
 317                 pipe_dsl_reg = PIPEADSL;
 318         } else {
 319                 bclrpat_reg = BCLRPAT_B;
 320                 vtotal_reg = VTOTAL_B;
 321                 vblank_reg = VBLANK_B;
 322                 vsync_reg = VSYNC_B;
 323                 pipeconf_reg = PIPEBCONF;
 324                 pipe_dsl_reg = PIPEBDSL;
 325         }
 326
 327         save_bclrpat = I915_READ(bclrpat_reg);
 328         save_vtotal = I915_READ(vtotal_reg);
 329         vblank = I915_READ(vblank_reg);
 330
 331         vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
 332         vactive = (save_vtotal & 0x7ff) + 1;
 333
 334         vblank_start = (vblank & 0xfff) + 1;
 335         vblank_end = ((vblank >> 16) & 0xfff) + 1;
 336
 337         /* Set the border color to purple. */
 338         I915_WRITE(bclrpat_reg, 0x500050);
 339
 340         if (IS_I9XX(dev)) {
 341                 uint32_t pipeconf = I915_READ(pipeconf_reg);
 342                 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
 343                 /* Wait for next Vblank to substitue
 344                  * border color for Color info */
 345                 intel_wait_for_vblank(dev);
 346                 st00 = I915_READ8(VGA_MSR_WRITE);
 347                 status = ((st00 & (1 << 4)) != 0) ?
 348                         connector_status_connected :
 349                         connector_status_disconnected;
 350
 351                 I915_WRITE(pipeconf_reg, pipeconf);
 352         } else {
 353                 bool restore_vblank = false;
 354                 int count, detect;
 355
 356                 /*
 357                 * If there isn't any border, add some.
 358                 * Yes, this will flicker
 359                 */
 360                 if (vblank_start <= vactive && vblank_end >= vtotal) {
 361                         uint32_t vsync = I915_READ(vsync_reg);
 362                         uint32_t vsync_start = (vsync & 0xffff) + 1;
 363
 364                         vblank_start = vsync_start;
 365                         I915_WRITE(vblank_reg,
 366                                    (vblank_start - 1) |
 367                                    ((vblank_end - 1) << 16));
 368                         restore_vblank = true;
 369                 }
 370                 /* sample in the vertical border, selecting the larger one */
 371                 if (vblank_start - vactive >= vtotal - vblank_end)
 372                         vsample = (vblank_start + vactive) >> 1;
 373                 else
 374                         vsample = (vtotal + vblank_end) >> 1;
 375
 376                 /*
 377                  * Wait for the border to be displayed
 378                  */
 379                 while (I915_READ(pipe_dsl_reg) >= vactive)
 380                         ;
 381                 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
 382                         ;
 383                 /*
 384                  * Watch ST00 for an entire scanline
 385                  */
 386                 detect = 0;
 387                 count = 0;
 388                 do {
 389                         count++;
 390                         /* Read the ST00 VGA status register */
 391                         st00 = I915_READ8(VGA_MSR_WRITE);
 392                         if (st00 & (1 << 4))
 393                                 detect++;
 394                 } while ((I915_READ(pipe_dsl_reg) == dsl));
 395
 396                 /* restore vblank if necessary */
 397                 if (restore_vblank)
 398                         I915_WRITE(vblank_reg, vblank);
 399                 /*
 400                  * If more than 3/4 of the scanline detected a monitor,
 401                  * then it is assumed to be present. This works even on i830,
 402                  * where there isn't any way to force the border color across
 403                  * the screen
 404                  */
 405                 status = detect * 4 > count * 3 ?
 406                          connector_status_connected :
 407                          connector_status_disconnected;
 408         }
 409
 410         /* Restore previous settings */
 411         I915_WRITE(bclrpat_reg, save_bclrpat);
 412
 413         return status;
 414 }
 415
 416 static enum drm_connector_status intel_crt_detect(struct drm_connector *connector)
 417 {
 418         struct drm_device *dev = connector->dev;
 419         struct intel_output *intel_output = to_intel_output(connector);
 420         struct drm_encoder *encoder = &intel_output->enc;
 421         struct drm_crtc *crtc;
 422         int dpms_mode;
 423         enum drm_connector_status status;
 424
 425         if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev)) {
 426                 if (intel_crt_detect_hotplug(connector))
 427                         return connector_status_connected;
 428                 else
 429                         return connector_status_disconnected;
 430         }
 431
 432         if (intel_crt_detect_ddc(connector))
 433                 return connector_status_connected;
 434
 435         /* for pre-945g platforms use load detect */
 436         if (encoder->crtc && encoder->crtc->enabled) {
 437                 status = intel_crt_load_detect(encoder->crtc, intel_output);
 438         } else {
 439                 crtc = intel_get_load_detect_pipe(intel_output,
 440                                                   NULL, &dpms_mode);
 441                 if (crtc) {
 442                         status = intel_crt_load_detect(crtc, intel_output);
 443                         intel_release_load_detect_pipe(intel_output, dpms_mode);
 444                 } else
 445                         status = connector_status_unknown;
 446         }
 447
 448         return status;
 449 }
 450
 451 static void intel_crt_destroy(struct drm_connector *connector)
 452 {
 453         struct intel_output *intel_output = to_intel_output(connector);
 454
 455         intel_i2c_destroy(intel_output->ddc_bus);
 456         drm_sysfs_connector_remove(connector);
 457         drm_connector_cleanup(connector);
 458         kfree(connector);
 459 }
 460
 461 static int intel_crt_get_modes(struct drm_connector *connector)
 462 {
 463         int ret;
 464         struct intel_output *intel_output = to_intel_output(connector);
 465         struct i2c_adapter *ddcbus;
 466         struct drm_device *dev = connector->dev;
 467
 468
 469         ret = intel_ddc_get_modes(intel_output);
 470         if (ret || !IS_G4X(dev))
 471                 goto end;
 472
 473         ddcbus = intel_output->ddc_bus;
 474         /* Try to probe digital port for output in DVI-I -> VGA mode. */
 475         intel_output->ddc_bus =
 476                 intel_i2c_create(connector->dev, GPIOD, "CRTDDC_D");
 477
 478         if (!intel_output->ddc_bus) {
 479                 intel_output->ddc_bus = ddcbus;
 480                 dev_printk(KERN_ERR, &connector->dev->pdev->dev,
 481                            "DDC bus registration failed for CRTDDC_D.\n");
 482                 goto end;
 483         }
 484         /* Try to get modes by GPIOD port */
 485         ret = intel_ddc_get_modes(intel_output);
 486         intel_i2c_destroy(ddcbus);
 487
 488 end:
 489         return ret;
 490
 491 }
 492
 493 static int intel_crt_set_property(struct drm_connector *connector,
 494                                   struct drm_property *property,
 495                                   uint64_t value)
 496 {
 497         return 0;
 498 }
 499
 500 /*
 501  * Routines for controlling stuff on the analog port
 502  */
 503
 504 static const struct drm_encoder_helper_funcs intel_crt_helper_funcs = {
 505         .dpms = intel_crt_dpms,
 506         .mode_fixup = intel_crt_mode_fixup,
 507         .prepare = intel_encoder_prepare,
 508         .commit = intel_encoder_commit,
 509         .mode_set = intel_crt_mode_set,
 510 };
 511
 512 static const struct drm_connector_funcs intel_crt_connector_funcs = {
 513         .dpms = drm_helper_connector_dpms,
 514         .detect = intel_crt_detect,
 515         .fill_modes = drm_helper_probe_single_connector_modes,
 516         .destroy = intel_crt_destroy,
 517         .set_property = intel_crt_set_property,
 518 };
 519
 520 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
 521         .mode_valid = intel_crt_mode_valid,
 522         .get_modes = intel_crt_get_modes,
 523         .best_encoder = intel_best_encoder,
 524 };
 525
 526 static void intel_crt_enc_destroy(struct drm_encoder *encoder)
 527 {
 528         drm_encoder_cleanup(encoder);
 529 }
 530
 531 static const struct drm_encoder_funcs intel_crt_enc_funcs = {
 532         .destroy = intel_crt_enc_destroy,
 533 };
 534
 535 void intel_crt_init(struct drm_device *dev)
 536 {
 537         struct drm_connector *connector;
 538         struct intel_output *intel_output;
 539         struct drm_i915_private *dev_priv = dev->dev_private;
 540         u32 i2c_reg;
 541
 542         intel_output = kzalloc(sizeof(struct intel_output), GFP_KERNEL);
 543         if (!intel_output)
 544                 return;
 545
 546         connector = &intel_output->base;
 547         drm_connector_init(dev, &intel_output->base,
 548                            &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
 549
 550         drm_encoder_init(dev, &intel_output->enc, &intel_crt_enc_funcs,
 551                          DRM_MODE_ENCODER_DAC);
 552
 553         drm_mode_connector_attach_encoder(&intel_output->base,
 554                                           &intel_output->enc);
 555
 556         /* Set up the DDC bus. */
 557         if (IS_IGDNG(dev))
 558                 i2c_reg = PCH_GPIOA;
 559         else {
 560                 i2c_reg = GPIOA;
 561                 /* Use VBT information for CRT DDC if available */
 562                 if (dev_priv->crt_ddc_bus != -1)
 563                         i2c_reg = dev_priv->crt_ddc_bus;
 564         }
 565         intel_output->ddc_bus = intel_i2c_create(dev, i2c_reg, "CRTDDC_A");
 566         if (!intel_output->ddc_bus) {
 567                 dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
 568                            "failed.\n");
 569                 return;
 570         }
 571
 572         intel_output->type = INTEL_OUTPUT_ANALOG;
 573         intel_output->clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
 574                                    (1 << INTEL_ANALOG_CLONE_BIT) |
 575                                    (1 << INTEL_SDVO_LVDS_CLONE_BIT);
 576         intel_output->crtc_mask = (1 << 0) | (1 << 1);
 577         connector->interlace_allowed = 0;
 578         connector->doublescan_allowed = 0;
 579
 580         drm_encoder_helper_add(&intel_output->enc, &intel_crt_helper_funcs);
 581         drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
 582
 583         drm_sysfs_connector_add(connector);
 584 }