2 * Copyright © 2006-2007 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
24 * Eric Anholt <eric@anholt.net>
27 #include <linux/dmi.h>
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
31 #include <drm/drm_crtc.h>
32 #include <drm/drm_crtc_helper.h>
33 #include <drm/drm_edid.h>
34 #include "intel_drv.h"
35 #include <drm/i915_drm.h>
38 /* Here's the desired hotplug mode */
39 #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 | \
40 ADPA_CRT_HOTPLUG_WARMUP_10MS | \
41 ADPA_CRT_HOTPLUG_SAMPLE_4S | \
42 ADPA_CRT_HOTPLUG_VOLTAGE_50 | \
43 ADPA_CRT_HOTPLUG_VOLREF_325MV | \
44 ADPA_CRT_HOTPLUG_ENABLE)
47 struct intel_encoder base;
48 bool force_hotplug_required;
52 static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
54 return container_of(intel_attached_encoder(connector),
55 struct intel_crt, base);
58 static struct intel_crt *intel_encoder_to_crt(struct intel_encoder *encoder)
60 return container_of(encoder, struct intel_crt, base);
63 static bool intel_crt_get_hw_state(struct intel_encoder *encoder,
66 struct drm_device *dev = encoder->base.dev;
67 struct drm_i915_private *dev_priv = dev->dev_private;
68 struct intel_crt *crt = intel_encoder_to_crt(encoder);
71 tmp = I915_READ(crt->adpa_reg);
73 if (!(tmp & ADPA_DAC_ENABLE))
77 *pipe = PORT_TO_PIPE_CPT(tmp);
79 *pipe = PORT_TO_PIPE(tmp);
84 static void intel_disable_crt(struct intel_encoder *encoder)
86 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
87 struct intel_crt *crt = intel_encoder_to_crt(encoder);
90 temp = I915_READ(crt->adpa_reg);
91 temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
92 temp &= ~ADPA_DAC_ENABLE;
93 I915_WRITE(crt->adpa_reg, temp);
96 static void intel_enable_crt(struct intel_encoder *encoder)
98 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
99 struct intel_crt *crt = intel_encoder_to_crt(encoder);
102 temp = I915_READ(crt->adpa_reg);
103 temp |= ADPA_DAC_ENABLE;
104 I915_WRITE(crt->adpa_reg, temp);
107 /* Note: The caller is required to filter out dpms modes not supported by the
109 static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode)
111 struct drm_device *dev = encoder->base.dev;
112 struct drm_i915_private *dev_priv = dev->dev_private;
113 struct intel_crt *crt = intel_encoder_to_crt(encoder);
116 temp = I915_READ(crt->adpa_reg);
117 temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
118 temp &= ~ADPA_DAC_ENABLE;
121 case DRM_MODE_DPMS_ON:
122 temp |= ADPA_DAC_ENABLE;
124 case DRM_MODE_DPMS_STANDBY:
125 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
127 case DRM_MODE_DPMS_SUSPEND:
128 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
130 case DRM_MODE_DPMS_OFF:
131 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
135 I915_WRITE(crt->adpa_reg, temp);
138 static void intel_crt_dpms(struct drm_connector *connector, int mode)
140 struct drm_device *dev = connector->dev;
141 struct intel_encoder *encoder = intel_attached_encoder(connector);
142 struct drm_crtc *crtc;
145 /* PCH platforms and VLV only support on/off. */
146 if (INTEL_INFO(dev)->gen < 5 && mode != DRM_MODE_DPMS_ON)
147 mode = DRM_MODE_DPMS_OFF;
149 if (mode == connector->dpms)
152 old_dpms = connector->dpms;
153 connector->dpms = mode;
155 /* Only need to change hw state when actually enabled */
156 crtc = encoder->base.crtc;
158 encoder->connectors_active = false;
162 /* We need the pipe to run for anything but OFF. */
163 if (mode == DRM_MODE_DPMS_OFF)
164 encoder->connectors_active = false;
166 encoder->connectors_active = true;
168 if (mode < old_dpms) {
169 /* From off to on, enable the pipe first. */
170 intel_crtc_update_dpms(crtc);
172 intel_crt_set_dpms(encoder, mode);
174 intel_crt_set_dpms(encoder, mode);
176 intel_crtc_update_dpms(crtc);
179 intel_modeset_check_state(connector->dev);
182 static int intel_crt_mode_valid(struct drm_connector *connector,
183 struct drm_display_mode *mode)
185 struct drm_device *dev = connector->dev;
188 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
189 return MODE_NO_DBLESCAN;
191 if (mode->clock < 25000)
192 return MODE_CLOCK_LOW;
198 if (mode->clock > max_clock)
199 return MODE_CLOCK_HIGH;
204 static bool intel_crt_mode_fixup(struct drm_encoder *encoder,
205 const struct drm_display_mode *mode,
206 struct drm_display_mode *adjusted_mode)
211 static void intel_crt_mode_set(struct drm_encoder *encoder,
212 struct drm_display_mode *mode,
213 struct drm_display_mode *adjusted_mode)
216 struct drm_device *dev = encoder->dev;
217 struct drm_crtc *crtc = encoder->crtc;
218 struct intel_crt *crt =
219 intel_encoder_to_crt(to_intel_encoder(encoder));
220 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
221 struct drm_i915_private *dev_priv = dev->dev_private;
225 dpll_md_reg = DPLL_MD(intel_crtc->pipe);
228 * Disable separate mode multiplier used when cloning SDVO to CRT
229 * XXX this needs to be adjusted when we really are cloning
231 if (INTEL_INFO(dev)->gen >= 4 && !HAS_PCH_SPLIT(dev)) {
232 dpll_md = I915_READ(dpll_md_reg);
233 I915_WRITE(dpll_md_reg,
234 dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
237 adpa = ADPA_HOTPLUG_BITS;
238 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
239 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
240 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
241 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
243 /* For CPT allow 3 pipe config, for others just use A or B */
244 if (HAS_PCH_CPT(dev))
245 adpa |= PORT_TRANS_SEL_CPT(intel_crtc->pipe);
246 else if (intel_crtc->pipe == 0)
247 adpa |= ADPA_PIPE_A_SELECT;
249 adpa |= ADPA_PIPE_B_SELECT;
251 if (!HAS_PCH_SPLIT(dev))
252 I915_WRITE(BCLRPAT(intel_crtc->pipe), 0);
254 I915_WRITE(crt->adpa_reg, adpa);
257 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
259 struct drm_device *dev = connector->dev;
260 struct intel_crt *crt = intel_attached_crt(connector);
261 struct drm_i915_private *dev_priv = dev->dev_private;
265 /* The first time through, trigger an explicit detection cycle */
266 if (crt->force_hotplug_required) {
267 bool turn_off_dac = HAS_PCH_SPLIT(dev);
270 crt->force_hotplug_required = 0;
272 save_adpa = adpa = I915_READ(PCH_ADPA);
273 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
275 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
277 adpa &= ~ADPA_DAC_ENABLE;
279 I915_WRITE(PCH_ADPA, adpa);
281 if (wait_for((I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
283 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
286 I915_WRITE(PCH_ADPA, save_adpa);
287 POSTING_READ(PCH_ADPA);
291 /* Check the status to see if both blue and green are on now */
292 adpa = I915_READ(PCH_ADPA);
293 if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
297 DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
302 static bool valleyview_crt_detect_hotplug(struct drm_connector *connector)
304 struct drm_device *dev = connector->dev;
305 struct drm_i915_private *dev_priv = dev->dev_private;
310 save_adpa = adpa = I915_READ(ADPA);
311 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
313 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
315 I915_WRITE(ADPA, adpa);
317 if (wait_for((I915_READ(ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
319 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
320 I915_WRITE(ADPA, save_adpa);
323 /* Check the status to see if both blue and green are on now */
324 adpa = I915_READ(ADPA);
325 if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
330 DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);
332 /* FIXME: debug force function and remove */
339 * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
341 * Not for i915G/i915GM
343 * \return true if CRT is connected.
344 * \return false if CRT is disconnected.
346 static bool intel_crt_detect_hotplug(struct drm_connector *connector)
348 struct drm_device *dev = connector->dev;
349 struct drm_i915_private *dev_priv = dev->dev_private;
350 u32 hotplug_en, orig, stat;
354 if (HAS_PCH_SPLIT(dev))
355 return intel_ironlake_crt_detect_hotplug(connector);
357 if (IS_VALLEYVIEW(dev))
358 return valleyview_crt_detect_hotplug(connector);
361 * On 4 series desktop, CRT detect sequence need to be done twice
362 * to get a reliable result.
365 if (IS_G4X(dev) && !IS_GM45(dev))
369 hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
370 hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
372 for (i = 0; i < tries ; i++) {
373 /* turn on the FORCE_DETECT */
374 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
375 /* wait for FORCE_DETECT to go off */
376 if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
377 CRT_HOTPLUG_FORCE_DETECT) == 0,
379 DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
382 stat = I915_READ(PORT_HOTPLUG_STAT);
383 if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
386 /* clear the interrupt we just generated, if any */
387 I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
389 /* and put the bits back */
390 I915_WRITE(PORT_HOTPLUG_EN, orig);
395 static struct edid *intel_crt_get_edid(struct drm_connector *connector,
396 struct i2c_adapter *i2c)
400 edid = drm_get_edid(connector, i2c);
402 if (!edid && !intel_gmbus_is_forced_bit(i2c)) {
403 DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
404 intel_gmbus_force_bit(i2c, true);
405 edid = drm_get_edid(connector, i2c);
406 intel_gmbus_force_bit(i2c, false);
412 /* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */
413 static int intel_crt_ddc_get_modes(struct drm_connector *connector,
414 struct i2c_adapter *adapter)
418 edid = intel_crt_get_edid(connector, adapter);
422 return intel_connector_update_modes(connector, edid);
425 static bool intel_crt_detect_ddc(struct drm_connector *connector)
427 struct intel_crt *crt = intel_attached_crt(connector);
428 struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
430 struct i2c_adapter *i2c;
432 BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG);
434 i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin);
435 edid = intel_crt_get_edid(connector, i2c);
438 bool is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
441 * This may be a DVI-I connector with a shared DDC
442 * link between analog and digital outputs, so we
443 * have to check the EDID input spec of the attached device.
446 DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
450 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
452 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
460 static enum drm_connector_status
461 intel_crt_load_detect(struct intel_crt *crt)
463 struct drm_device *dev = crt->base.base.dev;
464 struct drm_i915_private *dev_priv = dev->dev_private;
465 uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe;
466 uint32_t save_bclrpat;
467 uint32_t save_vtotal;
468 uint32_t vtotal, vactive;
470 uint32_t vblank, vblank_start, vblank_end;
472 uint32_t bclrpat_reg;
476 uint32_t pipeconf_reg;
477 uint32_t pipe_dsl_reg;
479 enum drm_connector_status status;
481 DRM_DEBUG_KMS("starting load-detect on CRT\n");
483 bclrpat_reg = BCLRPAT(pipe);
484 vtotal_reg = VTOTAL(pipe);
485 vblank_reg = VBLANK(pipe);
486 vsync_reg = VSYNC(pipe);
487 pipeconf_reg = PIPECONF(pipe);
488 pipe_dsl_reg = PIPEDSL(pipe);
490 save_bclrpat = I915_READ(bclrpat_reg);
491 save_vtotal = I915_READ(vtotal_reg);
492 vblank = I915_READ(vblank_reg);
494 vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
495 vactive = (save_vtotal & 0x7ff) + 1;
497 vblank_start = (vblank & 0xfff) + 1;
498 vblank_end = ((vblank >> 16) & 0xfff) + 1;
500 /* Set the border color to purple. */
501 I915_WRITE(bclrpat_reg, 0x500050);
504 uint32_t pipeconf = I915_READ(pipeconf_reg);
505 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
506 POSTING_READ(pipeconf_reg);
507 /* Wait for next Vblank to substitue
508 * border color for Color info */
509 intel_wait_for_vblank(dev, pipe);
510 st00 = I915_READ8(VGA_MSR_WRITE);
511 status = ((st00 & (1 << 4)) != 0) ?
512 connector_status_connected :
513 connector_status_disconnected;
515 I915_WRITE(pipeconf_reg, pipeconf);
517 bool restore_vblank = false;
521 * If there isn't any border, add some.
522 * Yes, this will flicker
524 if (vblank_start <= vactive && vblank_end >= vtotal) {
525 uint32_t vsync = I915_READ(vsync_reg);
526 uint32_t vsync_start = (vsync & 0xffff) + 1;
528 vblank_start = vsync_start;
529 I915_WRITE(vblank_reg,
531 ((vblank_end - 1) << 16));
532 restore_vblank = true;
534 /* sample in the vertical border, selecting the larger one */
535 if (vblank_start - vactive >= vtotal - vblank_end)
536 vsample = (vblank_start + vactive) >> 1;
538 vsample = (vtotal + vblank_end) >> 1;
541 * Wait for the border to be displayed
543 while (I915_READ(pipe_dsl_reg) >= vactive)
545 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
548 * Watch ST00 for an entire scanline
554 /* Read the ST00 VGA status register */
555 st00 = I915_READ8(VGA_MSR_WRITE);
558 } while ((I915_READ(pipe_dsl_reg) == dsl));
560 /* restore vblank if necessary */
562 I915_WRITE(vblank_reg, vblank);
564 * If more than 3/4 of the scanline detected a monitor,
565 * then it is assumed to be present. This works even on i830,
566 * where there isn't any way to force the border color across
569 status = detect * 4 > count * 3 ?
570 connector_status_connected :
571 connector_status_disconnected;
574 /* Restore previous settings */
575 I915_WRITE(bclrpat_reg, save_bclrpat);
580 static enum drm_connector_status
581 intel_crt_detect(struct drm_connector *connector, bool force)
583 struct drm_device *dev = connector->dev;
584 struct intel_crt *crt = intel_attached_crt(connector);
585 enum drm_connector_status status;
586 struct intel_load_detect_pipe tmp;
588 if (I915_HAS_HOTPLUG(dev)) {
589 /* We can not rely on the HPD pin always being correctly wired
590 * up, for example many KVM do not pass it through, and so
591 * only trust an assertion that the monitor is connected.
593 if (intel_crt_detect_hotplug(connector)) {
594 DRM_DEBUG_KMS("CRT detected via hotplug\n");
595 return connector_status_connected;
597 DRM_DEBUG_KMS("CRT not detected via hotplug\n");
600 if (intel_crt_detect_ddc(connector))
601 return connector_status_connected;
603 /* Load detection is broken on HPD capable machines. Whoever wants a
604 * broken monitor (without edid) to work behind a broken kvm (that fails
605 * to have the right resistors for HP detection) needs to fix this up.
606 * For now just bail out. */
607 if (I915_HAS_HOTPLUG(dev))
608 return connector_status_disconnected;
611 return connector->status;
613 /* for pre-945g platforms use load detect */
614 if (intel_get_load_detect_pipe(connector, NULL, &tmp)) {
615 if (intel_crt_detect_ddc(connector))
616 status = connector_status_connected;
618 status = intel_crt_load_detect(crt);
619 intel_release_load_detect_pipe(connector, &tmp);
621 status = connector_status_unknown;
626 static void intel_crt_destroy(struct drm_connector *connector)
628 drm_sysfs_connector_remove(connector);
629 drm_connector_cleanup(connector);
633 static int intel_crt_get_modes(struct drm_connector *connector)
635 struct drm_device *dev = connector->dev;
636 struct drm_i915_private *dev_priv = dev->dev_private;
638 struct i2c_adapter *i2c;
640 i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin);
641 ret = intel_crt_ddc_get_modes(connector, i2c);
642 if (ret || !IS_G4X(dev))
645 /* Try to probe digital port for output in DVI-I -> VGA mode. */
646 i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
647 return intel_crt_ddc_get_modes(connector, i2c);
650 static int intel_crt_set_property(struct drm_connector *connector,
651 struct drm_property *property,
657 static void intel_crt_reset(struct drm_connector *connector)
659 struct drm_device *dev = connector->dev;
660 struct intel_crt *crt = intel_attached_crt(connector);
662 if (HAS_PCH_SPLIT(dev))
663 crt->force_hotplug_required = 1;
667 * Routines for controlling stuff on the analog port
670 static const struct drm_encoder_helper_funcs crt_encoder_funcs = {
671 .mode_fixup = intel_crt_mode_fixup,
672 .mode_set = intel_crt_mode_set,
673 .disable = intel_encoder_noop,
676 static const struct drm_connector_funcs intel_crt_connector_funcs = {
677 .reset = intel_crt_reset,
678 .dpms = intel_crt_dpms,
679 .detect = intel_crt_detect,
680 .fill_modes = drm_helper_probe_single_connector_modes,
681 .destroy = intel_crt_destroy,
682 .set_property = intel_crt_set_property,
685 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
686 .mode_valid = intel_crt_mode_valid,
687 .get_modes = intel_crt_get_modes,
688 .best_encoder = intel_best_encoder,
691 static const struct drm_encoder_funcs intel_crt_enc_funcs = {
692 .destroy = intel_encoder_destroy,
695 static int __init intel_no_crt_dmi_callback(const struct dmi_system_id *id)
697 DRM_INFO("Skipping CRT initialization for %s\n", id->ident);
701 static const struct dmi_system_id intel_no_crt[] = {
703 .callback = intel_no_crt_dmi_callback,
706 DMI_MATCH(DMI_SYS_VENDOR, "ACER"),
707 DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"),
713 void intel_crt_init(struct drm_device *dev)
715 struct drm_connector *connector;
716 struct intel_crt *crt;
717 struct intel_connector *intel_connector;
718 struct drm_i915_private *dev_priv = dev->dev_private;
720 /* Skip machines without VGA that falsely report hotplug events */
721 if (dmi_check_system(intel_no_crt))
724 crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
728 intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
729 if (!intel_connector) {
734 connector = &intel_connector->base;
735 drm_connector_init(dev, &intel_connector->base,
736 &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
738 drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
739 DRM_MODE_ENCODER_DAC);
741 intel_connector_attach_encoder(intel_connector, &crt->base);
743 crt->base.type = INTEL_OUTPUT_ANALOG;
744 crt->base.cloneable = true;
746 crt->base.crtc_mask = (1 << 0);
748 crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
751 connector->interlace_allowed = 0;
753 connector->interlace_allowed = 1;
754 connector->doublescan_allowed = 0;
756 if (HAS_PCH_SPLIT(dev))
757 crt->adpa_reg = PCH_ADPA;
758 else if (IS_VALLEYVIEW(dev))
759 crt->adpa_reg = VLV_ADPA;
761 crt->adpa_reg = ADPA;
763 crt->base.disable = intel_disable_crt;
764 crt->base.enable = intel_enable_crt;
765 crt->base.get_hw_state = intel_crt_get_hw_state;
766 intel_connector->get_hw_state = intel_connector_get_hw_state;
768 drm_encoder_helper_add(&crt->base.base, &crt_encoder_funcs);
769 drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
771 drm_sysfs_connector_add(connector);
773 if (I915_HAS_HOTPLUG(dev))
774 connector->polled = DRM_CONNECTOR_POLL_HPD;
776 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
779 * Configure the automatic hotplug detection stuff
781 crt->force_hotplug_required = 0;
782 if (HAS_PCH_SPLIT(dev)) {
785 adpa = I915_READ(PCH_ADPA);
786 adpa &= ~ADPA_CRT_HOTPLUG_MASK;
787 adpa |= ADPA_HOTPLUG_BITS;
788 I915_WRITE(PCH_ADPA, adpa);
789 POSTING_READ(PCH_ADPA);
791 DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa);
792 crt->force_hotplug_required = 1;
795 dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS;