2 * Copyright © 2006-2007 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
24 * Eric Anholt <eric@anholt.net>
27 #include <linux/i2c.h>
28 #include <linux/slab.h>
32 #include "drm_crtc_helper.h"
34 #include "intel_drv.h"
38 /* Here's the desired hotplug mode */
39 #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 | \
40 ADPA_CRT_HOTPLUG_WARMUP_10MS | \
41 ADPA_CRT_HOTPLUG_SAMPLE_4S | \
42 ADPA_CRT_HOTPLUG_VOLTAGE_50 | \
43 ADPA_CRT_HOTPLUG_VOLREF_325MV | \
44 ADPA_CRT_HOTPLUG_ENABLE)
47 struct intel_encoder base;
48 bool force_hotplug_required;
51 static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
53 return container_of(intel_attached_encoder(connector),
54 struct intel_crt, base);
57 static void intel_crt_dpms(struct drm_encoder *encoder, int mode)
59 struct drm_device *dev = encoder->dev;
60 struct drm_i915_private *dev_priv = dev->dev_private;
63 if (HAS_PCH_SPLIT(dev))
68 temp = I915_READ(reg);
69 temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
70 temp &= ~ADPA_DAC_ENABLE;
73 case DRM_MODE_DPMS_ON:
74 temp |= ADPA_DAC_ENABLE;
76 case DRM_MODE_DPMS_STANDBY:
77 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
79 case DRM_MODE_DPMS_SUSPEND:
80 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
82 case DRM_MODE_DPMS_OFF:
83 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
87 I915_WRITE(reg, temp);
90 static int intel_crt_mode_valid(struct drm_connector *connector,
91 struct drm_display_mode *mode)
93 struct drm_device *dev = connector->dev;
96 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
97 return MODE_NO_DBLESCAN;
99 if (mode->clock < 25000)
100 return MODE_CLOCK_LOW;
106 if (mode->clock > max_clock)
107 return MODE_CLOCK_HIGH;
112 static bool intel_crt_mode_fixup(struct drm_encoder *encoder,
113 struct drm_display_mode *mode,
114 struct drm_display_mode *adjusted_mode)
119 static void intel_crt_mode_set(struct drm_encoder *encoder,
120 struct drm_display_mode *mode,
121 struct drm_display_mode *adjusted_mode)
124 struct drm_device *dev = encoder->dev;
125 struct drm_crtc *crtc = encoder->crtc;
126 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
127 struct drm_i915_private *dev_priv = dev->dev_private;
132 if (intel_crtc->pipe == 0)
133 dpll_md_reg = DPLL_A_MD;
135 dpll_md_reg = DPLL_B_MD;
137 if (HAS_PCH_SPLIT(dev))
143 * Disable separate mode multiplier used when cloning SDVO to CRT
144 * XXX this needs to be adjusted when we really are cloning
146 if (INTEL_INFO(dev)->gen >= 4 && !HAS_PCH_SPLIT(dev)) {
147 dpll_md = I915_READ(dpll_md_reg);
148 I915_WRITE(dpll_md_reg,
149 dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
152 adpa = ADPA_HOTPLUG_BITS;
153 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
154 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
155 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
156 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
158 if (intel_crtc->pipe == 0) {
159 if (HAS_PCH_CPT(dev))
160 adpa |= PORT_TRANS_A_SEL_CPT;
162 adpa |= ADPA_PIPE_A_SELECT;
163 if (!HAS_PCH_SPLIT(dev))
164 I915_WRITE(BCLRPAT_A, 0);
166 if (HAS_PCH_CPT(dev))
167 adpa |= PORT_TRANS_B_SEL_CPT;
169 adpa |= ADPA_PIPE_B_SELECT;
170 if (!HAS_PCH_SPLIT(dev))
171 I915_WRITE(BCLRPAT_B, 0);
174 I915_WRITE(adpa_reg, adpa);
177 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
179 struct drm_device *dev = connector->dev;
180 struct intel_crt *crt = intel_attached_crt(connector);
181 struct drm_i915_private *dev_priv = dev->dev_private;
185 /* The first time through, trigger an explicit detection cycle */
186 if (crt->force_hotplug_required) {
187 bool turn_off_dac = HAS_PCH_SPLIT(dev);
190 crt->force_hotplug_required = 0;
192 save_adpa = adpa = I915_READ(PCH_ADPA);
193 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
195 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
197 adpa &= ~ADPA_DAC_ENABLE;
199 I915_WRITE(PCH_ADPA, adpa);
201 if (wait_for((I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
203 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
206 I915_WRITE(PCH_ADPA, save_adpa);
207 POSTING_READ(PCH_ADPA);
211 /* Check the status to see if both blue and green are on now */
212 adpa = I915_READ(PCH_ADPA);
213 if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
217 DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
223 * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
225 * Not for i915G/i915GM
227 * \return true if CRT is connected.
228 * \return false if CRT is disconnected.
230 static bool intel_crt_detect_hotplug(struct drm_connector *connector)
232 struct drm_device *dev = connector->dev;
233 struct drm_i915_private *dev_priv = dev->dev_private;
234 u32 hotplug_en, orig, stat;
238 if (HAS_PCH_SPLIT(dev))
239 return intel_ironlake_crt_detect_hotplug(connector);
242 * On 4 series desktop, CRT detect sequence need to be done twice
243 * to get a reliable result.
246 if (IS_G4X(dev) && !IS_GM45(dev))
250 hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
251 hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
253 for (i = 0; i < tries ; i++) {
254 /* turn on the FORCE_DETECT */
255 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
256 /* wait for FORCE_DETECT to go off */
257 if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
258 CRT_HOTPLUG_FORCE_DETECT) == 0,
260 DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
263 stat = I915_READ(PORT_HOTPLUG_STAT);
264 if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
267 /* clear the interrupt we just generated, if any */
268 I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
270 /* and put the bits back */
271 I915_WRITE(PORT_HOTPLUG_EN, orig);
276 static bool intel_crt_ddc_probe(struct drm_i915_private *dev_priv, int ddc_bus)
279 struct i2c_msg msgs[] = {
287 /* DDC monitor detect: Does it ACK a write to 0xA0? */
288 return i2c_transfer(&dev_priv->gmbus[ddc_bus].adapter, msgs, 1) == 1;
291 static bool intel_crt_detect_ddc(struct drm_connector *connector)
293 struct intel_crt *crt = intel_attached_crt(connector);
294 struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
296 /* CRT should always be at 0, but check anyway */
297 if (crt->base.type != INTEL_OUTPUT_ANALOG)
300 if (intel_crt_ddc_probe(dev_priv, dev_priv->crt_ddc_pin)) {
301 DRM_DEBUG_KMS("CRT detected via DDC:0xa0\n");
305 if (intel_ddc_probe(&crt->base, dev_priv->crt_ddc_pin)) {
307 bool is_digital = false;
309 edid = drm_get_edid(connector,
310 &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
312 * This may be a DVI-I connector with a shared DDC
313 * link between analog and digital outputs, so we
314 * have to check the EDID input spec of the attached device.
317 is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
318 connector->display_info.raw_edid = NULL;
323 DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
331 static enum drm_connector_status
332 intel_crt_load_detect(struct drm_crtc *crtc, struct intel_crt *crt)
334 struct drm_encoder *encoder = &crt->base.base;
335 struct drm_device *dev = encoder->dev;
336 struct drm_i915_private *dev_priv = dev->dev_private;
337 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
338 uint32_t pipe = intel_crtc->pipe;
339 uint32_t save_bclrpat;
340 uint32_t save_vtotal;
341 uint32_t vtotal, vactive;
343 uint32_t vblank, vblank_start, vblank_end;
345 uint32_t bclrpat_reg;
349 uint32_t pipeconf_reg;
350 uint32_t pipe_dsl_reg;
352 enum drm_connector_status status;
354 DRM_DEBUG_KMS("starting load-detect on CRT\n");
357 bclrpat_reg = BCLRPAT_A;
358 vtotal_reg = VTOTAL_A;
359 vblank_reg = VBLANK_A;
361 pipeconf_reg = PIPEACONF;
362 pipe_dsl_reg = PIPEADSL;
364 bclrpat_reg = BCLRPAT_B;
365 vtotal_reg = VTOTAL_B;
366 vblank_reg = VBLANK_B;
368 pipeconf_reg = PIPEBCONF;
369 pipe_dsl_reg = PIPEBDSL;
372 save_bclrpat = I915_READ(bclrpat_reg);
373 save_vtotal = I915_READ(vtotal_reg);
374 vblank = I915_READ(vblank_reg);
376 vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
377 vactive = (save_vtotal & 0x7ff) + 1;
379 vblank_start = (vblank & 0xfff) + 1;
380 vblank_end = ((vblank >> 16) & 0xfff) + 1;
382 /* Set the border color to purple. */
383 I915_WRITE(bclrpat_reg, 0x500050);
386 uint32_t pipeconf = I915_READ(pipeconf_reg);
387 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
388 POSTING_READ(pipeconf_reg);
389 /* Wait for next Vblank to substitue
390 * border color for Color info */
391 intel_wait_for_vblank(dev, pipe);
392 st00 = I915_READ8(VGA_MSR_WRITE);
393 status = ((st00 & (1 << 4)) != 0) ?
394 connector_status_connected :
395 connector_status_disconnected;
397 I915_WRITE(pipeconf_reg, pipeconf);
399 bool restore_vblank = false;
403 * If there isn't any border, add some.
404 * Yes, this will flicker
406 if (vblank_start <= vactive && vblank_end >= vtotal) {
407 uint32_t vsync = I915_READ(vsync_reg);
408 uint32_t vsync_start = (vsync & 0xffff) + 1;
410 vblank_start = vsync_start;
411 I915_WRITE(vblank_reg,
413 ((vblank_end - 1) << 16));
414 restore_vblank = true;
416 /* sample in the vertical border, selecting the larger one */
417 if (vblank_start - vactive >= vtotal - vblank_end)
418 vsample = (vblank_start + vactive) >> 1;
420 vsample = (vtotal + vblank_end) >> 1;
423 * Wait for the border to be displayed
425 while (I915_READ(pipe_dsl_reg) >= vactive)
427 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
430 * Watch ST00 for an entire scanline
436 /* Read the ST00 VGA status register */
437 st00 = I915_READ8(VGA_MSR_WRITE);
440 } while ((I915_READ(pipe_dsl_reg) == dsl));
442 /* restore vblank if necessary */
444 I915_WRITE(vblank_reg, vblank);
446 * If more than 3/4 of the scanline detected a monitor,
447 * then it is assumed to be present. This works even on i830,
448 * where there isn't any way to force the border color across
451 status = detect * 4 > count * 3 ?
452 connector_status_connected :
453 connector_status_disconnected;
456 /* Restore previous settings */
457 I915_WRITE(bclrpat_reg, save_bclrpat);
462 static enum drm_connector_status
463 intel_crt_detect(struct drm_connector *connector, bool force)
465 struct drm_device *dev = connector->dev;
466 struct intel_crt *crt = intel_attached_crt(connector);
467 struct drm_crtc *crtc;
469 enum drm_connector_status status;
471 if (I915_HAS_HOTPLUG(dev)) {
472 if (intel_crt_detect_hotplug(connector)) {
473 DRM_DEBUG_KMS("CRT detected via hotplug\n");
474 return connector_status_connected;
476 DRM_DEBUG_KMS("CRT not detected via hotplug\n");
477 return connector_status_disconnected;
481 if (intel_crt_detect_ddc(connector))
482 return connector_status_connected;
485 return connector->status;
487 /* for pre-945g platforms use load detect */
488 crtc = crt->base.base.crtc;
489 if (crtc && crtc->enabled) {
490 status = intel_crt_load_detect(crtc, crt);
492 crtc = intel_get_load_detect_pipe(&crt->base, connector,
495 if (intel_crt_detect_ddc(connector))
496 status = connector_status_connected;
498 status = intel_crt_load_detect(crtc, crt);
499 intel_release_load_detect_pipe(&crt->base,
500 connector, dpms_mode);
502 status = connector_status_unknown;
508 static void intel_crt_destroy(struct drm_connector *connector)
510 drm_sysfs_connector_remove(connector);
511 drm_connector_cleanup(connector);
515 static int intel_crt_get_modes(struct drm_connector *connector)
517 struct drm_device *dev = connector->dev;
518 struct drm_i915_private *dev_priv = dev->dev_private;
521 ret = intel_ddc_get_modes(connector,
522 &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
523 if (ret || !IS_G4X(dev))
526 /* Try to probe digital port for output in DVI-I -> VGA mode. */
527 return intel_ddc_get_modes(connector,
528 &dev_priv->gmbus[GMBUS_PORT_DPB].adapter);
531 static int intel_crt_set_property(struct drm_connector *connector,
532 struct drm_property *property,
538 static void intel_crt_reset(struct drm_connector *connector)
540 struct drm_device *dev = connector->dev;
541 struct intel_crt *crt = intel_attached_crt(connector);
543 if (HAS_PCH_SPLIT(dev))
544 crt->force_hotplug_required = 1;
548 * Routines for controlling stuff on the analog port
551 static const struct drm_encoder_helper_funcs intel_crt_helper_funcs = {
552 .dpms = intel_crt_dpms,
553 .mode_fixup = intel_crt_mode_fixup,
554 .prepare = intel_encoder_prepare,
555 .commit = intel_encoder_commit,
556 .mode_set = intel_crt_mode_set,
559 static const struct drm_connector_funcs intel_crt_connector_funcs = {
560 .reset = intel_crt_reset,
561 .dpms = drm_helper_connector_dpms,
562 .detect = intel_crt_detect,
563 .fill_modes = drm_helper_probe_single_connector_modes,
564 .destroy = intel_crt_destroy,
565 .set_property = intel_crt_set_property,
568 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
569 .mode_valid = intel_crt_mode_valid,
570 .get_modes = intel_crt_get_modes,
571 .best_encoder = intel_best_encoder,
574 static const struct drm_encoder_funcs intel_crt_enc_funcs = {
575 .destroy = intel_encoder_destroy,
578 void intel_crt_init(struct drm_device *dev)
580 struct drm_connector *connector;
581 struct intel_crt *crt;
582 struct intel_connector *intel_connector;
583 struct drm_i915_private *dev_priv = dev->dev_private;
585 crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
589 intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
590 if (!intel_connector) {
595 connector = &intel_connector->base;
596 drm_connector_init(dev, &intel_connector->base,
597 &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
599 drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
600 DRM_MODE_ENCODER_DAC);
602 intel_connector_attach_encoder(intel_connector, &crt->base);
604 crt->base.type = INTEL_OUTPUT_ANALOG;
605 crt->base.clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT |
606 1 << INTEL_ANALOG_CLONE_BIT |
607 1 << INTEL_SDVO_LVDS_CLONE_BIT);
608 crt->base.crtc_mask = (1 << 0) | (1 << 1);
609 connector->interlace_allowed = 1;
610 connector->doublescan_allowed = 0;
612 drm_encoder_helper_add(&crt->base.base, &intel_crt_helper_funcs);
613 drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
615 drm_sysfs_connector_add(connector);
617 if (I915_HAS_HOTPLUG(dev))
618 connector->polled = DRM_CONNECTOR_POLL_HPD;
620 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
623 * Configure the automatic hotplug detection stuff
625 crt->force_hotplug_required = 0;
626 if (HAS_PCH_SPLIT(dev)) {
629 adpa = I915_READ(PCH_ADPA);
630 adpa &= ~ADPA_CRT_HOTPLUG_MASK;
631 adpa |= ADPA_HOTPLUG_BITS;
632 I915_WRITE(PCH_ADPA, adpa);
633 POSTING_READ(PCH_ADPA);
635 DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa);
636 crt->force_hotplug_required = 1;
639 dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS;