2 * Copyright © 2006-2007 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
24 * Eric Anholt <eric@anholt.net>
27 #include <linux/dmi.h>
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
31 #include <drm/drm_crtc.h>
32 #include <drm/drm_crtc_helper.h>
33 #include <drm/drm_edid.h>
34 #include "intel_drv.h"
35 #include <drm/i915_drm.h>
38 /* Here's the desired hotplug mode */
39 #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 | \
40 ADPA_CRT_HOTPLUG_WARMUP_10MS | \
41 ADPA_CRT_HOTPLUG_SAMPLE_4S | \
42 ADPA_CRT_HOTPLUG_VOLTAGE_50 | \
43 ADPA_CRT_HOTPLUG_VOLREF_325MV | \
44 ADPA_CRT_HOTPLUG_ENABLE)
47 struct intel_encoder base;
48 /* DPMS state is stored in the connector, which we need in the
49 * encoder's enable/disable callbacks */
50 struct intel_connector *connector;
51 bool force_hotplug_required;
55 static struct intel_crt *intel_encoder_to_crt(struct intel_encoder *encoder)
57 return container_of(encoder, struct intel_crt, base);
60 static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
62 return intel_encoder_to_crt(intel_attached_encoder(connector));
65 static bool intel_crt_get_hw_state(struct intel_encoder *encoder,
68 struct drm_device *dev = encoder->base.dev;
69 struct drm_i915_private *dev_priv = dev->dev_private;
70 struct intel_crt *crt = intel_encoder_to_crt(encoder);
73 tmp = I915_READ(crt->adpa_reg);
75 if (!(tmp & ADPA_DAC_ENABLE))
79 *pipe = PORT_TO_PIPE_CPT(tmp);
81 *pipe = PORT_TO_PIPE(tmp);
86 static unsigned int intel_crt_get_flags(struct intel_encoder *encoder)
88 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
89 struct intel_crt *crt = intel_encoder_to_crt(encoder);
92 tmp = I915_READ(crt->adpa_reg);
94 if (tmp & ADPA_HSYNC_ACTIVE_HIGH)
95 flags |= DRM_MODE_FLAG_PHSYNC;
97 flags |= DRM_MODE_FLAG_NHSYNC;
99 if (tmp & ADPA_VSYNC_ACTIVE_HIGH)
100 flags |= DRM_MODE_FLAG_PVSYNC;
102 flags |= DRM_MODE_FLAG_NVSYNC;
107 static void intel_crt_get_config(struct intel_encoder *encoder,
108 struct intel_crtc_config *pipe_config)
110 struct drm_device *dev = encoder->base.dev;
113 pipe_config->adjusted_mode.flags |= intel_crt_get_flags(encoder);
115 dotclock = pipe_config->port_clock;
117 if (HAS_PCH_SPLIT(dev))
118 ironlake_check_encoder_dotclock(pipe_config, dotclock);
120 pipe_config->adjusted_mode.crtc_clock = dotclock;
123 static void hsw_crt_get_config(struct intel_encoder *encoder,
124 struct intel_crtc_config *pipe_config)
126 intel_ddi_get_config(encoder, pipe_config);
128 pipe_config->adjusted_mode.flags &= ~(DRM_MODE_FLAG_PHSYNC |
129 DRM_MODE_FLAG_NHSYNC |
130 DRM_MODE_FLAG_PVSYNC |
131 DRM_MODE_FLAG_NVSYNC);
132 pipe_config->adjusted_mode.flags |= intel_crt_get_flags(encoder);
135 /* Note: The caller is required to filter out dpms modes not supported by the
137 static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode)
139 struct drm_device *dev = encoder->base.dev;
140 struct drm_i915_private *dev_priv = dev->dev_private;
141 struct intel_crt *crt = intel_encoder_to_crt(encoder);
144 temp = I915_READ(crt->adpa_reg);
145 temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
146 temp &= ~ADPA_DAC_ENABLE;
149 case DRM_MODE_DPMS_ON:
150 temp |= ADPA_DAC_ENABLE;
152 case DRM_MODE_DPMS_STANDBY:
153 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
155 case DRM_MODE_DPMS_SUSPEND:
156 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
158 case DRM_MODE_DPMS_OFF:
159 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
163 I915_WRITE(crt->adpa_reg, temp);
166 static void intel_disable_crt(struct intel_encoder *encoder)
168 intel_crt_set_dpms(encoder, DRM_MODE_DPMS_OFF);
171 static void intel_enable_crt(struct intel_encoder *encoder)
173 struct intel_crt *crt = intel_encoder_to_crt(encoder);
175 intel_crt_set_dpms(encoder, crt->connector->base.dpms);
178 /* Special dpms function to support cloning between dvo/sdvo/crt. */
179 static void intel_crt_dpms(struct drm_connector *connector, int mode)
181 struct drm_device *dev = connector->dev;
182 struct intel_encoder *encoder = intel_attached_encoder(connector);
183 struct drm_crtc *crtc;
186 /* PCH platforms and VLV only support on/off. */
187 if (INTEL_INFO(dev)->gen >= 5 && mode != DRM_MODE_DPMS_ON)
188 mode = DRM_MODE_DPMS_OFF;
190 if (mode == connector->dpms)
193 old_dpms = connector->dpms;
194 connector->dpms = mode;
196 /* Only need to change hw state when actually enabled */
197 crtc = encoder->base.crtc;
199 encoder->connectors_active = false;
203 /* We need the pipe to run for anything but OFF. */
204 if (mode == DRM_MODE_DPMS_OFF)
205 encoder->connectors_active = false;
207 encoder->connectors_active = true;
209 /* We call connector dpms manually below in case pipe dpms doesn't
210 * change due to cloning. */
211 if (mode < old_dpms) {
212 /* From off to on, enable the pipe first. */
213 intel_crtc_update_dpms(crtc);
215 intel_crt_set_dpms(encoder, mode);
217 intel_crt_set_dpms(encoder, mode);
219 intel_crtc_update_dpms(crtc);
222 intel_modeset_check_state(connector->dev);
225 static int intel_crt_mode_valid(struct drm_connector *connector,
226 struct drm_display_mode *mode)
228 struct drm_device *dev = connector->dev;
231 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
232 return MODE_NO_DBLESCAN;
234 if (mode->clock < 25000)
235 return MODE_CLOCK_LOW;
241 if (mode->clock > max_clock)
242 return MODE_CLOCK_HIGH;
244 /* The FDI receiver on LPT only supports 8bpc and only has 2 lanes. */
245 if (HAS_PCH_LPT(dev) &&
246 (ironlake_get_lanes_required(mode->clock, 270000, 24) > 2))
247 return MODE_CLOCK_HIGH;
252 static bool intel_crt_compute_config(struct intel_encoder *encoder,
253 struct intel_crtc_config *pipe_config)
255 struct drm_device *dev = encoder->base.dev;
257 if (HAS_PCH_SPLIT(dev))
258 pipe_config->has_pch_encoder = true;
260 /* LPT FDI RX only supports 8bpc. */
261 if (HAS_PCH_LPT(dev))
262 pipe_config->pipe_bpp = 24;
267 static void intel_crt_mode_set(struct intel_encoder *encoder)
270 struct drm_device *dev = encoder->base.dev;
271 struct intel_crt *crt = intel_encoder_to_crt(encoder);
272 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
273 struct drm_i915_private *dev_priv = dev->dev_private;
274 struct drm_display_mode *adjusted_mode = &crtc->config.adjusted_mode;
277 if (INTEL_INFO(dev)->gen >= 5)
278 adpa = ADPA_HOTPLUG_BITS;
282 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
283 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
284 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
285 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
287 /* For CPT allow 3 pipe config, for others just use A or B */
288 if (HAS_PCH_LPT(dev))
289 ; /* Those bits don't exist here */
290 else if (HAS_PCH_CPT(dev))
291 adpa |= PORT_TRANS_SEL_CPT(crtc->pipe);
292 else if (crtc->pipe == 0)
293 adpa |= ADPA_PIPE_A_SELECT;
295 adpa |= ADPA_PIPE_B_SELECT;
297 if (!HAS_PCH_SPLIT(dev))
298 I915_WRITE(BCLRPAT(crtc->pipe), 0);
300 I915_WRITE(crt->adpa_reg, adpa);
303 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
305 struct drm_device *dev = connector->dev;
306 struct intel_crt *crt = intel_attached_crt(connector);
307 struct drm_i915_private *dev_priv = dev->dev_private;
311 /* The first time through, trigger an explicit detection cycle */
312 if (crt->force_hotplug_required) {
313 bool turn_off_dac = HAS_PCH_SPLIT(dev);
316 crt->force_hotplug_required = 0;
318 save_adpa = adpa = I915_READ(crt->adpa_reg);
319 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
321 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
323 adpa &= ~ADPA_DAC_ENABLE;
325 I915_WRITE(crt->adpa_reg, adpa);
327 if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
329 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
332 I915_WRITE(crt->adpa_reg, save_adpa);
333 POSTING_READ(crt->adpa_reg);
337 /* Check the status to see if both blue and green are on now */
338 adpa = I915_READ(crt->adpa_reg);
339 if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
343 DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
348 static bool valleyview_crt_detect_hotplug(struct drm_connector *connector)
350 struct drm_device *dev = connector->dev;
351 struct intel_crt *crt = intel_attached_crt(connector);
352 struct drm_i915_private *dev_priv = dev->dev_private;
357 save_adpa = adpa = I915_READ(crt->adpa_reg);
358 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
360 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
362 I915_WRITE(crt->adpa_reg, adpa);
364 if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
366 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
367 I915_WRITE(crt->adpa_reg, save_adpa);
370 /* Check the status to see if both blue and green are on now */
371 adpa = I915_READ(crt->adpa_reg);
372 if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
377 DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);
383 * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
385 * Not for i915G/i915GM
387 * \return true if CRT is connected.
388 * \return false if CRT is disconnected.
390 static bool intel_crt_detect_hotplug(struct drm_connector *connector)
392 struct drm_device *dev = connector->dev;
393 struct drm_i915_private *dev_priv = dev->dev_private;
394 u32 hotplug_en, orig, stat;
398 if (HAS_PCH_SPLIT(dev))
399 return intel_ironlake_crt_detect_hotplug(connector);
401 if (IS_VALLEYVIEW(dev))
402 return valleyview_crt_detect_hotplug(connector);
405 * On 4 series desktop, CRT detect sequence need to be done twice
406 * to get a reliable result.
409 if (IS_G4X(dev) && !IS_GM45(dev))
413 hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
414 hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
416 for (i = 0; i < tries ; i++) {
417 /* turn on the FORCE_DETECT */
418 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
419 /* wait for FORCE_DETECT to go off */
420 if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
421 CRT_HOTPLUG_FORCE_DETECT) == 0,
423 DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
426 stat = I915_READ(PORT_HOTPLUG_STAT);
427 if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
430 /* clear the interrupt we just generated, if any */
431 I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
433 /* and put the bits back */
434 I915_WRITE(PORT_HOTPLUG_EN, orig);
439 static struct edid *intel_crt_get_edid(struct drm_connector *connector,
440 struct i2c_adapter *i2c)
444 edid = drm_get_edid(connector, i2c);
446 if (!edid && !intel_gmbus_is_forced_bit(i2c)) {
447 DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
448 intel_gmbus_force_bit(i2c, true);
449 edid = drm_get_edid(connector, i2c);
450 intel_gmbus_force_bit(i2c, false);
456 /* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */
457 static int intel_crt_ddc_get_modes(struct drm_connector *connector,
458 struct i2c_adapter *adapter)
463 edid = intel_crt_get_edid(connector, adapter);
467 ret = intel_connector_update_modes(connector, edid);
473 static bool intel_crt_detect_ddc(struct drm_connector *connector)
475 struct intel_crt *crt = intel_attached_crt(connector);
476 struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
478 struct i2c_adapter *i2c;
480 BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG);
482 i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
483 edid = intel_crt_get_edid(connector, i2c);
486 bool is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
489 * This may be a DVI-I connector with a shared DDC
490 * link between analog and digital outputs, so we
491 * have to check the EDID input spec of the attached device.
494 DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
498 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
500 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
508 static enum drm_connector_status
509 intel_crt_load_detect(struct intel_crt *crt)
511 struct drm_device *dev = crt->base.base.dev;
512 struct drm_i915_private *dev_priv = dev->dev_private;
513 uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe;
514 uint32_t save_bclrpat;
515 uint32_t save_vtotal;
516 uint32_t vtotal, vactive;
518 uint32_t vblank, vblank_start, vblank_end;
520 uint32_t bclrpat_reg;
524 uint32_t pipeconf_reg;
525 uint32_t pipe_dsl_reg;
527 enum drm_connector_status status;
529 DRM_DEBUG_KMS("starting load-detect on CRT\n");
531 bclrpat_reg = BCLRPAT(pipe);
532 vtotal_reg = VTOTAL(pipe);
533 vblank_reg = VBLANK(pipe);
534 vsync_reg = VSYNC(pipe);
535 pipeconf_reg = PIPECONF(pipe);
536 pipe_dsl_reg = PIPEDSL(pipe);
538 save_bclrpat = I915_READ(bclrpat_reg);
539 save_vtotal = I915_READ(vtotal_reg);
540 vblank = I915_READ(vblank_reg);
542 vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
543 vactive = (save_vtotal & 0x7ff) + 1;
545 vblank_start = (vblank & 0xfff) + 1;
546 vblank_end = ((vblank >> 16) & 0xfff) + 1;
548 /* Set the border color to purple. */
549 I915_WRITE(bclrpat_reg, 0x500050);
552 uint32_t pipeconf = I915_READ(pipeconf_reg);
553 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
554 POSTING_READ(pipeconf_reg);
555 /* Wait for next Vblank to substitue
556 * border color for Color info */
557 intel_wait_for_vblank(dev, pipe);
558 st00 = I915_READ8(VGA_MSR_WRITE);
559 status = ((st00 & (1 << 4)) != 0) ?
560 connector_status_connected :
561 connector_status_disconnected;
563 I915_WRITE(pipeconf_reg, pipeconf);
565 bool restore_vblank = false;
569 * If there isn't any border, add some.
570 * Yes, this will flicker
572 if (vblank_start <= vactive && vblank_end >= vtotal) {
573 uint32_t vsync = I915_READ(vsync_reg);
574 uint32_t vsync_start = (vsync & 0xffff) + 1;
576 vblank_start = vsync_start;
577 I915_WRITE(vblank_reg,
579 ((vblank_end - 1) << 16));
580 restore_vblank = true;
582 /* sample in the vertical border, selecting the larger one */
583 if (vblank_start - vactive >= vtotal - vblank_end)
584 vsample = (vblank_start + vactive) >> 1;
586 vsample = (vtotal + vblank_end) >> 1;
589 * Wait for the border to be displayed
591 while (I915_READ(pipe_dsl_reg) >= vactive)
593 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
596 * Watch ST00 for an entire scanline
602 /* Read the ST00 VGA status register */
603 st00 = I915_READ8(VGA_MSR_WRITE);
606 } while ((I915_READ(pipe_dsl_reg) == dsl));
608 /* restore vblank if necessary */
610 I915_WRITE(vblank_reg, vblank);
612 * If more than 3/4 of the scanline detected a monitor,
613 * then it is assumed to be present. This works even on i830,
614 * where there isn't any way to force the border color across
617 status = detect * 4 > count * 3 ?
618 connector_status_connected :
619 connector_status_disconnected;
622 /* Restore previous settings */
623 I915_WRITE(bclrpat_reg, save_bclrpat);
628 static enum drm_connector_status
629 intel_crt_detect(struct drm_connector *connector, bool force)
631 struct drm_device *dev = connector->dev;
632 struct intel_crt *crt = intel_attached_crt(connector);
633 enum drm_connector_status status;
634 struct intel_load_detect_pipe tmp;
636 DRM_DEBUG_KMS("[CONNECTOR:%d:%s] force=%d\n",
637 connector->base.id, drm_get_connector_name(connector),
640 if (I915_HAS_HOTPLUG(dev)) {
641 /* We can not rely on the HPD pin always being correctly wired
642 * up, for example many KVM do not pass it through, and so
643 * only trust an assertion that the monitor is connected.
645 if (intel_crt_detect_hotplug(connector)) {
646 DRM_DEBUG_KMS("CRT detected via hotplug\n");
647 return connector_status_connected;
649 DRM_DEBUG_KMS("CRT not detected via hotplug\n");
652 if (intel_crt_detect_ddc(connector))
653 return connector_status_connected;
655 /* Load detection is broken on HPD capable machines. Whoever wants a
656 * broken monitor (without edid) to work behind a broken kvm (that fails
657 * to have the right resistors for HP detection) needs to fix this up.
658 * For now just bail out. */
659 if (I915_HAS_HOTPLUG(dev))
660 return connector_status_disconnected;
663 return connector->status;
665 /* for pre-945g platforms use load detect */
666 if (intel_get_load_detect_pipe(connector, NULL, &tmp)) {
667 if (intel_crt_detect_ddc(connector))
668 status = connector_status_connected;
670 status = intel_crt_load_detect(crt);
671 intel_release_load_detect_pipe(connector, &tmp);
673 status = connector_status_unknown;
678 static void intel_crt_destroy(struct drm_connector *connector)
680 drm_connector_cleanup(connector);
684 static int intel_crt_get_modes(struct drm_connector *connector)
686 struct drm_device *dev = connector->dev;
687 struct drm_i915_private *dev_priv = dev->dev_private;
689 struct i2c_adapter *i2c;
691 i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
692 ret = intel_crt_ddc_get_modes(connector, i2c);
693 if (ret || !IS_G4X(dev))
696 /* Try to probe digital port for output in DVI-I -> VGA mode. */
697 i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
698 return intel_crt_ddc_get_modes(connector, i2c);
701 static int intel_crt_set_property(struct drm_connector *connector,
702 struct drm_property *property,
708 static void intel_crt_reset(struct drm_connector *connector)
710 struct drm_device *dev = connector->dev;
711 struct drm_i915_private *dev_priv = dev->dev_private;
712 struct intel_crt *crt = intel_attached_crt(connector);
714 if (INTEL_INFO(dev)->gen >= 5) {
717 adpa = I915_READ(crt->adpa_reg);
718 adpa &= ~ADPA_CRT_HOTPLUG_MASK;
719 adpa |= ADPA_HOTPLUG_BITS;
720 I915_WRITE(crt->adpa_reg, adpa);
721 POSTING_READ(crt->adpa_reg);
723 DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa);
724 crt->force_hotplug_required = 1;
730 * Routines for controlling stuff on the analog port
733 static const struct drm_connector_funcs intel_crt_connector_funcs = {
734 .reset = intel_crt_reset,
735 .dpms = intel_crt_dpms,
736 .detect = intel_crt_detect,
737 .fill_modes = drm_helper_probe_single_connector_modes,
738 .destroy = intel_crt_destroy,
739 .set_property = intel_crt_set_property,
742 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
743 .mode_valid = intel_crt_mode_valid,
744 .get_modes = intel_crt_get_modes,
745 .best_encoder = intel_best_encoder,
748 static const struct drm_encoder_funcs intel_crt_enc_funcs = {
749 .destroy = intel_encoder_destroy,
752 static int __init intel_no_crt_dmi_callback(const struct dmi_system_id *id)
754 DRM_INFO("Skipping CRT initialization for %s\n", id->ident);
758 static const struct dmi_system_id intel_no_crt[] = {
760 .callback = intel_no_crt_dmi_callback,
763 DMI_MATCH(DMI_SYS_VENDOR, "ACER"),
764 DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"),
770 void intel_crt_init(struct drm_device *dev)
772 struct drm_connector *connector;
773 struct intel_crt *crt;
774 struct intel_connector *intel_connector;
775 struct drm_i915_private *dev_priv = dev->dev_private;
777 /* Skip machines without VGA that falsely report hotplug events */
778 if (dmi_check_system(intel_no_crt))
781 crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
785 intel_connector = kzalloc(sizeof(*intel_connector), GFP_KERNEL);
786 if (!intel_connector) {
791 connector = &intel_connector->base;
792 crt->connector = intel_connector;
793 drm_connector_init(dev, &intel_connector->base,
794 &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
796 drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
797 DRM_MODE_ENCODER_DAC);
799 intel_connector_attach_encoder(intel_connector, &crt->base);
801 crt->base.type = INTEL_OUTPUT_ANALOG;
802 crt->base.cloneable = true;
804 crt->base.crtc_mask = (1 << 0);
806 crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
809 connector->interlace_allowed = 0;
811 connector->interlace_allowed = 1;
812 connector->doublescan_allowed = 0;
814 if (HAS_PCH_SPLIT(dev))
815 crt->adpa_reg = PCH_ADPA;
816 else if (IS_VALLEYVIEW(dev))
817 crt->adpa_reg = VLV_ADPA;
819 crt->adpa_reg = ADPA;
821 crt->base.compute_config = intel_crt_compute_config;
822 crt->base.mode_set = intel_crt_mode_set;
823 crt->base.disable = intel_disable_crt;
824 crt->base.enable = intel_enable_crt;
825 if (I915_HAS_HOTPLUG(dev))
826 crt->base.hpd_pin = HPD_CRT;
828 crt->base.get_config = hsw_crt_get_config;
829 crt->base.get_hw_state = intel_ddi_get_hw_state;
831 crt->base.get_config = intel_crt_get_config;
832 crt->base.get_hw_state = intel_crt_get_hw_state;
834 intel_connector->get_hw_state = intel_connector_get_hw_state;
836 drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
838 drm_sysfs_connector_add(connector);
840 if (!I915_HAS_HOTPLUG(dev))
841 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
844 * Configure the automatic hotplug detection stuff
846 crt->force_hotplug_required = 0;
849 * TODO: find a proper way to discover whether we need to set the the
850 * polarity and link reversal bits or not, instead of relying on the
853 if (HAS_PCH_LPT(dev)) {
854 u32 fdi_config = FDI_RX_POLARITY_REVERSED_LPT |
855 FDI_RX_LINK_REVERSAL_OVERRIDE;
857 dev_priv->fdi_rx_config = I915_READ(_FDI_RXA_CTL) & fdi_config;