2 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright (c) 2007-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
25 #ifndef __INTEL_DRV_H__
26 #define __INTEL_DRV_H__
28 #include <linux/i2c.h>
29 #include <drm/i915_drm.h>
31 #include <drm/drm_crtc.h>
32 #include <drm/drm_crtc_helper.h>
33 #include <drm/drm_fb_helper.h>
34 #include <drm/drm_dp_helper.h>
37 * _wait_for - magic (register) wait macro
39 * Does the right thing for modeset paths when run under kdgb or similar atomic
40 * contexts. Note that it's important that we check the condition again after
41 * having timed out, since the timeout could be due to preemption or similar and
42 * we've never had a chance to check the condition before the timeout.
44 #define _wait_for(COND, MS, W) ({ \
45 unsigned long timeout__ = jiffies + msecs_to_jiffies(MS) + 1; \
48 if (time_after(jiffies, timeout__)) { \
53 if (W && drm_can_sleep()) { \
62 #define wait_for(COND, MS) _wait_for(COND, MS, 1)
63 #define wait_for_atomic(COND, MS) _wait_for(COND, MS, 0)
64 #define wait_for_atomic_us(COND, US) _wait_for((COND), \
65 DIV_ROUND_UP((US), 1000), 0)
67 #define KHz(x) (1000*x)
68 #define MHz(x) KHz(1000*x)
71 * Display related stuff
74 /* store information about an Ixxx DVO */
75 /* The i830->i865 use multiple DVOs with multiple i2cs */
76 /* the i915, i945 have a single sDVO i2c bus - which is different */
78 /* maximum connectors per crtcs in the mode set */
79 #define INTELFB_CONN_LIMIT 4
81 #define INTEL_I2C_BUS_DVO 1
82 #define INTEL_I2C_BUS_SDVO 2
84 /* these are outputs from the chip - integrated only
85 external chips are via DVO or SDVO output */
86 #define INTEL_OUTPUT_UNUSED 0
87 #define INTEL_OUTPUT_ANALOG 1
88 #define INTEL_OUTPUT_DVO 2
89 #define INTEL_OUTPUT_SDVO 3
90 #define INTEL_OUTPUT_LVDS 4
91 #define INTEL_OUTPUT_TVOUT 5
92 #define INTEL_OUTPUT_HDMI 6
93 #define INTEL_OUTPUT_DISPLAYPORT 7
94 #define INTEL_OUTPUT_EDP 8
95 #define INTEL_OUTPUT_UNKNOWN 9
97 #define INTEL_DVO_CHIP_NONE 0
98 #define INTEL_DVO_CHIP_LVDS 1
99 #define INTEL_DVO_CHIP_TMDS 2
100 #define INTEL_DVO_CHIP_TVOUT 4
102 struct intel_framebuffer {
103 struct drm_framebuffer base;
104 struct drm_i915_gem_object *obj;
108 struct drm_fb_helper helper;
109 struct intel_framebuffer ifb;
110 struct list_head fbdev_list;
111 struct drm_display_mode *our_mode;
114 struct intel_encoder {
115 struct drm_encoder base;
117 * The new crtc this encoder will be driven from. Only differs from
118 * base->crtc while a modeset is in progress.
120 struct intel_crtc *new_crtc;
125 * Intel hw has only one MUX where encoders could be clone, hence a
126 * simple flag is enough to compute the possible_clones mask.
129 bool connectors_active;
130 void (*hot_plug)(struct intel_encoder *);
131 bool (*compute_config)(struct intel_encoder *,
132 struct intel_crtc_config *);
133 void (*pre_pll_enable)(struct intel_encoder *);
134 void (*pre_enable)(struct intel_encoder *);
135 void (*enable)(struct intel_encoder *);
136 void (*mode_set)(struct intel_encoder *intel_encoder);
137 void (*disable)(struct intel_encoder *);
138 void (*post_disable)(struct intel_encoder *);
139 /* Read out the current hw state of this connector, returning true if
140 * the encoder is active. If the encoder is enabled it also set the pipe
141 * it is connected to in the pipe parameter. */
142 bool (*get_hw_state)(struct intel_encoder *, enum pipe *pipe);
144 enum hpd_pin hpd_pin;
148 struct drm_display_mode *fixed_mode;
152 struct intel_connector {
153 struct drm_connector base;
155 * The fixed encoder this connector is connected to.
157 struct intel_encoder *encoder;
160 * The new encoder this connector will be driven. Only differs from
161 * encoder while a modeset is in progress.
163 struct intel_encoder *new_encoder;
165 /* Reads out the current hw, returning true if the connector is enabled
166 * and active (i.e. dpms ON state). */
167 bool (*get_hw_state)(struct intel_connector *);
169 /* Panel info for eDP and LVDS */
170 struct intel_panel panel;
172 /* Cached EDID for eDP and LVDS. May hold ERR_PTR for invalid EDID. */
175 /* since POLL and HPD connectors may use the same HPD line keep the native
176 state of connector->polled in case hotplug storm detection changes it */
180 struct intel_crtc_config {
181 struct drm_display_mode requested_mode;
182 struct drm_display_mode adjusted_mode;
183 /* This flag must be set by the encoder's compute_config callback if it
184 * changes the crtc timings in the mode to prevent the crtc fixup from
185 * overwriting them. Currently only lvds needs that. */
187 /* Whether to set up the PCH/FDI. Note that we never allow sharing
188 * between pch encoders and cpu encoders. */
189 bool has_pch_encoder;
191 /* CPU Transcoder for the pipe. Currently this can only differ from the
192 * pipe on Haswell (where we have a special eDP transcoder). */
193 enum transcoder cpu_transcoder;
196 * Use reduced/limited/broadcast rbg range, compressing from the full
197 * range fed into the crtcs.
199 bool limited_color_range;
201 /* DP has a bunch of special case unfortunately, so mark the pipe
206 /* Controls for the clock computation, to override various stages. */
209 /* Settings for the intel dpll used on pretty much everything but
218 struct intel_link_m_n dp_m_n;
220 * This is currently used by DP and HDMI encoders since those can have a
221 * target pixel clock != the port link clock (which is currently stored
222 * in adjusted_mode->clock).
224 int pixel_target_clock;
225 /* Used by SDVO (and if we ever fix it, HDMI). */
226 unsigned pixel_multiplier;
230 struct drm_crtc base;
233 u8 lut_r[256], lut_g[256], lut_b[256];
235 * Whether the crtc and the connected output pipeline is active. Implies
236 * that crtc->enabled is set, i.e. the current mode configuration has
237 * some outputs connected to this crtc.
241 bool primary_disabled; /* is the crtc obscured by a plane? */
243 struct intel_overlay *overlay;
244 struct intel_unpin_work *unpin_work;
247 atomic_t unpin_work_count;
249 /* Display surface base address adjustement for pageflips. Note that on
250 * gen4+ this only adjusts up to a tile, offsets within a tile are
251 * handled in the hw itself (with the TILEOFF register). */
252 unsigned long dspaddr_offset;
254 struct drm_i915_gem_object *cursor_bo;
255 uint32_t cursor_addr;
256 int16_t cursor_x, cursor_y;
257 int16_t cursor_width, cursor_height;
260 struct intel_crtc_config config;
262 /* We can share PLLs across outputs if the timings match */
263 struct intel_pch_pll *pch_pll;
264 uint32_t ddi_pll_sel;
266 /* reset counter value when the last flip was submitted */
267 unsigned int reset_counter;
271 struct drm_plane base;
274 struct drm_i915_gem_object *obj;
277 u32 lut_r[1024], lut_g[1024], lut_b[1024];
279 unsigned int crtc_w, crtc_h;
280 uint32_t src_x, src_y;
281 uint32_t src_w, src_h;
282 void (*update_plane)(struct drm_plane *plane,
283 struct drm_framebuffer *fb,
284 struct drm_i915_gem_object *obj,
285 int crtc_x, int crtc_y,
286 unsigned int crtc_w, unsigned int crtc_h,
287 uint32_t x, uint32_t y,
288 uint32_t src_w, uint32_t src_h);
289 void (*disable_plane)(struct drm_plane *plane);
290 int (*update_colorkey)(struct drm_plane *plane,
291 struct drm_intel_sprite_colorkey *key);
292 void (*get_colorkey)(struct drm_plane *plane,
293 struct drm_intel_sprite_colorkey *key);
296 struct intel_watermark_params {
297 unsigned long fifo_size;
298 unsigned long max_wm;
299 unsigned long default_wm;
300 unsigned long guard_size;
301 unsigned long cacheline_size;
304 struct cxsr_latency {
307 unsigned long fsb_freq;
308 unsigned long mem_freq;
309 unsigned long display_sr;
310 unsigned long display_hpll_disable;
311 unsigned long cursor_sr;
312 unsigned long cursor_hpll_disable;
315 #define to_intel_crtc(x) container_of(x, struct intel_crtc, base)
316 #define to_intel_connector(x) container_of(x, struct intel_connector, base)
317 #define to_intel_encoder(x) container_of(x, struct intel_encoder, base)
318 #define to_intel_framebuffer(x) container_of(x, struct intel_framebuffer, base)
319 #define to_intel_plane(x) container_of(x, struct intel_plane, base)
321 #define DIP_HEADER_SIZE 5
323 #define DIP_TYPE_AVI 0x82
324 #define DIP_VERSION_AVI 0x2
325 #define DIP_LEN_AVI 13
326 #define DIP_AVI_PR_1 0
327 #define DIP_AVI_PR_2 1
328 #define DIP_AVI_RGB_QUANT_RANGE_DEFAULT (0 << 2)
329 #define DIP_AVI_RGB_QUANT_RANGE_LIMITED (1 << 2)
330 #define DIP_AVI_RGB_QUANT_RANGE_FULL (2 << 2)
332 #define DIP_TYPE_SPD 0x83
333 #define DIP_VERSION_SPD 0x1
334 #define DIP_LEN_SPD 25
335 #define DIP_SPD_UNKNOWN 0
336 #define DIP_SPD_DSTB 0x1
337 #define DIP_SPD_DVDP 0x2
338 #define DIP_SPD_DVHS 0x3
339 #define DIP_SPD_HDDVR 0x4
340 #define DIP_SPD_DVC 0x5
341 #define DIP_SPD_DSC 0x6
342 #define DIP_SPD_VCD 0x7
343 #define DIP_SPD_GAME 0x8
344 #define DIP_SPD_PC 0x9
345 #define DIP_SPD_BD 0xa
346 #define DIP_SPD_SCD 0xb
348 struct dip_infoframe {
349 uint8_t type; /* HB0 */
350 uint8_t ver; /* HB1 */
351 uint8_t len; /* HB2 - body len, not including checksum */
352 uint8_t ecc; /* Header ECC */
353 uint8_t checksum; /* PB0 */
356 /* PB1 - Y 6:5, A 4:4, B 3:2, S 1:0 */
358 /* PB2 - C 7:6, M 5:4, R 3:0 */
360 /* PB3 - ITC 7:7, EC 6:4, Q 3:2, SC 1:0 */
364 /* PB5 - YQ 7:6, CN 5:4, PR 3:0 */
367 uint16_t top_bar_end;
368 uint16_t bottom_bar_start;
369 uint16_t left_bar_end;
370 uint16_t right_bar_start;
371 } __attribute__ ((packed)) avi;
376 } __attribute__ ((packed)) spd;
378 } __attribute__ ((packed)) body;
379 } __attribute__((packed));
384 uint32_t color_range;
385 bool color_range_auto;
388 enum hdmi_force_audio force_audio;
389 bool rgb_quant_range_selectable;
390 void (*write_infoframe)(struct drm_encoder *encoder,
391 struct dip_infoframe *frame);
392 void (*set_infoframes)(struct drm_encoder *encoder,
393 struct drm_display_mode *adjusted_mode);
396 #define DP_MAX_DOWNSTREAM_PORTS 0x10
397 #define DP_LINK_CONFIGURATION_SIZE 9
401 uint32_t aux_ch_ctl_reg;
403 uint8_t link_configuration[DP_LINK_CONFIGURATION_SIZE];
405 enum hdmi_force_audio force_audio;
406 uint32_t color_range;
407 bool color_range_auto;
410 uint8_t dpcd[DP_RECEIVER_CAP_SIZE];
411 uint8_t downstream_ports[DP_MAX_DOWNSTREAM_PORTS];
412 struct i2c_adapter adapter;
413 struct i2c_algo_dp_aux_data algo;
415 uint8_t train_set[4];
416 int panel_power_up_delay;
417 int panel_power_down_delay;
418 int panel_power_cycle_delay;
419 int backlight_on_delay;
420 int backlight_off_delay;
421 struct delayed_work panel_vdd_work;
423 struct intel_connector *attached_connector;
426 struct intel_digital_port {
427 struct intel_encoder base;
431 struct intel_hdmi hdmi;
434 static inline struct drm_crtc *
435 intel_get_crtc_for_pipe(struct drm_device *dev, int pipe)
437 struct drm_i915_private *dev_priv = dev->dev_private;
438 return dev_priv->pipe_to_crtc_mapping[pipe];
441 static inline struct drm_crtc *
442 intel_get_crtc_for_plane(struct drm_device *dev, int plane)
444 struct drm_i915_private *dev_priv = dev->dev_private;
445 return dev_priv->plane_to_crtc_mapping[plane];
448 struct intel_unpin_work {
449 struct work_struct work;
450 struct drm_crtc *crtc;
451 struct drm_i915_gem_object *old_fb_obj;
452 struct drm_i915_gem_object *pending_flip_obj;
453 struct drm_pending_vblank_event *event;
455 #define INTEL_FLIP_INACTIVE 0
456 #define INTEL_FLIP_PENDING 1
457 #define INTEL_FLIP_COMPLETE 2
458 bool enable_stall_check;
461 struct intel_fbc_work {
462 struct delayed_work work;
463 struct drm_crtc *crtc;
464 struct drm_framebuffer *fb;
468 int intel_pch_rawclk(struct drm_device *dev);
470 int intel_connector_update_modes(struct drm_connector *connector,
472 int intel_ddc_get_modes(struct drm_connector *c, struct i2c_adapter *adapter);
474 extern void intel_attach_force_audio_property(struct drm_connector *connector);
475 extern void intel_attach_broadcast_rgb_property(struct drm_connector *connector);
477 extern void intel_crt_init(struct drm_device *dev);
478 extern void intel_hdmi_init(struct drm_device *dev,
479 int hdmi_reg, enum port port);
480 extern void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port,
481 struct intel_connector *intel_connector);
482 extern struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder);
483 extern bool intel_hdmi_compute_config(struct intel_encoder *encoder,
484 struct intel_crtc_config *pipe_config);
485 extern void intel_dip_infoframe_csum(struct dip_infoframe *avi_if);
486 extern bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg,
488 extern void intel_dvo_init(struct drm_device *dev);
489 extern void intel_tv_init(struct drm_device *dev);
490 extern void intel_mark_busy(struct drm_device *dev);
491 extern void intel_mark_fb_busy(struct drm_i915_gem_object *obj);
492 extern void intel_mark_idle(struct drm_device *dev);
493 extern bool intel_lvds_init(struct drm_device *dev);
494 extern bool intel_is_dual_link_lvds(struct drm_device *dev);
495 extern void intel_dp_init(struct drm_device *dev, int output_reg,
497 extern void intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
498 struct intel_connector *intel_connector);
499 extern void intel_dp_init_link_config(struct intel_dp *intel_dp);
500 extern void intel_dp_start_link_train(struct intel_dp *intel_dp);
501 extern void intel_dp_complete_link_train(struct intel_dp *intel_dp);
502 extern void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode);
503 extern void intel_dp_encoder_destroy(struct drm_encoder *encoder);
504 extern void intel_dp_check_link_status(struct intel_dp *intel_dp);
505 extern bool intel_dp_compute_config(struct intel_encoder *encoder,
506 struct intel_crtc_config *pipe_config);
507 extern bool intel_dpd_is_edp(struct drm_device *dev);
508 extern void ironlake_edp_backlight_on(struct intel_dp *intel_dp);
509 extern void ironlake_edp_backlight_off(struct intel_dp *intel_dp);
510 extern void ironlake_edp_panel_on(struct intel_dp *intel_dp);
511 extern void ironlake_edp_panel_off(struct intel_dp *intel_dp);
512 extern void ironlake_edp_panel_vdd_on(struct intel_dp *intel_dp);
513 extern void ironlake_edp_panel_vdd_off(struct intel_dp *intel_dp, bool sync);
514 extern bool intel_encoder_is_pch_edp(struct drm_encoder *encoder);
515 extern int intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane);
516 extern void intel_flush_display_plane(struct drm_i915_private *dev_priv,
520 extern int intel_panel_init(struct intel_panel *panel,
521 struct drm_display_mode *fixed_mode);
522 extern void intel_panel_fini(struct intel_panel *panel);
524 extern void intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
525 struct drm_display_mode *adjusted_mode);
526 extern void intel_pch_panel_fitting(struct drm_device *dev,
528 const struct drm_display_mode *mode,
529 struct drm_display_mode *adjusted_mode);
530 extern u32 intel_panel_get_max_backlight(struct drm_device *dev);
531 extern void intel_panel_set_backlight(struct drm_device *dev, u32 level);
532 extern int intel_panel_setup_backlight(struct drm_connector *connector);
533 extern void intel_panel_enable_backlight(struct drm_device *dev,
535 extern void intel_panel_disable_backlight(struct drm_device *dev);
536 extern void intel_panel_destroy_backlight(struct drm_device *dev);
537 extern enum drm_connector_status intel_panel_detect(struct drm_device *dev);
539 struct intel_set_config {
540 struct drm_encoder **save_connector_encoders;
541 struct drm_crtc **save_encoder_crtcs;
547 extern int intel_set_mode(struct drm_crtc *crtc, struct drm_display_mode *mode,
548 int x, int y, struct drm_framebuffer *old_fb);
549 extern void intel_modeset_disable(struct drm_device *dev);
550 extern void intel_crtc_restore_mode(struct drm_crtc *crtc);
551 extern void intel_crtc_load_lut(struct drm_crtc *crtc);
552 extern void intel_crtc_update_dpms(struct drm_crtc *crtc);
553 extern void intel_encoder_destroy(struct drm_encoder *encoder);
554 extern void intel_encoder_dpms(struct intel_encoder *encoder, int mode);
555 extern bool intel_encoder_check_is_cloned(struct intel_encoder *encoder);
556 extern void intel_connector_dpms(struct drm_connector *, int mode);
557 extern bool intel_connector_get_hw_state(struct intel_connector *connector);
558 extern void intel_modeset_check_state(struct drm_device *dev);
559 extern void intel_plane_restore(struct drm_plane *plane);
562 static inline struct intel_encoder *intel_attached_encoder(struct drm_connector *connector)
564 return to_intel_connector(connector)->encoder;
567 static inline struct intel_dp *enc_to_intel_dp(struct drm_encoder *encoder)
569 struct intel_digital_port *intel_dig_port =
570 container_of(encoder, struct intel_digital_port, base.base);
571 return &intel_dig_port->dp;
574 static inline struct intel_digital_port *
575 enc_to_dig_port(struct drm_encoder *encoder)
577 return container_of(encoder, struct intel_digital_port, base.base);
580 static inline struct intel_digital_port *
581 dp_to_dig_port(struct intel_dp *intel_dp)
583 return container_of(intel_dp, struct intel_digital_port, dp);
586 static inline struct intel_digital_port *
587 hdmi_to_dig_port(struct intel_hdmi *intel_hdmi)
589 return container_of(intel_hdmi, struct intel_digital_port, hdmi);
592 bool ibx_digital_port_connected(struct drm_i915_private *dev_priv,
593 struct intel_digital_port *port);
595 extern void intel_connector_attach_encoder(struct intel_connector *connector,
596 struct intel_encoder *encoder);
597 extern struct drm_encoder *intel_best_encoder(struct drm_connector *connector);
599 extern struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev,
600 struct drm_crtc *crtc);
601 int intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data,
602 struct drm_file *file_priv);
603 extern enum transcoder
604 intel_pipe_to_cpu_transcoder(struct drm_i915_private *dev_priv,
606 extern void intel_wait_for_vblank(struct drm_device *dev, int pipe);
607 extern void intel_wait_for_pipe_off(struct drm_device *dev, int pipe);
608 extern int ironlake_get_lanes_required(int target_clock, int link_bw, int bpp);
610 struct intel_load_detect_pipe {
611 struct drm_framebuffer *release_fb;
612 bool load_detect_temp;
615 extern bool intel_get_load_detect_pipe(struct drm_connector *connector,
616 struct drm_display_mode *mode,
617 struct intel_load_detect_pipe *old);
618 extern void intel_release_load_detect_pipe(struct drm_connector *connector,
619 struct intel_load_detect_pipe *old);
621 extern void intelfb_restore(void);
622 extern void intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
623 u16 blue, int regno);
624 extern void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
625 u16 *blue, int regno);
626 extern void intel_enable_clock_gating(struct drm_device *dev);
628 extern int intel_pin_and_fence_fb_obj(struct drm_device *dev,
629 struct drm_i915_gem_object *obj,
630 struct intel_ring_buffer *pipelined);
631 extern void intel_unpin_fb_obj(struct drm_i915_gem_object *obj);
633 extern int intel_framebuffer_init(struct drm_device *dev,
634 struct intel_framebuffer *ifb,
635 struct drm_mode_fb_cmd2 *mode_cmd,
636 struct drm_i915_gem_object *obj);
637 extern int intel_fbdev_init(struct drm_device *dev);
638 extern void intel_fbdev_initial_config(struct drm_device *dev);
639 extern void intel_fbdev_fini(struct drm_device *dev);
640 extern void intel_fbdev_set_suspend(struct drm_device *dev, int state);
641 extern void intel_prepare_page_flip(struct drm_device *dev, int plane);
642 extern void intel_finish_page_flip(struct drm_device *dev, int pipe);
643 extern void intel_finish_page_flip_plane(struct drm_device *dev, int plane);
645 extern void intel_setup_overlay(struct drm_device *dev);
646 extern void intel_cleanup_overlay(struct drm_device *dev);
647 extern int intel_overlay_switch_off(struct intel_overlay *overlay);
648 extern int intel_overlay_put_image(struct drm_device *dev, void *data,
649 struct drm_file *file_priv);
650 extern int intel_overlay_attrs(struct drm_device *dev, void *data,
651 struct drm_file *file_priv);
653 extern void intel_fb_output_poll_changed(struct drm_device *dev);
654 extern void intel_fb_restore_mode(struct drm_device *dev);
656 extern void assert_pipe(struct drm_i915_private *dev_priv, enum pipe pipe,
658 #define assert_pipe_enabled(d, p) assert_pipe(d, p, true)
659 #define assert_pipe_disabled(d, p) assert_pipe(d, p, false)
661 extern void intel_init_clock_gating(struct drm_device *dev);
662 extern void intel_write_eld(struct drm_encoder *encoder,
663 struct drm_display_mode *mode);
664 extern void intel_cpt_verify_modeset(struct drm_device *dev, int pipe);
665 extern void intel_cpu_transcoder_set_m_n(struct intel_crtc *crtc,
666 struct intel_link_m_n *m_n);
667 extern void intel_pch_transcoder_set_m_n(struct intel_crtc *crtc,
668 struct intel_link_m_n *m_n);
669 extern void intel_prepare_ddi(struct drm_device *dev);
670 extern void hsw_fdi_link_train(struct drm_crtc *crtc);
671 extern void intel_ddi_init(struct drm_device *dev, enum port port);
673 /* For use by IVB LP watermark workaround in intel_sprite.c */
674 extern void intel_update_watermarks(struct drm_device *dev);
675 extern void intel_update_sprite_watermarks(struct drm_device *dev, int pipe,
676 uint32_t sprite_width,
678 extern void intel_update_linetime_watermarks(struct drm_device *dev, int pipe,
679 struct drm_display_mode *mode);
681 extern unsigned long intel_gen4_compute_page_offset(int *x, int *y,
682 unsigned int tiling_mode,
686 extern int intel_sprite_set_colorkey(struct drm_device *dev, void *data,
687 struct drm_file *file_priv);
688 extern int intel_sprite_get_colorkey(struct drm_device *dev, void *data,
689 struct drm_file *file_priv);
691 extern u32 intel_dpio_read(struct drm_i915_private *dev_priv, int reg);
693 /* Power-related functions, located in intel_pm.c */
694 extern void intel_init_pm(struct drm_device *dev);
696 extern bool intel_fbc_enabled(struct drm_device *dev);
697 extern void intel_enable_fbc(struct drm_crtc *crtc, unsigned long interval);
698 extern void intel_update_fbc(struct drm_device *dev);
700 extern void intel_gpu_ips_init(struct drm_i915_private *dev_priv);
701 extern void intel_gpu_ips_teardown(void);
703 extern bool intel_using_power_well(struct drm_device *dev);
704 extern void intel_init_power_well(struct drm_device *dev);
705 extern void intel_set_power_well(struct drm_device *dev, bool enable);
706 extern void intel_enable_gt_powersave(struct drm_device *dev);
707 extern void intel_disable_gt_powersave(struct drm_device *dev);
708 extern void gen6_gt_check_fifodbg(struct drm_i915_private *dev_priv);
709 extern void ironlake_teardown_rc6(struct drm_device *dev);
711 extern bool intel_ddi_get_hw_state(struct intel_encoder *encoder,
713 extern int intel_ddi_get_cdclk_freq(struct drm_i915_private *dev_priv);
714 extern void intel_ddi_pll_init(struct drm_device *dev);
715 extern void intel_ddi_enable_transcoder_func(struct drm_crtc *crtc);
716 extern void intel_ddi_disable_transcoder_func(struct drm_i915_private *dev_priv,
717 enum transcoder cpu_transcoder);
718 extern void intel_ddi_enable_pipe_clock(struct intel_crtc *intel_crtc);
719 extern void intel_ddi_disable_pipe_clock(struct intel_crtc *intel_crtc);
720 extern void intel_ddi_setup_hw_pll_state(struct drm_device *dev);
721 extern bool intel_ddi_pll_mode_set(struct drm_crtc *crtc, int clock);
722 extern void intel_ddi_put_crtc_pll(struct drm_crtc *crtc);
723 extern void intel_ddi_set_pipe_settings(struct drm_crtc *crtc);
724 extern void intel_ddi_prepare_link_retrain(struct drm_encoder *encoder);
726 intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector);
727 extern void intel_ddi_fdi_disable(struct drm_crtc *crtc);
729 extern void intel_display_handle_reset(struct drm_device *dev);
731 #endif /* __INTEL_DRV_H__ */