2 * Copyright © 2006-2007 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
30 #include <acpi/button.h>
31 #include <linux/dmi.h>
32 #include <linux/i2c.h>
33 #include <linux/slab.h>
38 #include "intel_drv.h"
41 #include <linux/acpi.h>
43 /* Private structure for the integrated LVDS support */
45 struct intel_encoder base;
54 struct drm_display_mode *fixed_mode;
57 static struct intel_lvds *to_intel_lvds(struct drm_encoder *encoder)
59 return container_of(encoder, struct intel_lvds, base.base);
62 static struct intel_lvds *intel_attached_lvds(struct drm_connector *connector)
64 return container_of(intel_attached_encoder(connector),
65 struct intel_lvds, base);
69 * Sets the power state for the panel.
71 static void intel_lvds_enable(struct intel_lvds *intel_lvds)
73 struct drm_device *dev = intel_lvds->base.base.dev;
74 struct drm_i915_private *dev_priv = dev->dev_private;
75 u32 ctl_reg, lvds_reg;
77 if (HAS_PCH_SPLIT(dev)) {
78 ctl_reg = PCH_PP_CONTROL;
85 I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
87 if (intel_lvds->pfit_dirty) {
89 * Enable automatic panel scaling so that non-native modes
90 * fill the screen. The panel fitter should only be
91 * adjusted whilst the pipe is disabled, according to
92 * register description and PRM.
94 DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n",
95 intel_lvds->pfit_control,
96 intel_lvds->pfit_pgm_ratios);
97 if (wait_for((I915_READ(PP_STATUS) & PP_ON) == 0, 1000)) {
98 DRM_ERROR("timed out waiting for panel to power off\n");
100 I915_WRITE(PFIT_PGM_RATIOS, intel_lvds->pfit_pgm_ratios);
101 I915_WRITE(PFIT_CONTROL, intel_lvds->pfit_control);
102 intel_lvds->pfit_dirty = false;
106 I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
107 POSTING_READ(lvds_reg);
109 intel_panel_set_backlight(dev, dev_priv->backlight_level);
112 static void intel_lvds_disable(struct intel_lvds *intel_lvds)
114 struct drm_device *dev = intel_lvds->base.base.dev;
115 struct drm_i915_private *dev_priv = dev->dev_private;
116 u32 ctl_reg, lvds_reg;
118 if (HAS_PCH_SPLIT(dev)) {
119 ctl_reg = PCH_PP_CONTROL;
122 ctl_reg = PP_CONTROL;
126 dev_priv->backlight_level = intel_panel_get_backlight(dev);
127 intel_panel_set_backlight(dev, 0);
129 I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
131 if (intel_lvds->pfit_control) {
132 if (wait_for((I915_READ(PP_STATUS) & PP_ON) == 0, 1000))
133 DRM_ERROR("timed out waiting for panel to power off\n");
135 I915_WRITE(PFIT_CONTROL, 0);
136 intel_lvds->pfit_dirty = true;
139 I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
140 POSTING_READ(lvds_reg);
143 static void intel_lvds_dpms(struct drm_encoder *encoder, int mode)
145 struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
147 if (mode == DRM_MODE_DPMS_ON)
148 intel_lvds_enable(intel_lvds);
150 intel_lvds_disable(intel_lvds);
152 /* XXX: We never power down the LVDS pairs. */
155 static int intel_lvds_mode_valid(struct drm_connector *connector,
156 struct drm_display_mode *mode)
158 struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
159 struct drm_display_mode *fixed_mode = intel_lvds->fixed_mode;
161 if (mode->hdisplay > fixed_mode->hdisplay)
163 if (mode->vdisplay > fixed_mode->vdisplay)
170 centre_horizontally(struct drm_display_mode *mode,
173 u32 border, sync_pos, blank_width, sync_width;
175 /* keep the hsync and hblank widths constant */
176 sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
177 blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
178 sync_pos = (blank_width - sync_width + 1) / 2;
180 border = (mode->hdisplay - width + 1) / 2;
181 border += border & 1; /* make the border even */
183 mode->crtc_hdisplay = width;
184 mode->crtc_hblank_start = width + border;
185 mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
187 mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
188 mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
192 centre_vertically(struct drm_display_mode *mode,
195 u32 border, sync_pos, blank_width, sync_width;
197 /* keep the vsync and vblank widths constant */
198 sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
199 blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
200 sync_pos = (blank_width - sync_width + 1) / 2;
202 border = (mode->vdisplay - height + 1) / 2;
204 mode->crtc_vdisplay = height;
205 mode->crtc_vblank_start = height + border;
206 mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
208 mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
209 mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
212 static inline u32 panel_fitter_scaling(u32 source, u32 target)
215 * Floating point operation is not supported. So the FACTOR
216 * is defined, which can avoid the floating point computation
217 * when calculating the panel ratio.
220 #define FACTOR (1 << ACCURACY)
221 u32 ratio = source * FACTOR / target;
222 return (FACTOR * ratio + FACTOR/2) / FACTOR;
225 static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
226 struct drm_display_mode *mode,
227 struct drm_display_mode *adjusted_mode)
229 struct drm_device *dev = encoder->dev;
230 struct drm_i915_private *dev_priv = dev->dev_private;
231 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
232 struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
233 struct drm_encoder *tmp_encoder;
234 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
236 /* Should never happen!! */
237 if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
238 DRM_ERROR("Can't support LVDS on pipe A\n");
242 /* Should never happen!! */
243 list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) {
244 if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) {
245 DRM_ERROR("Can't enable LVDS and another "
246 "encoder on the same pipe\n");
252 * We have timings from the BIOS for the panel, put them in
253 * to the adjusted mode. The CRTC will be set up for this mode,
254 * with the panel scaling set up to source from the H/VDisplay
255 * of the original mode.
257 intel_fixed_panel_mode(intel_lvds->fixed_mode, adjusted_mode);
259 if (HAS_PCH_SPLIT(dev)) {
260 intel_pch_panel_fitting(dev, intel_lvds->fitting_mode,
261 mode, adjusted_mode);
265 /* Make sure pre-965s set dither correctly */
266 if (INTEL_INFO(dev)->gen < 4) {
267 if (dev_priv->lvds_dither)
268 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
271 /* Native modes don't need fitting */
272 if (adjusted_mode->hdisplay == mode->hdisplay &&
273 adjusted_mode->vdisplay == mode->vdisplay)
276 /* 965+ wants fuzzy fitting */
277 if (INTEL_INFO(dev)->gen >= 4)
278 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
282 * Enable automatic panel scaling for non-native modes so that they fill
283 * the screen. Should be enabled before the pipe is enabled, according
284 * to register description and PRM.
285 * Change the value here to see the borders for debugging
287 I915_WRITE(BCLRPAT_A, 0);
288 I915_WRITE(BCLRPAT_B, 0);
290 switch (intel_lvds->fitting_mode) {
291 case DRM_MODE_SCALE_CENTER:
293 * For centered modes, we have to calculate border widths &
294 * heights and modify the values programmed into the CRTC.
296 centre_horizontally(adjusted_mode, mode->hdisplay);
297 centre_vertically(adjusted_mode, mode->vdisplay);
298 border = LVDS_BORDER_ENABLE;
301 case DRM_MODE_SCALE_ASPECT:
302 /* Scale but preserve the aspect ratio */
303 if (INTEL_INFO(dev)->gen >= 4) {
304 u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
305 u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
307 pfit_control |= PFIT_ENABLE;
308 /* 965+ is easy, it does everything in hw */
309 if (scaled_width > scaled_height)
310 pfit_control |= PFIT_SCALING_PILLAR;
311 else if (scaled_width < scaled_height)
312 pfit_control |= PFIT_SCALING_LETTER;
314 pfit_control |= PFIT_SCALING_AUTO;
316 u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
317 u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
319 * For earlier chips we have to calculate the scaling
320 * ratio by hand and program it into the
321 * PFIT_PGM_RATIO register
323 if (scaled_width > scaled_height) { /* pillar */
324 centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay);
326 border = LVDS_BORDER_ENABLE;
327 if (mode->vdisplay != adjusted_mode->vdisplay) {
328 u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
329 pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
330 bits << PFIT_VERT_SCALE_SHIFT);
331 pfit_control |= (PFIT_ENABLE |
332 VERT_INTERP_BILINEAR |
333 HORIZ_INTERP_BILINEAR);
335 } else if (scaled_width < scaled_height) { /* letter */
336 centre_vertically(adjusted_mode, scaled_width / mode->hdisplay);
338 border = LVDS_BORDER_ENABLE;
339 if (mode->hdisplay != adjusted_mode->hdisplay) {
340 u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
341 pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
342 bits << PFIT_VERT_SCALE_SHIFT);
343 pfit_control |= (PFIT_ENABLE |
344 VERT_INTERP_BILINEAR |
345 HORIZ_INTERP_BILINEAR);
348 /* Aspects match, Let hw scale both directions */
349 pfit_control |= (PFIT_ENABLE |
350 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
351 VERT_INTERP_BILINEAR |
352 HORIZ_INTERP_BILINEAR);
356 case DRM_MODE_SCALE_FULLSCREEN:
358 * Full scaling, even if it changes the aspect ratio.
359 * Fortunately this is all done for us in hw.
361 pfit_control |= PFIT_ENABLE;
362 if (INTEL_INFO(dev)->gen >= 4)
363 pfit_control |= PFIT_SCALING_AUTO;
365 pfit_control |= (VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
366 VERT_INTERP_BILINEAR |
367 HORIZ_INTERP_BILINEAR);
375 if (pfit_control != intel_lvds->pfit_control ||
376 pfit_pgm_ratios != intel_lvds->pfit_pgm_ratios) {
377 intel_lvds->pfit_control = pfit_control;
378 intel_lvds->pfit_pgm_ratios = pfit_pgm_ratios;
379 intel_lvds->pfit_dirty = true;
381 dev_priv->lvds_border_bits = border;
384 * XXX: It would be nice to support lower refresh rates on the
385 * panels to reduce power consumption, and perhaps match the
386 * user's requested refresh rate.
392 static void intel_lvds_prepare(struct drm_encoder *encoder)
394 struct drm_device *dev = encoder->dev;
395 struct drm_i915_private *dev_priv = dev->dev_private;
396 struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
398 dev_priv->backlight_level = intel_panel_get_backlight(dev);
400 /* We try to do the minimum that is necessary in order to unlock
401 * the registers for mode setting.
403 * On Ironlake, this is quite simple as we just set the unlock key
404 * and ignore all subtleties. (This may cause some issues...)
406 * Prior to Ironlake, we must disable the pipe if we want to adjust
407 * the panel fitter. However at all other times we can just reset
408 * the registers regardless.
411 if (HAS_PCH_SPLIT(dev)) {
412 I915_WRITE(PCH_PP_CONTROL,
413 I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
414 } else if (intel_lvds->pfit_dirty) {
415 I915_WRITE(PP_CONTROL,
416 (I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS)
419 I915_WRITE(PP_CONTROL,
420 I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
424 static void intel_lvds_commit(struct drm_encoder *encoder)
426 struct drm_device *dev = encoder->dev;
427 struct drm_i915_private *dev_priv = dev->dev_private;
428 struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
430 if (dev_priv->backlight_level == 0)
431 dev_priv->backlight_level = intel_panel_get_max_backlight(dev);
433 /* Undo any unlocking done in prepare to prevent accidental
434 * adjustment of the registers.
436 if (HAS_PCH_SPLIT(dev)) {
437 u32 val = I915_READ(PCH_PP_CONTROL);
438 if ((val & PANEL_UNLOCK_REGS) == PANEL_UNLOCK_REGS)
439 I915_WRITE(PCH_PP_CONTROL, val & 0x3);
441 u32 val = I915_READ(PP_CONTROL);
442 if ((val & PANEL_UNLOCK_REGS) == PANEL_UNLOCK_REGS)
443 I915_WRITE(PP_CONTROL, val & 0x3);
446 /* Always do a full power on as we do not know what state
449 intel_lvds_enable(intel_lvds);
452 static void intel_lvds_mode_set(struct drm_encoder *encoder,
453 struct drm_display_mode *mode,
454 struct drm_display_mode *adjusted_mode)
457 * The LVDS pin pair will already have been turned on in the
458 * intel_crtc_mode_set since it has a large impact on the DPLL
464 * Detect the LVDS connection.
466 * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
467 * connected and closed means disconnected. We also send hotplug events as
468 * needed, using lid status notification from the input layer.
470 static enum drm_connector_status
471 intel_lvds_detect(struct drm_connector *connector, bool force)
473 struct drm_device *dev = connector->dev;
474 enum drm_connector_status status = connector_status_connected;
476 /* ACPI lid methods were generally unreliable in this generation, so
479 if (IS_GEN2(dev) || IS_GEN3(dev))
480 return connector_status_connected;
486 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
488 static int intel_lvds_get_modes(struct drm_connector *connector)
490 struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
491 struct drm_device *dev = connector->dev;
492 struct drm_display_mode *mode;
494 if (intel_lvds->edid)
495 return drm_add_edid_modes(connector, intel_lvds->edid);
497 mode = drm_mode_duplicate(dev, intel_lvds->fixed_mode);
501 drm_mode_probed_add(connector, mode);
505 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
507 DRM_DEBUG_KMS("Skipping forced modeset for %s\n", id->ident);
511 /* The GPU hangs up on these systems if modeset is performed on LID open */
512 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
514 .callback = intel_no_modeset_on_lid_dmi_callback,
515 .ident = "Toshiba Tecra A11",
517 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
518 DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
522 { } /* terminating entry */
526 * Lid events. Note the use of 'modeset_on_lid':
527 * - we set it on lid close, and reset it on open
528 * - we use it as a "only once" bit (ie we ignore
529 * duplicate events where it was already properly
531 * - the suspend/resume paths will also set it to
532 * zero, since they restore the mode ("lid open").
534 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
537 struct drm_i915_private *dev_priv =
538 container_of(nb, struct drm_i915_private, lid_notifier);
539 struct drm_device *dev = dev_priv->dev;
540 struct drm_connector *connector = dev_priv->int_lvds_connector;
543 * check and update the status of LVDS connector after receiving
544 * the LID nofication event.
547 connector->status = connector->funcs->detect(connector,
550 /* Don't force modeset on machines where it causes a GPU lockup */
551 if (dmi_check_system(intel_no_modeset_on_lid))
553 if (!acpi_lid_open()) {
554 dev_priv->modeset_on_lid = 1;
558 if (!dev_priv->modeset_on_lid)
561 dev_priv->modeset_on_lid = 0;
563 mutex_lock(&dev->mode_config.mutex);
564 drm_helper_resume_force_mode(dev);
565 mutex_unlock(&dev->mode_config.mutex);
571 * intel_lvds_destroy - unregister and free LVDS structures
572 * @connector: connector to free
574 * Unregister the DDC bus for this connector then free the driver private
577 static void intel_lvds_destroy(struct drm_connector *connector)
579 struct drm_device *dev = connector->dev;
580 struct drm_i915_private *dev_priv = dev->dev_private;
582 if (dev_priv->lid_notifier.notifier_call)
583 acpi_lid_notifier_unregister(&dev_priv->lid_notifier);
584 drm_sysfs_connector_remove(connector);
585 drm_connector_cleanup(connector);
589 static int intel_lvds_set_property(struct drm_connector *connector,
590 struct drm_property *property,
593 struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
594 struct drm_device *dev = connector->dev;
596 if (property == dev->mode_config.scaling_mode_property) {
597 struct drm_crtc *crtc = intel_lvds->base.base.crtc;
599 if (value == DRM_MODE_SCALE_NONE) {
600 DRM_DEBUG_KMS("no scaling not supported\n");
604 if (intel_lvds->fitting_mode == value) {
605 /* the LVDS scaling property is not changed */
608 intel_lvds->fitting_mode = value;
609 if (crtc && crtc->enabled) {
611 * If the CRTC is enabled, the display will be changed
612 * according to the new panel fitting mode.
614 drm_crtc_helper_set_mode(crtc, &crtc->mode,
615 crtc->x, crtc->y, crtc->fb);
622 static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
623 .dpms = intel_lvds_dpms,
624 .mode_fixup = intel_lvds_mode_fixup,
625 .prepare = intel_lvds_prepare,
626 .mode_set = intel_lvds_mode_set,
627 .commit = intel_lvds_commit,
630 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
631 .get_modes = intel_lvds_get_modes,
632 .mode_valid = intel_lvds_mode_valid,
633 .best_encoder = intel_best_encoder,
636 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
637 .dpms = drm_helper_connector_dpms,
638 .detect = intel_lvds_detect,
639 .fill_modes = drm_helper_probe_single_connector_modes,
640 .set_property = intel_lvds_set_property,
641 .destroy = intel_lvds_destroy,
644 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
645 .destroy = intel_encoder_destroy,
648 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
650 DRM_DEBUG_KMS("Skipping LVDS initialization for %s\n", id->ident);
654 /* These systems claim to have LVDS, but really don't */
655 static const struct dmi_system_id intel_no_lvds[] = {
657 .callback = intel_no_lvds_dmi_callback,
658 .ident = "Apple Mac Mini (Core series)",
660 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
661 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
665 .callback = intel_no_lvds_dmi_callback,
666 .ident = "Apple Mac Mini (Core 2 series)",
668 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
669 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
673 .callback = intel_no_lvds_dmi_callback,
674 .ident = "MSI IM-945GSE-A",
676 DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
677 DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
681 .callback = intel_no_lvds_dmi_callback,
682 .ident = "Dell Studio Hybrid",
684 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
685 DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
689 .callback = intel_no_lvds_dmi_callback,
690 .ident = "AOpen Mini PC",
692 DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
693 DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
697 .callback = intel_no_lvds_dmi_callback,
698 .ident = "AOpen Mini PC MP915",
700 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
701 DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
705 .callback = intel_no_lvds_dmi_callback,
706 .ident = "Aopen i945GTt-VFA",
708 DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
712 .callback = intel_no_lvds_dmi_callback,
713 .ident = "Clientron U800",
715 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
716 DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
720 { } /* terminating entry */
724 * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
726 * @connector: LVDS connector
728 * Find the reduced downclock for LVDS in EDID.
730 static void intel_find_lvds_downclock(struct drm_device *dev,
731 struct drm_display_mode *fixed_mode,
732 struct drm_connector *connector)
734 struct drm_i915_private *dev_priv = dev->dev_private;
735 struct drm_display_mode *scan;
738 temp_downclock = fixed_mode->clock;
739 list_for_each_entry(scan, &connector->probed_modes, head) {
741 * If one mode has the same resolution with the fixed_panel
742 * mode while they have the different refresh rate, it means
743 * that the reduced downclock is found for the LVDS. In such
744 * case we can set the different FPx0/1 to dynamically select
745 * between low and high frequency.
747 if (scan->hdisplay == fixed_mode->hdisplay &&
748 scan->hsync_start == fixed_mode->hsync_start &&
749 scan->hsync_end == fixed_mode->hsync_end &&
750 scan->htotal == fixed_mode->htotal &&
751 scan->vdisplay == fixed_mode->vdisplay &&
752 scan->vsync_start == fixed_mode->vsync_start &&
753 scan->vsync_end == fixed_mode->vsync_end &&
754 scan->vtotal == fixed_mode->vtotal) {
755 if (scan->clock < temp_downclock) {
757 * The downclock is already found. But we
758 * expect to find the lower downclock.
760 temp_downclock = scan->clock;
764 if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
765 /* We found the downclock for LVDS. */
766 dev_priv->lvds_downclock_avail = 1;
767 dev_priv->lvds_downclock = temp_downclock;
768 DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
769 "Normal clock %dKhz, downclock %dKhz\n",
770 fixed_mode->clock, temp_downclock);
775 * Enumerate the child dev array parsed from VBT to check whether
776 * the LVDS is present.
777 * If it is present, return 1.
778 * If it is not present, return false.
779 * If no child dev is parsed from VBT, it assumes that the LVDS is present.
781 static bool lvds_is_present_in_vbt(struct drm_device *dev,
784 struct drm_i915_private *dev_priv = dev->dev_private;
787 if (!dev_priv->child_dev_num)
790 for (i = 0; i < dev_priv->child_dev_num; i++) {
791 struct child_device_config *child = dev_priv->child_dev + i;
793 /* If the device type is not LFP, continue.
794 * We have to check both the new identifiers as well as the
795 * old for compatibility with some BIOSes.
797 if (child->device_type != DEVICE_TYPE_INT_LFP &&
798 child->device_type != DEVICE_TYPE_LFP)
802 *i2c_pin = child->i2c_pin;
804 /* However, we cannot trust the BIOS writers to populate
805 * the VBT correctly. Since LVDS requires additional
806 * information from AIM blocks, a non-zero addin offset is
807 * a good indicator that the LVDS is actually present.
809 if (child->addin_offset)
812 /* But even then some BIOS writers perform some black magic
813 * and instantiate the device without reference to any
814 * additional data. Trust that if the VBT was written into
815 * the OpRegion then they have validated the LVDS's existence.
817 if (dev_priv->opregion.vbt)
824 static bool intel_lvds_ddc_probe(struct drm_device *dev, u8 pin)
826 struct drm_i915_private *dev_priv = dev->dev_private;
828 struct i2c_msg msgs[] = {
836 struct i2c_adapter *i2c = &dev_priv->gmbus[pin].adapter;
837 /* XXX this only appears to work when using GMBUS */
838 if (intel_gmbus_is_forced_bit(i2c))
840 return i2c_transfer(i2c, msgs, 1) == 1;
844 * intel_lvds_init - setup LVDS connectors on this device
847 * Create the connector, register the LVDS DDC bus, and try to figure out what
848 * modes we can display on the LVDS panel (if present).
850 bool intel_lvds_init(struct drm_device *dev)
852 struct drm_i915_private *dev_priv = dev->dev_private;
853 struct intel_lvds *intel_lvds;
854 struct intel_encoder *intel_encoder;
855 struct intel_connector *intel_connector;
856 struct drm_connector *connector;
857 struct drm_encoder *encoder;
858 struct drm_display_mode *scan; /* *modes, *bios_mode; */
859 struct drm_crtc *crtc;
864 /* Skip init on machines we know falsely report LVDS */
865 if (dmi_check_system(intel_no_lvds))
868 pin = GMBUS_PORT_PANEL;
869 if (!lvds_is_present_in_vbt(dev, &pin)) {
870 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
874 if (HAS_PCH_SPLIT(dev)) {
875 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
877 if (dev_priv->edp.support) {
878 DRM_DEBUG_KMS("disable LVDS for eDP support\n");
883 if (!intel_lvds_ddc_probe(dev, pin)) {
884 DRM_DEBUG_KMS("LVDS did not respond to DDC probe\n");
888 intel_lvds = kzalloc(sizeof(struct intel_lvds), GFP_KERNEL);
893 intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
894 if (!intel_connector) {
899 if (!HAS_PCH_SPLIT(dev)) {
900 intel_lvds->pfit_control = I915_READ(PFIT_CONTROL);
903 intel_encoder = &intel_lvds->base;
904 encoder = &intel_encoder->base;
905 connector = &intel_connector->base;
906 drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
907 DRM_MODE_CONNECTOR_LVDS);
909 drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
910 DRM_MODE_ENCODER_LVDS);
912 intel_connector_attach_encoder(intel_connector, intel_encoder);
913 intel_encoder->type = INTEL_OUTPUT_LVDS;
915 intel_encoder->clone_mask = (1 << INTEL_LVDS_CLONE_BIT);
916 intel_encoder->crtc_mask = (1 << 1);
917 drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
918 drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
919 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
920 connector->interlace_allowed = false;
921 connector->doublescan_allowed = false;
923 /* create the scaling mode property */
924 drm_mode_create_scaling_mode_property(dev);
926 * the initial panel fitting mode will be FULL_SCREEN.
929 drm_connector_attach_property(&intel_connector->base,
930 dev->mode_config.scaling_mode_property,
931 DRM_MODE_SCALE_ASPECT);
932 intel_lvds->fitting_mode = DRM_MODE_SCALE_ASPECT;
935 * 1) check for EDID on DDC
936 * 2) check for VBT data
937 * 3) check to see if LVDS is already on
938 * if none of the above, no panel
939 * 4) make sure lid is open
940 * if closed, act like it's not there for now
944 * Attempt to get the fixed panel mode from DDC. Assume that the
945 * preferred mode is the right one.
947 intel_lvds->edid = drm_get_edid(connector,
948 &dev_priv->gmbus[pin].adapter);
949 if (intel_lvds->edid) {
950 if (drm_add_edid_modes(connector,
952 drm_mode_connector_update_edid_property(connector,
955 kfree(intel_lvds->edid);
956 intel_lvds->edid = NULL;
959 if (!intel_lvds->edid) {
960 /* Didn't get an EDID, so
961 * Set wide sync ranges so we get all modes
962 * handed to valid_mode for checking
964 connector->display_info.min_vfreq = 0;
965 connector->display_info.max_vfreq = 200;
966 connector->display_info.min_hfreq = 0;
967 connector->display_info.max_hfreq = 200;
970 list_for_each_entry(scan, &connector->probed_modes, head) {
971 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
972 intel_lvds->fixed_mode =
973 drm_mode_duplicate(dev, scan);
974 intel_find_lvds_downclock(dev,
975 intel_lvds->fixed_mode,
981 /* Failed to get EDID, what about VBT? */
982 if (dev_priv->lfp_lvds_vbt_mode) {
983 intel_lvds->fixed_mode =
984 drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
985 if (intel_lvds->fixed_mode) {
986 intel_lvds->fixed_mode->type |=
987 DRM_MODE_TYPE_PREFERRED;
993 * If we didn't get EDID, try checking if the panel is already turned
994 * on. If so, assume that whatever is currently programmed is the
998 /* Ironlake: FIXME if still fail, not try pipe mode now */
999 if (HAS_PCH_SPLIT(dev))
1002 lvds = I915_READ(LVDS);
1003 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1004 crtc = intel_get_crtc_for_pipe(dev, pipe);
1006 if (crtc && (lvds & LVDS_PORT_EN)) {
1007 intel_lvds->fixed_mode = intel_crtc_mode_get(dev, crtc);
1008 if (intel_lvds->fixed_mode) {
1009 intel_lvds->fixed_mode->type |=
1010 DRM_MODE_TYPE_PREFERRED;
1015 /* If we still don't have a mode after all that, give up. */
1016 if (!intel_lvds->fixed_mode)
1020 if (HAS_PCH_SPLIT(dev)) {
1022 /* make sure PWM is enabled */
1023 pwm = I915_READ(BLC_PWM_CPU_CTL2);
1024 pwm |= (PWM_ENABLE | PWM_PIPE_B);
1025 I915_WRITE(BLC_PWM_CPU_CTL2, pwm);
1027 pwm = I915_READ(BLC_PWM_PCH_CTL1);
1028 pwm |= PWM_PCH_ENABLE;
1029 I915_WRITE(BLC_PWM_PCH_CTL1, pwm);
1031 dev_priv->lid_notifier.notifier_call = intel_lid_notify;
1032 if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
1033 DRM_DEBUG_KMS("lid notifier registration failed\n");
1034 dev_priv->lid_notifier.notifier_call = NULL;
1036 /* keep the LVDS connector */
1037 dev_priv->int_lvds_connector = connector;
1038 drm_sysfs_connector_add(connector);
1042 DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1043 drm_connector_cleanup(connector);
1044 drm_encoder_cleanup(encoder);
1046 kfree(intel_connector);