drivers/gpu/drm/i915/intel_lvds.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *      Eric Anholt <eric@anholt.net>
  26  *      Dave Airlie <airlied@linux.ie>
  27  *      Jesse Barnes <jesse.barnes@intel.com>
  28  */
  29
  30 #include <acpi/button.h>
  31 #include <linux/dmi.h>
  32 #include <linux/i2c.h>
  33 #include <linux/slab.h>
  34 #include "drmP.h"
  35 #include "drm.h"
  36 #include "drm_crtc.h"
  37 #include "drm_edid.h"
  38 #include "intel_drv.h"
  39 #include "i915_drm.h"
  40 #include "i915_drv.h"
  41 #include <linux/acpi.h>
  42
  43 /* Private structure for the integrated LVDS support */
  44 struct intel_lvds {
  45         struct intel_encoder base;
  46
  47         struct edid *edid;
  48
  49         int fitting_mode;
  50         u32 pfit_control;
  51         u32 pfit_pgm_ratios;
  52         bool pfit_dirty;
  53
  54         struct drm_display_mode *fixed_mode;
  55 };
  56
  57 static struct intel_lvds *to_intel_lvds(struct drm_encoder *encoder)
  58 {
  59         return container_of(encoder, struct intel_lvds, base.base);
  60 }
  61
  62 static struct intel_lvds *intel_attached_lvds(struct drm_connector *connector)
  63 {
  64         return container_of(intel_attached_encoder(connector),
  65                             struct intel_lvds, base);
  66 }
  67
  68 /**
  69  * Sets the power state for the panel.
  70  */
  71 static void intel_lvds_enable(struct intel_lvds *intel_lvds)
  72 {
  73         struct drm_device *dev = intel_lvds->base.base.dev;
  74         struct drm_i915_private *dev_priv = dev->dev_private;
  75         u32 ctl_reg, lvds_reg;
  76
  77         if (HAS_PCH_SPLIT(dev)) {
  78                 ctl_reg = PCH_PP_CONTROL;
  79                 lvds_reg = PCH_LVDS;
  80         } else {
  81                 ctl_reg = PP_CONTROL;
  82                 lvds_reg = LVDS;
  83         }
  84
  85         I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
  86
  87         if (intel_lvds->pfit_dirty) {
  88                 /*
  89                  * Enable automatic panel scaling so that non-native modes
  90                  * fill the screen.  The panel fitter should only be
  91                  * adjusted whilst the pipe is disabled, according to
  92                  * register description and PRM.
  93                  */
  94                 DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n",
  95                               intel_lvds->pfit_control,
  96                               intel_lvds->pfit_pgm_ratios);
  97                 if (wait_for((I915_READ(PP_STATUS) & PP_ON) == 0, 1000)) {
  98                         DRM_ERROR("timed out waiting for panel to power off\n");
  99                 } else {
 100                         I915_WRITE(PFIT_PGM_RATIOS, intel_lvds->pfit_pgm_ratios);
 101                         I915_WRITE(PFIT_CONTROL, intel_lvds->pfit_control);
 102                         intel_lvds->pfit_dirty = false;
 103                 }
 104         }
 105
 106         I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
 107         POSTING_READ(lvds_reg);
 108
 109         intel_panel_set_backlight(dev, dev_priv->backlight_level);
 110 }
 111
 112 static void intel_lvds_disable(struct intel_lvds *intel_lvds)
 113 {
 114         struct drm_device *dev = intel_lvds->base.base.dev;
 115         struct drm_i915_private *dev_priv = dev->dev_private;
 116         u32 ctl_reg, lvds_reg;
 117
 118         if (HAS_PCH_SPLIT(dev)) {
 119                 ctl_reg = PCH_PP_CONTROL;
 120                 lvds_reg = PCH_LVDS;
 121         } else {
 122                 ctl_reg = PP_CONTROL;
 123                 lvds_reg = LVDS;
 124         }
 125
 126         dev_priv->backlight_level = intel_panel_get_backlight(dev);
 127         intel_panel_set_backlight(dev, 0);
 128
 129         I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
 130
 131         if (intel_lvds->pfit_control) {
 132                 if (wait_for((I915_READ(PP_STATUS) & PP_ON) == 0, 1000))
 133                         DRM_ERROR("timed out waiting for panel to power off\n");
 134
 135                 I915_WRITE(PFIT_CONTROL, 0);
 136                 intel_lvds->pfit_dirty = true;
 137         }
 138
 139         I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
 140         POSTING_READ(lvds_reg);
 141 }
 142
 143 static void intel_lvds_dpms(struct drm_encoder *encoder, int mode)
 144 {
 145         struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
 146
 147         if (mode == DRM_MODE_DPMS_ON)
 148                 intel_lvds_enable(intel_lvds);
 149         else
 150                 intel_lvds_disable(intel_lvds);
 151
 152         /* XXX: We never power down the LVDS pairs. */
 153 }
 154
 155 static int intel_lvds_mode_valid(struct drm_connector *connector,
 156                                  struct drm_display_mode *mode)
 157 {
 158         struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
 159         struct drm_display_mode *fixed_mode = intel_lvds->fixed_mode;
 160
 161         if (mode->hdisplay > fixed_mode->hdisplay)
 162                 return MODE_PANEL;
 163         if (mode->vdisplay > fixed_mode->vdisplay)
 164                 return MODE_PANEL;
 165
 166         return MODE_OK;
 167 }
 168
 169 static void
 170 centre_horizontally(struct drm_display_mode *mode,
 171                     int width)
 172 {
 173         u32 border, sync_pos, blank_width, sync_width;
 174
 175         /* keep the hsync and hblank widths constant */
 176         sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
 177         blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
 178         sync_pos = (blank_width - sync_width + 1) / 2;
 179
 180         border = (mode->hdisplay - width + 1) / 2;
 181         border += border & 1; /* make the border even */
 182
 183         mode->crtc_hdisplay = width;
 184         mode->crtc_hblank_start = width + border;
 185         mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
 186
 187         mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
 188         mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
 189 }
 190
 191 static void
 192 centre_vertically(struct drm_display_mode *mode,
 193                   int height)
 194 {
 195         u32 border, sync_pos, blank_width, sync_width;
 196
 197         /* keep the vsync and vblank widths constant */
 198         sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
 199         blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
 200         sync_pos = (blank_width - sync_width + 1) / 2;
 201
 202         border = (mode->vdisplay - height + 1) / 2;
 203
 204         mode->crtc_vdisplay = height;
 205         mode->crtc_vblank_start = height + border;
 206         mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
 207
 208         mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
 209         mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
 210 }
 211
 212 static inline u32 panel_fitter_scaling(u32 source, u32 target)
 213 {
 214         /*
 215          * Floating point operation is not supported. So the FACTOR
 216          * is defined, which can avoid the floating point computation
 217          * when calculating the panel ratio.
 218          */
 219 #define ACCURACY 12
 220 #define FACTOR (1 << ACCURACY)
 221         u32 ratio = source * FACTOR / target;
 222         return (FACTOR * ratio + FACTOR/2) / FACTOR;
 223 }
 224
 225 static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
 226                                   struct drm_display_mode *mode,
 227                                   struct drm_display_mode *adjusted_mode)
 228 {
 229         struct drm_device *dev = encoder->dev;
 230         struct drm_i915_private *dev_priv = dev->dev_private;
 231         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
 232         struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
 233         struct drm_encoder *tmp_encoder;
 234         u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
 235
 236         /* Should never happen!! */
 237         if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
 238                 DRM_ERROR("Can't support LVDS on pipe A\n");
 239                 return false;
 240         }
 241
 242         /* Should never happen!! */
 243         list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) {
 244                 if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) {
 245                         DRM_ERROR("Can't enable LVDS and another "
 246                                "encoder on the same pipe\n");
 247                         return false;
 248                 }
 249         }
 250
 251         /*
 252          * We have timings from the BIOS for the panel, put them in
 253          * to the adjusted mode.  The CRTC will be set up for this mode,
 254          * with the panel scaling set up to source from the H/VDisplay
 255          * of the original mode.
 256          */
 257         intel_fixed_panel_mode(intel_lvds->fixed_mode, adjusted_mode);
 258
 259         if (HAS_PCH_SPLIT(dev)) {
 260                 intel_pch_panel_fitting(dev, intel_lvds->fitting_mode,
 261                                         mode, adjusted_mode);
 262                 return true;
 263         }
 264
 265         /* Make sure pre-965s set dither correctly */
 266         if (INTEL_INFO(dev)->gen < 4) {
 267                 if (dev_priv->lvds_dither)
 268                         pfit_control |= PANEL_8TO6_DITHER_ENABLE;
 269         }
 270
 271         /* Native modes don't need fitting */
 272         if (adjusted_mode->hdisplay == mode->hdisplay &&
 273             adjusted_mode->vdisplay == mode->vdisplay)
 274                 goto out;
 275
 276         /* 965+ wants fuzzy fitting */
 277         if (INTEL_INFO(dev)->gen >= 4)
 278                 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
 279                                  PFIT_FILTER_FUZZY);
 280
 281         /*
 282          * Enable automatic panel scaling for non-native modes so that they fill
 283          * the screen.  Should be enabled before the pipe is enabled, according
 284          * to register description and PRM.
 285          * Change the value here to see the borders for debugging
 286          */
 287         I915_WRITE(BCLRPAT_A, 0);
 288         I915_WRITE(BCLRPAT_B, 0);
 289
 290         switch (intel_lvds->fitting_mode) {
 291         case DRM_MODE_SCALE_CENTER:
 292                 /*
 293                  * For centered modes, we have to calculate border widths &
 294                  * heights and modify the values programmed into the CRTC.
 295                  */
 296                 centre_horizontally(adjusted_mode, mode->hdisplay);
 297                 centre_vertically(adjusted_mode, mode->vdisplay);
 298                 border = LVDS_BORDER_ENABLE;
 299                 break;
 300
 301         case DRM_MODE_SCALE_ASPECT:
 302                 /* Scale but preserve the aspect ratio */
 303                 if (INTEL_INFO(dev)->gen >= 4) {
 304                         u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
 305                         u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
 306
 307                         pfit_control |= PFIT_ENABLE;
 308                         /* 965+ is easy, it does everything in hw */
 309                         if (scaled_width > scaled_height)
 310                                 pfit_control |= PFIT_SCALING_PILLAR;
 311                         else if (scaled_width < scaled_height)
 312                                 pfit_control |= PFIT_SCALING_LETTER;
 313                         else
 314                                 pfit_control |= PFIT_SCALING_AUTO;
 315                 } else {
 316                         u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
 317                         u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
 318                         /*
 319                          * For earlier chips we have to calculate the scaling
 320                          * ratio by hand and program it into the
 321                          * PFIT_PGM_RATIO register
 322                          */
 323                         if (scaled_width > scaled_height) { /* pillar */
 324                                 centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay);
 325
 326                                 border = LVDS_BORDER_ENABLE;
 327                                 if (mode->vdisplay != adjusted_mode->vdisplay) {
 328                                         u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
 329                                         pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
 330                                                             bits << PFIT_VERT_SCALE_SHIFT);
 331                                         pfit_control |= (PFIT_ENABLE |
 332                                                          VERT_INTERP_BILINEAR |
 333                                                          HORIZ_INTERP_BILINEAR);
 334                                 }
 335                         } else if (scaled_width < scaled_height) { /* letter */
 336                                 centre_vertically(adjusted_mode, scaled_width / mode->hdisplay);
 337
 338                                 border = LVDS_BORDER_ENABLE;
 339                                 if (mode->hdisplay != adjusted_mode->hdisplay) {
 340                                         u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
 341                                         pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
 342                                                             bits << PFIT_VERT_SCALE_SHIFT);
 343                                         pfit_control |= (PFIT_ENABLE |
 344                                                          VERT_INTERP_BILINEAR |
 345                                                          HORIZ_INTERP_BILINEAR);
 346                                 }
 347                         } else
 348                                 /* Aspects match, Let hw scale both directions */
 349                                 pfit_control |= (PFIT_ENABLE |
 350                                                  VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
 351                                                  VERT_INTERP_BILINEAR |
 352                                                  HORIZ_INTERP_BILINEAR);
 353                 }
 354                 break;
 355
 356         case DRM_MODE_SCALE_FULLSCREEN:
 357                 /*
 358                  * Full scaling, even if it changes the aspect ratio.
 359                  * Fortunately this is all done for us in hw.
 360                  */
 361                 pfit_control |= PFIT_ENABLE;
 362                 if (INTEL_INFO(dev)->gen >= 4)
 363                         pfit_control |= PFIT_SCALING_AUTO;
 364                 else
 365                         pfit_control |= (VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
 366                                          VERT_INTERP_BILINEAR |
 367                                          HORIZ_INTERP_BILINEAR);
 368                 break;
 369
 370         default:
 371                 break;
 372         }
 373
 374 out:
 375         if (pfit_control != intel_lvds->pfit_control ||
 376             pfit_pgm_ratios != intel_lvds->pfit_pgm_ratios) {
 377                 intel_lvds->pfit_control = pfit_control;
 378                 intel_lvds->pfit_pgm_ratios = pfit_pgm_ratios;
 379                 intel_lvds->pfit_dirty = true;
 380         }
 381         dev_priv->lvds_border_bits = border;
 382
 383         /*
 384          * XXX: It would be nice to support lower refresh rates on the
 385          * panels to reduce power consumption, and perhaps match the
 386          * user's requested refresh rate.
 387          */
 388
 389         return true;
 390 }
 391
 392 static void intel_lvds_prepare(struct drm_encoder *encoder)
 393 {
 394         struct drm_device *dev = encoder->dev;
 395         struct drm_i915_private *dev_priv = dev->dev_private;
 396         struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
 397
 398         dev_priv->backlight_level = intel_panel_get_backlight(dev);
 399
 400         /* We try to do the minimum that is necessary in order to unlock
 401          * the registers for mode setting.
 402          *
 403          * On Ironlake, this is quite simple as we just set the unlock key
 404          * and ignore all subtleties. (This may cause some issues...)
 405          *
 406          * Prior to Ironlake, we must disable the pipe if we want to adjust
 407          * the panel fitter. However at all other times we can just reset
 408          * the registers regardless.
 409          */
 410
 411         if (HAS_PCH_SPLIT(dev)) {
 412                 I915_WRITE(PCH_PP_CONTROL,
 413                            I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
 414         } else if (intel_lvds->pfit_dirty) {
 415                 I915_WRITE(PP_CONTROL,
 416                            (I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS)
 417                            & ~POWER_TARGET_ON);
 418         } else {
 419                 I915_WRITE(PP_CONTROL,
 420                            I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
 421         }
 422 }
 423
 424 static void intel_lvds_commit(struct drm_encoder *encoder)
 425 {
 426         struct drm_device *dev = encoder->dev;
 427         struct drm_i915_private *dev_priv = dev->dev_private;
 428         struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
 429
 430         if (dev_priv->backlight_level == 0)
 431                 dev_priv->backlight_level = intel_panel_get_max_backlight(dev);
 432
 433         /* Undo any unlocking done in prepare to prevent accidental
 434          * adjustment of the registers.
 435          */
 436         if (HAS_PCH_SPLIT(dev)) {
 437                 u32 val = I915_READ(PCH_PP_CONTROL);
 438                 if ((val & PANEL_UNLOCK_REGS) == PANEL_UNLOCK_REGS)
 439                         I915_WRITE(PCH_PP_CONTROL, val & 0x3);
 440         } else {
 441                 u32 val = I915_READ(PP_CONTROL);
 442                 if ((val & PANEL_UNLOCK_REGS) == PANEL_UNLOCK_REGS)
 443                         I915_WRITE(PP_CONTROL, val & 0x3);
 444         }
 445
 446         /* Always do a full power on as we do not know what state
 447          * we were left in.
 448          */
 449         intel_lvds_enable(intel_lvds);
 450 }
 451
 452 static void intel_lvds_mode_set(struct drm_encoder *encoder,
 453                                 struct drm_display_mode *mode,
 454                                 struct drm_display_mode *adjusted_mode)
 455 {
 456         /*
 457          * The LVDS pin pair will already have been turned on in the
 458          * intel_crtc_mode_set since it has a large impact on the DPLL
 459          * settings.
 460          */
 461 }
 462
 463 /**
 464  * Detect the LVDS connection.
 465  *
 466  * Since LVDS doesn't have hotlug, we use the lid as a proxy.  Open means
 467  * connected and closed means disconnected.  We also send hotplug events as
 468  * needed, using lid status notification from the input layer.
 469  */
 470 static enum drm_connector_status
 471 intel_lvds_detect(struct drm_connector *connector, bool force)
 472 {
 473         struct drm_device *dev = connector->dev;
 474         enum drm_connector_status status = connector_status_connected;
 475
 476         /* ACPI lid methods were generally unreliable in this generation, so
 477          * don't even bother.
 478          */
 479         if (IS_GEN2(dev) || IS_GEN3(dev))
 480                 return connector_status_connected;
 481
 482         return status;
 483 }
 484
 485 /**
 486  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
 487  */
 488 static int intel_lvds_get_modes(struct drm_connector *connector)
 489 {
 490         struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
 491         struct drm_device *dev = connector->dev;
 492         struct drm_display_mode *mode;
 493
 494         if (intel_lvds->edid)
 495                 return drm_add_edid_modes(connector, intel_lvds->edid);
 496
 497         mode = drm_mode_duplicate(dev, intel_lvds->fixed_mode);
 498         if (mode == 0)
 499                 return 0;
 500
 501         drm_mode_probed_add(connector, mode);
 502         return 1;
 503 }
 504
 505 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
 506 {
 507         DRM_DEBUG_KMS("Skipping forced modeset for %s\n", id->ident);
 508         return 1;
 509 }
 510
 511 /* The GPU hangs up on these systems if modeset is performed on LID open */
 512 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
 513         {
 514                 .callback = intel_no_modeset_on_lid_dmi_callback,
 515                 .ident = "Toshiba Tecra A11",
 516                 .matches = {
 517                         DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
 518                         DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
 519                 },
 520         },
 521
 522         { }     /* terminating entry */
 523 };
 524
 525 /*
 526  * Lid events. Note the use of 'modeset_on_lid':
 527  *  - we set it on lid close, and reset it on open
 528  *  - we use it as a "only once" bit (ie we ignore
 529  *    duplicate events where it was already properly
 530  *    set/reset)
 531  *  - the suspend/resume paths will also set it to
 532  *    zero, since they restore the mode ("lid open").
 533  */
 534 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
 535                             void *unused)
 536 {
 537         struct drm_i915_private *dev_priv =
 538                 container_of(nb, struct drm_i915_private, lid_notifier);
 539         struct drm_device *dev = dev_priv->dev;
 540         struct drm_connector *connector = dev_priv->int_lvds_connector;
 541
 542         /*
 543          * check and update the status of LVDS connector after receiving
 544          * the LID nofication event.
 545          */
 546         if (connector)
 547                 connector->status = connector->funcs->detect(connector,
 548                                                              false);
 549
 550         /* Don't force modeset on machines where it causes a GPU lockup */
 551         if (dmi_check_system(intel_no_modeset_on_lid))
 552                 return NOTIFY_OK;
 553         if (!acpi_lid_open()) {
 554                 dev_priv->modeset_on_lid = 1;
 555                 return NOTIFY_OK;
 556         }
 557
 558         if (!dev_priv->modeset_on_lid)
 559                 return NOTIFY_OK;
 560
 561         dev_priv->modeset_on_lid = 0;
 562
 563         mutex_lock(&dev->mode_config.mutex);
 564         drm_helper_resume_force_mode(dev);
 565         mutex_unlock(&dev->mode_config.mutex);
 566
 567         return NOTIFY_OK;
 568 }
 569
 570 /**
 571  * intel_lvds_destroy - unregister and free LVDS structures
 572  * @connector: connector to free
 573  *
 574  * Unregister the DDC bus for this connector then free the driver private
 575  * structure.
 576  */
 577 static void intel_lvds_destroy(struct drm_connector *connector)
 578 {
 579         struct drm_device *dev = connector->dev;
 580         struct drm_i915_private *dev_priv = dev->dev_private;
 581
 582         if (dev_priv->lid_notifier.notifier_call)
 583                 acpi_lid_notifier_unregister(&dev_priv->lid_notifier);
 584         drm_sysfs_connector_remove(connector);
 585         drm_connector_cleanup(connector);
 586         kfree(connector);
 587 }
 588
 589 static int intel_lvds_set_property(struct drm_connector *connector,
 590                                    struct drm_property *property,
 591                                    uint64_t value)
 592 {
 593         struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
 594         struct drm_device *dev = connector->dev;
 595
 596         if (property == dev->mode_config.scaling_mode_property) {
 597                 struct drm_crtc *crtc = intel_lvds->base.base.crtc;
 598
 599                 if (value == DRM_MODE_SCALE_NONE) {
 600                         DRM_DEBUG_KMS("no scaling not supported\n");
 601                         return -EINVAL;
 602                 }
 603
 604                 if (intel_lvds->fitting_mode == value) {
 605                         /* the LVDS scaling property is not changed */
 606                         return 0;
 607                 }
 608                 intel_lvds->fitting_mode = value;
 609                 if (crtc && crtc->enabled) {
 610                         /*
 611                          * If the CRTC is enabled, the display will be changed
 612                          * according to the new panel fitting mode.
 613                          */
 614                         drm_crtc_helper_set_mode(crtc, &crtc->mode,
 615                                 crtc->x, crtc->y, crtc->fb);
 616                 }
 617         }
 618
 619         return 0;
 620 }
 621
 622 static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
 623         .dpms = intel_lvds_dpms,
 624         .mode_fixup = intel_lvds_mode_fixup,
 625         .prepare = intel_lvds_prepare,
 626         .mode_set = intel_lvds_mode_set,
 627         .commit = intel_lvds_commit,
 628 };
 629
 630 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
 631         .get_modes = intel_lvds_get_modes,
 632         .mode_valid = intel_lvds_mode_valid,
 633         .best_encoder = intel_best_encoder,
 634 };
 635
 636 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
 637         .dpms = drm_helper_connector_dpms,
 638         .detect = intel_lvds_detect,
 639         .fill_modes = drm_helper_probe_single_connector_modes,
 640         .set_property = intel_lvds_set_property,
 641         .destroy = intel_lvds_destroy,
 642 };
 643
 644 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
 645         .destroy = intel_encoder_destroy,
 646 };
 647
 648 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
 649 {
 650         DRM_DEBUG_KMS("Skipping LVDS initialization for %s\n", id->ident);
 651         return 1;
 652 }
 653
 654 /* These systems claim to have LVDS, but really don't */
 655 static const struct dmi_system_id intel_no_lvds[] = {
 656         {
 657                 .callback = intel_no_lvds_dmi_callback,
 658                 .ident = "Apple Mac Mini (Core series)",
 659                 .matches = {
 660                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 661                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
 662                 },
 663         },
 664         {
 665                 .callback = intel_no_lvds_dmi_callback,
 666                 .ident = "Apple Mac Mini (Core 2 series)",
 667                 .matches = {
 668                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 669                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
 670                 },
 671         },
 672         {
 673                 .callback = intel_no_lvds_dmi_callback,
 674                 .ident = "MSI IM-945GSE-A",
 675                 .matches = {
 676                         DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
 677                         DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
 678                 },
 679         },
 680         {
 681                 .callback = intel_no_lvds_dmi_callback,
 682                 .ident = "Dell Studio Hybrid",
 683                 .matches = {
 684                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 685                         DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
 686                 },
 687         },
 688         {
 689                 .callback = intel_no_lvds_dmi_callback,
 690                 .ident = "AOpen Mini PC",
 691                 .matches = {
 692                         DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
 693                         DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
 694                 },
 695         },
 696         {
 697                 .callback = intel_no_lvds_dmi_callback,
 698                 .ident = "AOpen Mini PC MP915",
 699                 .matches = {
 700                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 701                         DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
 702                 },
 703         },
 704         {
 705                 .callback = intel_no_lvds_dmi_callback,
 706                 .ident = "Aopen i945GTt-VFA",
 707                 .matches = {
 708                         DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
 709                 },
 710         },
 711         {
 712                 .callback = intel_no_lvds_dmi_callback,
 713                 .ident = "Clientron U800",
 714                 .matches = {
 715                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
 716                         DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
 717                 },
 718         },
 719
 720         { }     /* terminating entry */
 721 };
 722
 723 /**
 724  * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
 725  * @dev: drm device
 726  * @connector: LVDS connector
 727  *
 728  * Find the reduced downclock for LVDS in EDID.
 729  */
 730 static void intel_find_lvds_downclock(struct drm_device *dev,
 731                                       struct drm_display_mode *fixed_mode,
 732                                       struct drm_connector *connector)
 733 {
 734         struct drm_i915_private *dev_priv = dev->dev_private;
 735         struct drm_display_mode *scan;
 736         int temp_downclock;
 737
 738         temp_downclock = fixed_mode->clock;
 739         list_for_each_entry(scan, &connector->probed_modes, head) {
 740                 /*
 741                  * If one mode has the same resolution with the fixed_panel
 742                  * mode while they have the different refresh rate, it means
 743                  * that the reduced downclock is found for the LVDS. In such
 744                  * case we can set the different FPx0/1 to dynamically select
 745                  * between low and high frequency.
 746                  */
 747                 if (scan->hdisplay == fixed_mode->hdisplay &&
 748                     scan->hsync_start == fixed_mode->hsync_start &&
 749                     scan->hsync_end == fixed_mode->hsync_end &&
 750                     scan->htotal == fixed_mode->htotal &&
 751                     scan->vdisplay == fixed_mode->vdisplay &&
 752                     scan->vsync_start == fixed_mode->vsync_start &&
 753                     scan->vsync_end == fixed_mode->vsync_end &&
 754                     scan->vtotal == fixed_mode->vtotal) {
 755                         if (scan->clock < temp_downclock) {
 756                                 /*
 757                                  * The downclock is already found. But we
 758                                  * expect to find the lower downclock.
 759                                  */
 760                                 temp_downclock = scan->clock;
 761                         }
 762                 }
 763         }
 764         if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
 765                 /* We found the downclock for LVDS. */
 766                 dev_priv->lvds_downclock_avail = 1;
 767                 dev_priv->lvds_downclock = temp_downclock;
 768                 DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
 769                               "Normal clock %dKhz, downclock %dKhz\n",
 770                               fixed_mode->clock, temp_downclock);
 771         }
 772 }
 773
 774 /*
 775  * Enumerate the child dev array parsed from VBT to check whether
 776  * the LVDS is present.
 777  * If it is present, return 1.
 778  * If it is not present, return false.
 779  * If no child dev is parsed from VBT, it assumes that the LVDS is present.
 780  */
 781 static bool lvds_is_present_in_vbt(struct drm_device *dev,
 782                                    u8 *i2c_pin)
 783 {
 784         struct drm_i915_private *dev_priv = dev->dev_private;
 785         int i;
 786
 787         if (!dev_priv->child_dev_num)
 788                 return true;
 789
 790         for (i = 0; i < dev_priv->child_dev_num; i++) {
 791                 struct child_device_config *child = dev_priv->child_dev + i;
 792
 793                 /* If the device type is not LFP, continue.
 794                  * We have to check both the new identifiers as well as the
 795                  * old for compatibility with some BIOSes.
 796                  */
 797                 if (child->device_type != DEVICE_TYPE_INT_LFP &&
 798                     child->device_type != DEVICE_TYPE_LFP)
 799                         continue;
 800
 801                 if (child->i2c_pin)
 802                     *i2c_pin = child->i2c_pin;
 803
 804                 /* However, we cannot trust the BIOS writers to populate
 805                  * the VBT correctly.  Since LVDS requires additional
 806                  * information from AIM blocks, a non-zero addin offset is
 807                  * a good indicator that the LVDS is actually present.
 808                  */
 809                 if (child->addin_offset)
 810                         return true;
 811
 812                 /* But even then some BIOS writers perform some black magic
 813                  * and instantiate the device without reference to any
 814                  * additional data.  Trust that if the VBT was written into
 815                  * the OpRegion then they have validated the LVDS's existence.
 816                  */
 817                 if (dev_priv->opregion.vbt)
 818                         return true;
 819         }
 820
 821         return false;
 822 }
 823
 824 static bool intel_lvds_ddc_probe(struct drm_device *dev, u8 pin)
 825 {
 826         struct drm_i915_private *dev_priv = dev->dev_private;
 827         u8 buf = 0;
 828         struct i2c_msg msgs[] = {
 829                 {
 830                         .addr = 0xA0,
 831                         .flags = 0,
 832                         .len = 1,
 833                         .buf = &buf,
 834                 },
 835         };
 836         struct i2c_adapter *i2c = &dev_priv->gmbus[pin].adapter;
 837         /* XXX this only appears to work when using GMBUS */
 838         if (intel_gmbus_is_forced_bit(i2c))
 839                 return true;
 840         return i2c_transfer(i2c, msgs, 1) == 1;
 841 }
 842
 843 /**
 844  * intel_lvds_init - setup LVDS connectors on this device
 845  * @dev: drm device
 846  *
 847  * Create the connector, register the LVDS DDC bus, and try to figure out what
 848  * modes we can display on the LVDS panel (if present).
 849  */
 850 bool intel_lvds_init(struct drm_device *dev)
 851 {
 852         struct drm_i915_private *dev_priv = dev->dev_private;
 853         struct intel_lvds *intel_lvds;
 854         struct intel_encoder *intel_encoder;
 855         struct intel_connector *intel_connector;
 856         struct drm_connector *connector;
 857         struct drm_encoder *encoder;
 858         struct drm_display_mode *scan; /* *modes, *bios_mode; */
 859         struct drm_crtc *crtc;
 860         u32 lvds;
 861         int pipe;
 862         u8 pin;
 863
 864         /* Skip init on machines we know falsely report LVDS */
 865         if (dmi_check_system(intel_no_lvds))
 866                 return false;
 867
 868         pin = GMBUS_PORT_PANEL;
 869         if (!lvds_is_present_in_vbt(dev, &pin)) {
 870                 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
 871                 return false;
 872         }
 873
 874         if (HAS_PCH_SPLIT(dev)) {
 875                 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
 876                         return false;
 877                 if (dev_priv->edp.support) {
 878                         DRM_DEBUG_KMS("disable LVDS for eDP support\n");
 879                         return false;
 880                 }
 881         }
 882
 883         if (!intel_lvds_ddc_probe(dev, pin)) {
 884                 DRM_DEBUG_KMS("LVDS did not respond to DDC probe\n");
 885                 return false;
 886         }
 887
 888         intel_lvds = kzalloc(sizeof(struct intel_lvds), GFP_KERNEL);
 889         if (!intel_lvds) {
 890                 return false;
 891         }
 892
 893         intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
 894         if (!intel_connector) {
 895                 kfree(intel_lvds);
 896                 return false;
 897         }
 898
 899         if (!HAS_PCH_SPLIT(dev)) {
 900                 intel_lvds->pfit_control = I915_READ(PFIT_CONTROL);
 901         }
 902
 903         intel_encoder = &intel_lvds->base;
 904         encoder = &intel_encoder->base;
 905         connector = &intel_connector->base;
 906         drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
 907                            DRM_MODE_CONNECTOR_LVDS);
 908
 909         drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
 910                          DRM_MODE_ENCODER_LVDS);
 911
 912         intel_connector_attach_encoder(intel_connector, intel_encoder);
 913         intel_encoder->type = INTEL_OUTPUT_LVDS;
 914
 915         intel_encoder->clone_mask = (1 << INTEL_LVDS_CLONE_BIT);
 916         intel_encoder->crtc_mask = (1 << 1);
 917         drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
 918         drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
 919         connector->display_info.subpixel_order = SubPixelHorizontalRGB;
 920         connector->interlace_allowed = false;
 921         connector->doublescan_allowed = false;
 922
 923         /* create the scaling mode property */
 924         drm_mode_create_scaling_mode_property(dev);
 925         /*
 926          * the initial panel fitting mode will be FULL_SCREEN.
 927          */
 928
 929         drm_connector_attach_property(&intel_connector->base,
 930                                       dev->mode_config.scaling_mode_property,
 931                                       DRM_MODE_SCALE_ASPECT);
 932         intel_lvds->fitting_mode = DRM_MODE_SCALE_ASPECT;
 933         /*
 934          * LVDS discovery:
 935          * 1) check for EDID on DDC
 936          * 2) check for VBT data
 937          * 3) check to see if LVDS is already on
 938          *    if none of the above, no panel
 939          * 4) make sure lid is open
 940          *    if closed, act like it's not there for now
 941          */
 942
 943         /*
 944          * Attempt to get the fixed panel mode from DDC.  Assume that the
 945          * preferred mode is the right one.
 946          */
 947         intel_lvds->edid = drm_get_edid(connector,
 948                                         &dev_priv->gmbus[pin].adapter);
 949         if (intel_lvds->edid) {
 950                 if (drm_add_edid_modes(connector,
 951                                        intel_lvds->edid)) {
 952                         drm_mode_connector_update_edid_property(connector,
 953                                                                 intel_lvds->edid);
 954                 } else {
 955                         kfree(intel_lvds->edid);
 956                         intel_lvds->edid = NULL;
 957                 }
 958         }
 959         if (!intel_lvds->edid) {
 960                 /* Didn't get an EDID, so
 961                  * Set wide sync ranges so we get all modes
 962                  * handed to valid_mode for checking
 963                  */
 964                 connector->display_info.min_vfreq = 0;
 965                 connector->display_info.max_vfreq = 200;
 966                 connector->display_info.min_hfreq = 0;
 967                 connector->display_info.max_hfreq = 200;
 968         }
 969
 970         list_for_each_entry(scan, &connector->probed_modes, head) {
 971                 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
 972                         intel_lvds->fixed_mode =
 973                                 drm_mode_duplicate(dev, scan);
 974                         intel_find_lvds_downclock(dev,
 975                                                   intel_lvds->fixed_mode,
 976                                                   connector);
 977                         goto out;
 978                 }
 979         }
 980
 981         /* Failed to get EDID, what about VBT? */
 982         if (dev_priv->lfp_lvds_vbt_mode) {
 983                 intel_lvds->fixed_mode =
 984                         drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
 985                 if (intel_lvds->fixed_mode) {
 986                         intel_lvds->fixed_mode->type |=
 987                                 DRM_MODE_TYPE_PREFERRED;
 988                         goto out;
 989                 }
 990         }
 991
 992         /*
 993          * If we didn't get EDID, try checking if the panel is already turned
 994          * on.  If so, assume that whatever is currently programmed is the
 995          * correct mode.
 996          */
 997
 998         /* Ironlake: FIXME if still fail, not try pipe mode now */
 999         if (HAS_PCH_SPLIT(dev))
1000                 goto failed;
1001
1002         lvds = I915_READ(LVDS);
1003         pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1004         crtc = intel_get_crtc_for_pipe(dev, pipe);
1005
1006         if (crtc && (lvds & LVDS_PORT_EN)) {
1007                 intel_lvds->fixed_mode = intel_crtc_mode_get(dev, crtc);
1008                 if (intel_lvds->fixed_mode) {
1009                         intel_lvds->fixed_mode->type |=
1010                                 DRM_MODE_TYPE_PREFERRED;
1011                         goto out;
1012                 }
1013         }
1014
1015         /* If we still don't have a mode after all that, give up. */
1016         if (!intel_lvds->fixed_mode)
1017                 goto failed;
1018
1019 out:
1020         if (HAS_PCH_SPLIT(dev)) {
1021                 u32 pwm;
1022                 /* make sure PWM is enabled */
1023                 pwm = I915_READ(BLC_PWM_CPU_CTL2);
1024                 pwm |= (PWM_ENABLE | PWM_PIPE_B);
1025                 I915_WRITE(BLC_PWM_CPU_CTL2, pwm);
1026
1027                 pwm = I915_READ(BLC_PWM_PCH_CTL1);
1028                 pwm |= PWM_PCH_ENABLE;
1029                 I915_WRITE(BLC_PWM_PCH_CTL1, pwm);
1030         }
1031         dev_priv->lid_notifier.notifier_call = intel_lid_notify;
1032         if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
1033                 DRM_DEBUG_KMS("lid notifier registration failed\n");
1034                 dev_priv->lid_notifier.notifier_call = NULL;
1035         }
1036         /* keep the LVDS connector */
1037         dev_priv->int_lvds_connector = connector;
1038         drm_sysfs_connector_add(connector);
1039         return true;
1040
1041 failed:
1042         DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1043         drm_connector_cleanup(connector);
1044         drm_encoder_cleanup(encoder);
1045         kfree(intel_lvds);
1046         kfree(intel_connector);
1047         return false;
1048 }