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1 /*
2  * Copyright © 2006-2007 Intel Corporation
3  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice (including the next
13  * paragraph) shall be included in all copies or substantial portions of the
14  * Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22  * DEALINGS IN THE SOFTWARE.
23  *
24  * Authors:
25  *      Eric Anholt <eric@anholt.net>
26  *      Dave Airlie <airlied@linux.ie>
27  *      Jesse Barnes <jesse.barnes@intel.com>
28  */
29
30 #include <acpi/button.h>
31 #include <linux/dmi.h>
32 #include <linux/i2c.h>
33 #include <linux/slab.h>
34 #include "drmP.h"
35 #include "drm.h"
36 #include "drm_crtc.h"
37 #include "drm_edid.h"
38 #include "intel_drv.h"
39 #include "i915_drm.h"
40 #include "i915_drv.h"
41 #include <linux/acpi.h>
42
43 /* Private structure for the integrated LVDS support */
44 struct intel_lvds {
45         struct intel_encoder base;
46
47         struct edid *edid;
48
49         int fitting_mode;
50         u32 pfit_control;
51         u32 pfit_pgm_ratios;
52         bool pfit_dirty;
53
54         struct drm_display_mode *fixed_mode;
55 };
56
57 static struct intel_lvds *to_intel_lvds(struct drm_encoder *encoder)
58 {
59         return container_of(encoder, struct intel_lvds, base.base);
60 }
61
62 static struct intel_lvds *intel_attached_lvds(struct drm_connector *connector)
63 {
64         return container_of(intel_attached_encoder(connector),
65                             struct intel_lvds, base);
66 }
67
68 /**
69  * Sets the power state for the panel.
70  */
71 static void intel_lvds_enable(struct intel_lvds *intel_lvds)
72 {
73         struct drm_device *dev = intel_lvds->base.base.dev;
74         struct drm_i915_private *dev_priv = dev->dev_private;
75         u32 ctl_reg, lvds_reg;
76
77         if (HAS_PCH_SPLIT(dev)) {
78                 ctl_reg = PCH_PP_CONTROL;
79                 lvds_reg = PCH_LVDS;
80         } else {
81                 ctl_reg = PP_CONTROL;
82                 lvds_reg = LVDS;
83         }
84
85         I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
86
87         if (intel_lvds->pfit_dirty) {
88                 /*
89                  * Enable automatic panel scaling so that non-native modes
90                  * fill the screen.  The panel fitter should only be
91                  * adjusted whilst the pipe is disabled, according to
92                  * register description and PRM.
93                  */
94                 DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n",
95                               intel_lvds->pfit_control,
96                               intel_lvds->pfit_pgm_ratios);
97                 if (wait_for((I915_READ(PP_STATUS) & PP_ON) == 0, 1000)) {
98                         DRM_ERROR("timed out waiting for panel to power off\n");
99                 } else {
100                         I915_WRITE(PFIT_PGM_RATIOS, intel_lvds->pfit_pgm_ratios);
101                         I915_WRITE(PFIT_CONTROL, intel_lvds->pfit_control);
102                         intel_lvds->pfit_dirty = false;
103                 }
104         }
105
106         I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
107         POSTING_READ(lvds_reg);
108
109         intel_panel_set_backlight(dev, dev_priv->backlight_level);
110 }
111
112 static void intel_lvds_disable(struct intel_lvds *intel_lvds)
113 {
114         struct drm_device *dev = intel_lvds->base.base.dev;
115         struct drm_i915_private *dev_priv = dev->dev_private;
116         u32 ctl_reg, lvds_reg;
117
118         if (HAS_PCH_SPLIT(dev)) {
119                 ctl_reg = PCH_PP_CONTROL;
120                 lvds_reg = PCH_LVDS;
121         } else {
122                 ctl_reg = PP_CONTROL;
123                 lvds_reg = LVDS;
124         }
125
126         dev_priv->backlight_level = intel_panel_get_backlight(dev);
127         intel_panel_set_backlight(dev, 0);
128
129         I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
130
131         if (intel_lvds->pfit_control) {
132                 if (wait_for((I915_READ(PP_STATUS) & PP_ON) == 0, 1000))
133                         DRM_ERROR("timed out waiting for panel to power off\n");
134
135                 I915_WRITE(PFIT_CONTROL, 0);
136                 intel_lvds->pfit_dirty = true;
137         }
138
139         I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
140         POSTING_READ(lvds_reg);
141 }
142
143 static void intel_lvds_dpms(struct drm_encoder *encoder, int mode)
144 {
145         struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
146
147         if (mode == DRM_MODE_DPMS_ON)
148                 intel_lvds_enable(intel_lvds);
149         else
150                 intel_lvds_disable(intel_lvds);
151
152         /* XXX: We never power down the LVDS pairs. */
153 }
154
155 static int intel_lvds_mode_valid(struct drm_connector *connector,
156                                  struct drm_display_mode *mode)
157 {
158         struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
159         struct drm_display_mode *fixed_mode = intel_lvds->fixed_mode;
160
161         if (mode->hdisplay > fixed_mode->hdisplay)
162                 return MODE_PANEL;
163         if (mode->vdisplay > fixed_mode->vdisplay)
164                 return MODE_PANEL;
165
166         return MODE_OK;
167 }
168
169 static void
170 centre_horizontally(struct drm_display_mode *mode,
171                     int width)
172 {
173         u32 border, sync_pos, blank_width, sync_width;
174
175         /* keep the hsync and hblank widths constant */
176         sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
177         blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
178         sync_pos = (blank_width - sync_width + 1) / 2;
179
180         border = (mode->hdisplay - width + 1) / 2;
181         border += border & 1; /* make the border even */
182
183         mode->crtc_hdisplay = width;
184         mode->crtc_hblank_start = width + border;
185         mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
186
187         mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
188         mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
189 }
190
191 static void
192 centre_vertically(struct drm_display_mode *mode,
193                   int height)
194 {
195         u32 border, sync_pos, blank_width, sync_width;
196
197         /* keep the vsync and vblank widths constant */
198         sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
199         blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
200         sync_pos = (blank_width - sync_width + 1) / 2;
201
202         border = (mode->vdisplay - height + 1) / 2;
203
204         mode->crtc_vdisplay = height;
205         mode->crtc_vblank_start = height + border;
206         mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
207
208         mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
209         mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
210 }
211
212 static inline u32 panel_fitter_scaling(u32 source, u32 target)
213 {
214         /*
215          * Floating point operation is not supported. So the FACTOR
216          * is defined, which can avoid the floating point computation
217          * when calculating the panel ratio.
218          */
219 #define ACCURACY 12
220 #define FACTOR (1 << ACCURACY)
221         u32 ratio = source * FACTOR / target;
222         return (FACTOR * ratio + FACTOR/2) / FACTOR;
223 }
224
225 static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
226                                   struct drm_display_mode *mode,
227                                   struct drm_display_mode *adjusted_mode)
228 {
229         struct drm_device *dev = encoder->dev;
230         struct drm_i915_private *dev_priv = dev->dev_private;
231         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
232         struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
233         struct drm_encoder *tmp_encoder;
234         u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
235
236         /* Should never happen!! */
237         if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
238                 DRM_ERROR("Can't support LVDS on pipe A\n");
239                 return false;
240         }
241
242         /* Should never happen!! */
243         list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) {
244                 if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) {
245                         DRM_ERROR("Can't enable LVDS and another "
246                                "encoder on the same pipe\n");
247                         return false;
248                 }
249         }
250
251         /*
252          * We have timings from the BIOS for the panel, put them in
253          * to the adjusted mode.  The CRTC will be set up for this mode,
254          * with the panel scaling set up to source from the H/VDisplay
255          * of the original mode.
256          */
257         intel_fixed_panel_mode(intel_lvds->fixed_mode, adjusted_mode);
258
259         if (HAS_PCH_SPLIT(dev)) {
260                 intel_pch_panel_fitting(dev, intel_lvds->fitting_mode,
261                                         mode, adjusted_mode);
262                 return true;
263         }
264
265         /* Make sure pre-965s set dither correctly */
266         if (INTEL_INFO(dev)->gen < 4) {
267                 if (dev_priv->lvds_dither)
268                         pfit_control |= PANEL_8TO6_DITHER_ENABLE;
269         }
270
271         /* Native modes don't need fitting */
272         if (adjusted_mode->hdisplay == mode->hdisplay &&
273             adjusted_mode->vdisplay == mode->vdisplay)
274                 goto out;
275
276         /* 965+ wants fuzzy fitting */
277         if (INTEL_INFO(dev)->gen >= 4)
278                 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
279                                  PFIT_FILTER_FUZZY);
280
281         /*
282          * Enable automatic panel scaling for non-native modes so that they fill
283          * the screen.  Should be enabled before the pipe is enabled, according
284          * to register description and PRM.
285          * Change the value here to see the borders for debugging
286          */
287         I915_WRITE(BCLRPAT_A, 0);
288         I915_WRITE(BCLRPAT_B, 0);
289
290         switch (intel_lvds->fitting_mode) {
291         case DRM_MODE_SCALE_CENTER:
292                 /*
293                  * For centered modes, we have to calculate border widths &
294                  * heights and modify the values programmed into the CRTC.
295                  */
296                 centre_horizontally(adjusted_mode, mode->hdisplay);
297                 centre_vertically(adjusted_mode, mode->vdisplay);
298                 border = LVDS_BORDER_ENABLE;
299                 break;
300
301         case DRM_MODE_SCALE_ASPECT:
302                 /* Scale but preserve the aspect ratio */
303                 if (INTEL_INFO(dev)->gen >= 4) {
304                         u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
305                         u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
306
307                         /* 965+ is easy, it does everything in hw */
308                         if (scaled_width > scaled_height)
309                                 pfit_control |= PFIT_ENABLE | PFIT_SCALING_PILLAR;
310                         else if (scaled_width < scaled_height)
311                                 pfit_control |= PFIT_ENABLE | PFIT_SCALING_LETTER;
312                         else if (adjusted_mode->hdisplay != mode->hdisplay)
313                                 pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
314                 } else {
315                         u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
316                         u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
317                         /*
318                          * For earlier chips we have to calculate the scaling
319                          * ratio by hand and program it into the
320                          * PFIT_PGM_RATIO register
321                          */
322                         if (scaled_width > scaled_height) { /* pillar */
323                                 centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay);
324
325                                 border = LVDS_BORDER_ENABLE;
326                                 if (mode->vdisplay != adjusted_mode->vdisplay) {
327                                         u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
328                                         pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
329                                                             bits << PFIT_VERT_SCALE_SHIFT);
330                                         pfit_control |= (PFIT_ENABLE |
331                                                          VERT_INTERP_BILINEAR |
332                                                          HORIZ_INTERP_BILINEAR);
333                                 }
334                         } else if (scaled_width < scaled_height) { /* letter */
335                                 centre_vertically(adjusted_mode, scaled_width / mode->hdisplay);
336
337                                 border = LVDS_BORDER_ENABLE;
338                                 if (mode->hdisplay != adjusted_mode->hdisplay) {
339                                         u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
340                                         pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
341                                                             bits << PFIT_VERT_SCALE_SHIFT);
342                                         pfit_control |= (PFIT_ENABLE |
343                                                          VERT_INTERP_BILINEAR |
344                                                          HORIZ_INTERP_BILINEAR);
345                                 }
346                         } else
347                                 /* Aspects match, Let hw scale both directions */
348                                 pfit_control |= (PFIT_ENABLE |
349                                                  VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
350                                                  VERT_INTERP_BILINEAR |
351                                                  HORIZ_INTERP_BILINEAR);
352                 }
353                 break;
354
355         case DRM_MODE_SCALE_FULLSCREEN:
356                 /*
357                  * Full scaling, even if it changes the aspect ratio.
358                  * Fortunately this is all done for us in hw.
359                  */
360                 if (mode->vdisplay != adjusted_mode->vdisplay ||
361                     mode->hdisplay != adjusted_mode->hdisplay) {
362                         pfit_control |= PFIT_ENABLE;
363                         if (INTEL_INFO(dev)->gen >= 4)
364                                 pfit_control |= PFIT_SCALING_AUTO;
365                         else
366                                 pfit_control |= (VERT_AUTO_SCALE |
367                                                  VERT_INTERP_BILINEAR |
368                                                  HORIZ_AUTO_SCALE |
369                                                  HORIZ_INTERP_BILINEAR);
370                 }
371                 break;
372
373         default:
374                 break;
375         }
376
377 out:
378         if (pfit_control != intel_lvds->pfit_control ||
379             pfit_pgm_ratios != intel_lvds->pfit_pgm_ratios) {
380                 intel_lvds->pfit_control = pfit_control;
381                 intel_lvds->pfit_pgm_ratios = pfit_pgm_ratios;
382                 intel_lvds->pfit_dirty = true;
383         }
384         dev_priv->lvds_border_bits = border;
385
386         /*
387          * XXX: It would be nice to support lower refresh rates on the
388          * panels to reduce power consumption, and perhaps match the
389          * user's requested refresh rate.
390          */
391
392         return true;
393 }
394
395 static void intel_lvds_prepare(struct drm_encoder *encoder)
396 {
397         struct drm_device *dev = encoder->dev;
398         struct drm_i915_private *dev_priv = dev->dev_private;
399         struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
400
401         dev_priv->backlight_level = intel_panel_get_backlight(dev);
402
403         /* We try to do the minimum that is necessary in order to unlock
404          * the registers for mode setting.
405          *
406          * On Ironlake, this is quite simple as we just set the unlock key
407          * and ignore all subtleties. (This may cause some issues...)
408          *
409          * Prior to Ironlake, we must disable the pipe if we want to adjust
410          * the panel fitter. However at all other times we can just reset
411          * the registers regardless.
412          */
413
414         if (HAS_PCH_SPLIT(dev)) {
415                 I915_WRITE(PCH_PP_CONTROL,
416                            I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
417         } else if (intel_lvds->pfit_dirty) {
418                 I915_WRITE(PP_CONTROL,
419                            (I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS)
420                            & ~POWER_TARGET_ON);
421         } else {
422                 I915_WRITE(PP_CONTROL,
423                            I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
424         }
425 }
426
427 static void intel_lvds_commit(struct drm_encoder *encoder)
428 {
429         struct drm_device *dev = encoder->dev;
430         struct drm_i915_private *dev_priv = dev->dev_private;
431         struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
432
433         if (dev_priv->backlight_level == 0)
434                 dev_priv->backlight_level = intel_panel_get_max_backlight(dev);
435
436         /* Undo any unlocking done in prepare to prevent accidental
437          * adjustment of the registers.
438          */
439         if (HAS_PCH_SPLIT(dev)) {
440                 u32 val = I915_READ(PCH_PP_CONTROL);
441                 if ((val & PANEL_UNLOCK_REGS) == PANEL_UNLOCK_REGS)
442                         I915_WRITE(PCH_PP_CONTROL, val & 0x3);
443         } else {
444                 u32 val = I915_READ(PP_CONTROL);
445                 if ((val & PANEL_UNLOCK_REGS) == PANEL_UNLOCK_REGS)
446                         I915_WRITE(PP_CONTROL, val & 0x3);
447         }
448
449         /* Always do a full power on as we do not know what state
450          * we were left in.
451          */
452         intel_lvds_enable(intel_lvds);
453 }
454
455 static void intel_lvds_mode_set(struct drm_encoder *encoder,
456                                 struct drm_display_mode *mode,
457                                 struct drm_display_mode *adjusted_mode)
458 {
459         /*
460          * The LVDS pin pair will already have been turned on in the
461          * intel_crtc_mode_set since it has a large impact on the DPLL
462          * settings.
463          */
464 }
465
466 /**
467  * Detect the LVDS connection.
468  *
469  * Since LVDS doesn't have hotlug, we use the lid as a proxy.  Open means
470  * connected and closed means disconnected.  We also send hotplug events as
471  * needed, using lid status notification from the input layer.
472  */
473 static enum drm_connector_status
474 intel_lvds_detect(struct drm_connector *connector, bool force)
475 {
476         struct drm_device *dev = connector->dev;
477         enum drm_connector_status status = connector_status_connected;
478
479         /* ACPI lid methods were generally unreliable in this generation, so
480          * don't even bother.
481          */
482         if (IS_GEN2(dev) || IS_GEN3(dev))
483                 return connector_status_connected;
484
485         return status;
486 }
487
488 /**
489  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
490  */
491 static int intel_lvds_get_modes(struct drm_connector *connector)
492 {
493         struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
494         struct drm_device *dev = connector->dev;
495         struct drm_display_mode *mode;
496
497         if (intel_lvds->edid)
498                 return drm_add_edid_modes(connector, intel_lvds->edid);
499
500         mode = drm_mode_duplicate(dev, intel_lvds->fixed_mode);
501         if (mode == 0)
502                 return 0;
503
504         drm_mode_probed_add(connector, mode);
505         return 1;
506 }
507
508 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
509 {
510         DRM_DEBUG_KMS("Skipping forced modeset for %s\n", id->ident);
511         return 1;
512 }
513
514 /* The GPU hangs up on these systems if modeset is performed on LID open */
515 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
516         {
517                 .callback = intel_no_modeset_on_lid_dmi_callback,
518                 .ident = "Toshiba Tecra A11",
519                 .matches = {
520                         DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
521                         DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
522                 },
523         },
524
525         { }     /* terminating entry */
526 };
527
528 /*
529  * Lid events. Note the use of 'modeset_on_lid':
530  *  - we set it on lid close, and reset it on open
531  *  - we use it as a "only once" bit (ie we ignore
532  *    duplicate events where it was already properly
533  *    set/reset)
534  *  - the suspend/resume paths will also set it to
535  *    zero, since they restore the mode ("lid open").
536  */
537 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
538                             void *unused)
539 {
540         struct drm_i915_private *dev_priv =
541                 container_of(nb, struct drm_i915_private, lid_notifier);
542         struct drm_device *dev = dev_priv->dev;
543         struct drm_connector *connector = dev_priv->int_lvds_connector;
544
545         /*
546          * check and update the status of LVDS connector after receiving
547          * the LID nofication event.
548          */
549         if (connector)
550                 connector->status = connector->funcs->detect(connector,
551                                                              false);
552
553         /* Don't force modeset on machines where it causes a GPU lockup */
554         if (dmi_check_system(intel_no_modeset_on_lid))
555                 return NOTIFY_OK;
556         if (!acpi_lid_open()) {
557                 dev_priv->modeset_on_lid = 1;
558                 return NOTIFY_OK;
559         }
560
561         if (!dev_priv->modeset_on_lid)
562                 return NOTIFY_OK;
563
564         dev_priv->modeset_on_lid = 0;
565
566         mutex_lock(&dev->mode_config.mutex);
567         drm_helper_resume_force_mode(dev);
568         mutex_unlock(&dev->mode_config.mutex);
569
570         return NOTIFY_OK;
571 }
572
573 /**
574  * intel_lvds_destroy - unregister and free LVDS structures
575  * @connector: connector to free
576  *
577  * Unregister the DDC bus for this connector then free the driver private
578  * structure.
579  */
580 static void intel_lvds_destroy(struct drm_connector *connector)
581 {
582         struct drm_device *dev = connector->dev;
583         struct drm_i915_private *dev_priv = dev->dev_private;
584
585         if (dev_priv->lid_notifier.notifier_call)
586                 acpi_lid_notifier_unregister(&dev_priv->lid_notifier);
587         drm_sysfs_connector_remove(connector);
588         drm_connector_cleanup(connector);
589         kfree(connector);
590 }
591
592 static int intel_lvds_set_property(struct drm_connector *connector,
593                                    struct drm_property *property,
594                                    uint64_t value)
595 {
596         struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
597         struct drm_device *dev = connector->dev;
598
599         if (property == dev->mode_config.scaling_mode_property) {
600                 struct drm_crtc *crtc = intel_lvds->base.base.crtc;
601
602                 if (value == DRM_MODE_SCALE_NONE) {
603                         DRM_DEBUG_KMS("no scaling not supported\n");
604                         return -EINVAL;
605                 }
606
607                 if (intel_lvds->fitting_mode == value) {
608                         /* the LVDS scaling property is not changed */
609                         return 0;
610                 }
611                 intel_lvds->fitting_mode = value;
612                 if (crtc && crtc->enabled) {
613                         /*
614                          * If the CRTC is enabled, the display will be changed
615                          * according to the new panel fitting mode.
616                          */
617                         drm_crtc_helper_set_mode(crtc, &crtc->mode,
618                                 crtc->x, crtc->y, crtc->fb);
619                 }
620         }
621
622         return 0;
623 }
624
625 static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
626         .dpms = intel_lvds_dpms,
627         .mode_fixup = intel_lvds_mode_fixup,
628         .prepare = intel_lvds_prepare,
629         .mode_set = intel_lvds_mode_set,
630         .commit = intel_lvds_commit,
631 };
632
633 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
634         .get_modes = intel_lvds_get_modes,
635         .mode_valid = intel_lvds_mode_valid,
636         .best_encoder = intel_best_encoder,
637 };
638
639 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
640         .dpms = drm_helper_connector_dpms,
641         .detect = intel_lvds_detect,
642         .fill_modes = drm_helper_probe_single_connector_modes,
643         .set_property = intel_lvds_set_property,
644         .destroy = intel_lvds_destroy,
645 };
646
647 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
648         .destroy = intel_encoder_destroy,
649 };
650
651 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
652 {
653         DRM_DEBUG_KMS("Skipping LVDS initialization for %s\n", id->ident);
654         return 1;
655 }
656
657 /* These systems claim to have LVDS, but really don't */
658 static const struct dmi_system_id intel_no_lvds[] = {
659         {
660                 .callback = intel_no_lvds_dmi_callback,
661                 .ident = "Apple Mac Mini (Core series)",
662                 .matches = {
663                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
664                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
665                 },
666         },
667         {
668                 .callback = intel_no_lvds_dmi_callback,
669                 .ident = "Apple Mac Mini (Core 2 series)",
670                 .matches = {
671                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
672                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
673                 },
674         },
675         {
676                 .callback = intel_no_lvds_dmi_callback,
677                 .ident = "MSI IM-945GSE-A",
678                 .matches = {
679                         DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
680                         DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
681                 },
682         },
683         {
684                 .callback = intel_no_lvds_dmi_callback,
685                 .ident = "Dell Studio Hybrid",
686                 .matches = {
687                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
688                         DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
689                 },
690         },
691         {
692                 .callback = intel_no_lvds_dmi_callback,
693                 .ident = "AOpen Mini PC",
694                 .matches = {
695                         DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
696                         DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
697                 },
698         },
699         {
700                 .callback = intel_no_lvds_dmi_callback,
701                 .ident = "AOpen Mini PC MP915",
702                 .matches = {
703                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
704                         DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
705                 },
706         },
707         {
708                 .callback = intel_no_lvds_dmi_callback,
709                 .ident = "Aopen i945GTt-VFA",
710                 .matches = {
711                         DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
712                 },
713         },
714         {
715                 .callback = intel_no_lvds_dmi_callback,
716                 .ident = "Clientron U800",
717                 .matches = {
718                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
719                         DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
720                 },
721         },
722
723         { }     /* terminating entry */
724 };
725
726 /**
727  * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
728  * @dev: drm device
729  * @connector: LVDS connector
730  *
731  * Find the reduced downclock for LVDS in EDID.
732  */
733 static void intel_find_lvds_downclock(struct drm_device *dev,
734                                       struct drm_display_mode *fixed_mode,
735                                       struct drm_connector *connector)
736 {
737         struct drm_i915_private *dev_priv = dev->dev_private;
738         struct drm_display_mode *scan;
739         int temp_downclock;
740
741         temp_downclock = fixed_mode->clock;
742         list_for_each_entry(scan, &connector->probed_modes, head) {
743                 /*
744                  * If one mode has the same resolution with the fixed_panel
745                  * mode while they have the different refresh rate, it means
746                  * that the reduced downclock is found for the LVDS. In such
747                  * case we can set the different FPx0/1 to dynamically select
748                  * between low and high frequency.
749                  */
750                 if (scan->hdisplay == fixed_mode->hdisplay &&
751                     scan->hsync_start == fixed_mode->hsync_start &&
752                     scan->hsync_end == fixed_mode->hsync_end &&
753                     scan->htotal == fixed_mode->htotal &&
754                     scan->vdisplay == fixed_mode->vdisplay &&
755                     scan->vsync_start == fixed_mode->vsync_start &&
756                     scan->vsync_end == fixed_mode->vsync_end &&
757                     scan->vtotal == fixed_mode->vtotal) {
758                         if (scan->clock < temp_downclock) {
759                                 /*
760                                  * The downclock is already found. But we
761                                  * expect to find the lower downclock.
762                                  */
763                                 temp_downclock = scan->clock;
764                         }
765                 }
766         }
767         if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
768                 /* We found the downclock for LVDS. */
769                 dev_priv->lvds_downclock_avail = 1;
770                 dev_priv->lvds_downclock = temp_downclock;
771                 DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
772                               "Normal clock %dKhz, downclock %dKhz\n",
773                               fixed_mode->clock, temp_downclock);
774         }
775 }
776
777 /*
778  * Enumerate the child dev array parsed from VBT to check whether
779  * the LVDS is present.
780  * If it is present, return 1.
781  * If it is not present, return false.
782  * If no child dev is parsed from VBT, it assumes that the LVDS is present.
783  */
784 static bool lvds_is_present_in_vbt(struct drm_device *dev,
785                                    u8 *i2c_pin)
786 {
787         struct drm_i915_private *dev_priv = dev->dev_private;
788         int i;
789
790         if (!dev_priv->child_dev_num)
791                 return true;
792
793         for (i = 0; i < dev_priv->child_dev_num; i++) {
794                 struct child_device_config *child = dev_priv->child_dev + i;
795
796                 /* If the device type is not LFP, continue.
797                  * We have to check both the new identifiers as well as the
798                  * old for compatibility with some BIOSes.
799                  */
800                 if (child->device_type != DEVICE_TYPE_INT_LFP &&
801                     child->device_type != DEVICE_TYPE_LFP)
802                         continue;
803
804                 if (child->i2c_pin)
805                     *i2c_pin = child->i2c_pin;
806
807                 /* However, we cannot trust the BIOS writers to populate
808                  * the VBT correctly.  Since LVDS requires additional
809                  * information from AIM blocks, a non-zero addin offset is
810                  * a good indicator that the LVDS is actually present.
811                  */
812                 if (child->addin_offset)
813                         return true;
814
815                 /* But even then some BIOS writers perform some black magic
816                  * and instantiate the device without reference to any
817                  * additional data.  Trust that if the VBT was written into
818                  * the OpRegion then they have validated the LVDS's existence.
819                  */
820                 if (dev_priv->opregion.vbt)
821                         return true;
822         }
823
824         return false;
825 }
826
827 static bool intel_lvds_ddc_probe(struct drm_device *dev, u8 pin)
828 {
829         struct drm_i915_private *dev_priv = dev->dev_private;
830         u8 buf = 0;
831         struct i2c_msg msgs[] = {
832                 {
833                         .addr = 0xA0,
834                         .flags = 0,
835                         .len = 1,
836                         .buf = &buf,
837                 },
838         };
839         struct i2c_adapter *i2c = &dev_priv->gmbus[pin].adapter;
840         /* XXX this only appears to work when using GMBUS */
841         if (intel_gmbus_is_forced_bit(i2c))
842                 return true;
843         return i2c_transfer(i2c, msgs, 1) == 1;
844 }
845
846 /**
847  * intel_lvds_init - setup LVDS connectors on this device
848  * @dev: drm device
849  *
850  * Create the connector, register the LVDS DDC bus, and try to figure out what
851  * modes we can display on the LVDS panel (if present).
852  */
853 bool intel_lvds_init(struct drm_device *dev)
854 {
855         struct drm_i915_private *dev_priv = dev->dev_private;
856         struct intel_lvds *intel_lvds;
857         struct intel_encoder *intel_encoder;
858         struct intel_connector *intel_connector;
859         struct drm_connector *connector;
860         struct drm_encoder *encoder;
861         struct drm_display_mode *scan; /* *modes, *bios_mode; */
862         struct drm_crtc *crtc;
863         u32 lvds;
864         int pipe;
865         u8 pin;
866
867         /* Skip init on machines we know falsely report LVDS */
868         if (dmi_check_system(intel_no_lvds))
869                 return false;
870
871         pin = GMBUS_PORT_PANEL;
872         if (!lvds_is_present_in_vbt(dev, &pin)) {
873                 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
874                 return false;
875         }
876
877         if (HAS_PCH_SPLIT(dev)) {
878                 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
879                         return false;
880                 if (dev_priv->edp.support) {
881                         DRM_DEBUG_KMS("disable LVDS for eDP support\n");
882                         return false;
883                 }
884         }
885
886         if (!intel_lvds_ddc_probe(dev, pin)) {
887                 DRM_DEBUG_KMS("LVDS did not respond to DDC probe\n");
888                 return false;
889         }
890
891         intel_lvds = kzalloc(sizeof(struct intel_lvds), GFP_KERNEL);
892         if (!intel_lvds) {
893                 return false;
894         }
895
896         intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
897         if (!intel_connector) {
898                 kfree(intel_lvds);
899                 return false;
900         }
901
902         if (!HAS_PCH_SPLIT(dev)) {
903                 intel_lvds->pfit_control = I915_READ(PFIT_CONTROL);
904         }
905
906         intel_encoder = &intel_lvds->base;
907         encoder = &intel_encoder->base;
908         connector = &intel_connector->base;
909         drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
910                            DRM_MODE_CONNECTOR_LVDS);
911
912         drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
913                          DRM_MODE_ENCODER_LVDS);
914
915         intel_connector_attach_encoder(intel_connector, intel_encoder);
916         intel_encoder->type = INTEL_OUTPUT_LVDS;
917
918         intel_encoder->clone_mask = (1 << INTEL_LVDS_CLONE_BIT);
919         intel_encoder->crtc_mask = (1 << 1);
920         if (INTEL_INFO(dev)->gen >= 5)
921                 intel_encoder->crtc_mask |= (1 << 0);
922         drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
923         drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
924         connector->display_info.subpixel_order = SubPixelHorizontalRGB;
925         connector->interlace_allowed = false;
926         connector->doublescan_allowed = false;
927
928         /* create the scaling mode property */
929         drm_mode_create_scaling_mode_property(dev);
930         /*
931          * the initial panel fitting mode will be FULL_SCREEN.
932          */
933
934         drm_connector_attach_property(&intel_connector->base,
935                                       dev->mode_config.scaling_mode_property,
936                                       DRM_MODE_SCALE_ASPECT);
937         intel_lvds->fitting_mode = DRM_MODE_SCALE_ASPECT;
938         /*
939          * LVDS discovery:
940          * 1) check for EDID on DDC
941          * 2) check for VBT data
942          * 3) check to see if LVDS is already on
943          *    if none of the above, no panel
944          * 4) make sure lid is open
945          *    if closed, act like it's not there for now
946          */
947
948         /*
949          * Attempt to get the fixed panel mode from DDC.  Assume that the
950          * preferred mode is the right one.
951          */
952         intel_lvds->edid = drm_get_edid(connector,
953                                         &dev_priv->gmbus[pin].adapter);
954         if (intel_lvds->edid) {
955                 if (drm_add_edid_modes(connector,
956                                        intel_lvds->edid)) {
957                         drm_mode_connector_update_edid_property(connector,
958                                                                 intel_lvds->edid);
959                 } else {
960                         kfree(intel_lvds->edid);
961                         intel_lvds->edid = NULL;
962                 }
963         }
964         if (!intel_lvds->edid) {
965                 /* Didn't get an EDID, so
966                  * Set wide sync ranges so we get all modes
967                  * handed to valid_mode for checking
968                  */
969                 connector->display_info.min_vfreq = 0;
970                 connector->display_info.max_vfreq = 200;
971                 connector->display_info.min_hfreq = 0;
972                 connector->display_info.max_hfreq = 200;
973         }
974
975         list_for_each_entry(scan, &connector->probed_modes, head) {
976                 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
977                         intel_lvds->fixed_mode =
978                                 drm_mode_duplicate(dev, scan);
979                         intel_find_lvds_downclock(dev,
980                                                   intel_lvds->fixed_mode,
981                                                   connector);
982                         goto out;
983                 }
984         }
985
986         /* Failed to get EDID, what about VBT? */
987         if (dev_priv->lfp_lvds_vbt_mode) {
988                 intel_lvds->fixed_mode =
989                         drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
990                 if (intel_lvds->fixed_mode) {
991                         intel_lvds->fixed_mode->type |=
992                                 DRM_MODE_TYPE_PREFERRED;
993                         goto out;
994                 }
995         }
996
997         /*
998          * If we didn't get EDID, try checking if the panel is already turned
999          * on.  If so, assume that whatever is currently programmed is the
1000          * correct mode.
1001          */
1002
1003         /* Ironlake: FIXME if still fail, not try pipe mode now */
1004         if (HAS_PCH_SPLIT(dev))
1005                 goto failed;
1006
1007         lvds = I915_READ(LVDS);
1008         pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1009         crtc = intel_get_crtc_for_pipe(dev, pipe);
1010
1011         if (crtc && (lvds & LVDS_PORT_EN)) {
1012                 intel_lvds->fixed_mode = intel_crtc_mode_get(dev, crtc);
1013                 if (intel_lvds->fixed_mode) {
1014                         intel_lvds->fixed_mode->type |=
1015                                 DRM_MODE_TYPE_PREFERRED;
1016                         goto out;
1017                 }
1018         }
1019
1020         /* If we still don't have a mode after all that, give up. */
1021         if (!intel_lvds->fixed_mode)
1022                 goto failed;
1023
1024 out:
1025         if (HAS_PCH_SPLIT(dev)) {
1026                 u32 pwm;
1027
1028                 pipe = (I915_READ(PCH_LVDS) & LVDS_PIPEB_SELECT) ? 1 : 0;
1029
1030                 /* make sure PWM is enabled and locked to the LVDS pipe */
1031                 pwm = I915_READ(BLC_PWM_CPU_CTL2);
1032                 if (pipe == 0 && (pwm & PWM_PIPE_B))
1033                         I915_WRITE(BLC_PWM_CPU_CTL2, pwm & ~PWM_ENABLE);
1034                 if (pipe)
1035                         pwm |= PWM_PIPE_B;
1036                 else
1037                         pwm &= ~PWM_PIPE_B;
1038                 I915_WRITE(BLC_PWM_CPU_CTL2, pwm | PWM_ENABLE);
1039
1040                 pwm = I915_READ(BLC_PWM_PCH_CTL1);
1041                 pwm |= PWM_PCH_ENABLE;
1042                 I915_WRITE(BLC_PWM_PCH_CTL1, pwm);
1043         }
1044         dev_priv->lid_notifier.notifier_call = intel_lid_notify;
1045         if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
1046                 DRM_DEBUG_KMS("lid notifier registration failed\n");
1047                 dev_priv->lid_notifier.notifier_call = NULL;
1048         }
1049         /* keep the LVDS connector */
1050         dev_priv->int_lvds_connector = connector;
1051         drm_sysfs_connector_add(connector);
1052         return true;
1053
1054 failed:
1055         DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1056         drm_connector_cleanup(connector);
1057         drm_encoder_cleanup(encoder);
1058         kfree(intel_lvds);
1059         kfree(intel_connector);
1060         return false;
1061 }