2 * Copyright © 2006-2007 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
30 #include <acpi/button.h>
31 #include <linux/dmi.h>
32 #include <linux/i2c.h>
33 #include <linux/slab.h>
35 #include <drm/drm_crtc.h>
36 #include <drm/drm_edid.h>
37 #include "intel_drv.h"
38 #include <drm/i915_drm.h>
40 #include <linux/acpi.h>
42 /* Private structure for the integrated LVDS support */
43 struct intel_lvds_connector {
44 struct intel_connector base;
46 struct notifier_block lid_notifier;
49 struct intel_lvds_encoder {
50 struct intel_encoder base;
55 struct intel_lvds_connector *attached_connector;
58 static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
60 return container_of(encoder, struct intel_lvds_encoder, base.base);
63 static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
65 return container_of(connector, struct intel_lvds_connector, base.base);
68 static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
71 struct drm_device *dev = encoder->base.dev;
72 struct drm_i915_private *dev_priv = dev->dev_private;
73 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
76 tmp = I915_READ(lvds_encoder->reg);
78 if (!(tmp & LVDS_PORT_EN))
82 *pipe = PORT_TO_PIPE_CPT(tmp);
84 *pipe = PORT_TO_PIPE(tmp);
89 static void intel_lvds_get_config(struct intel_encoder *encoder,
90 struct intel_crtc_config *pipe_config)
92 struct drm_device *dev = encoder->base.dev;
93 struct drm_i915_private *dev_priv = dev->dev_private;
94 u32 lvds_reg, tmp, flags = 0;
97 if (HAS_PCH_SPLIT(dev))
102 tmp = I915_READ(lvds_reg);
103 if (tmp & LVDS_HSYNC_POLARITY)
104 flags |= DRM_MODE_FLAG_NHSYNC;
106 flags |= DRM_MODE_FLAG_PHSYNC;
107 if (tmp & LVDS_VSYNC_POLARITY)
108 flags |= DRM_MODE_FLAG_NVSYNC;
110 flags |= DRM_MODE_FLAG_PVSYNC;
112 pipe_config->adjusted_mode.flags |= flags;
114 /* gen2/3 store dither state in pfit control, needs to match */
115 if (INTEL_INFO(dev)->gen < 4) {
116 tmp = I915_READ(PFIT_CONTROL);
118 pipe_config->gmch_pfit.control |= tmp & PANEL_8TO6_DITHER_ENABLE;
121 dotclock = pipe_config->port_clock;
123 if (HAS_PCH_SPLIT(dev_priv->dev))
124 ironlake_check_encoder_dotclock(pipe_config, dotclock);
126 pipe_config->adjusted_mode.crtc_clock = dotclock;
129 /* The LVDS pin pair needs to be on before the DPLLs are enabled.
130 * This is an exception to the general rule that mode_set doesn't turn
133 static void intel_pre_enable_lvds(struct intel_encoder *encoder)
135 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
136 struct drm_device *dev = encoder->base.dev;
137 struct drm_i915_private *dev_priv = dev->dev_private;
138 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
139 const struct drm_display_mode *adjusted_mode =
140 &crtc->config.adjusted_mode;
141 int pipe = crtc->pipe;
144 if (HAS_PCH_SPLIT(dev)) {
145 assert_fdi_rx_pll_disabled(dev_priv, pipe);
146 assert_shared_dpll_disabled(dev_priv,
147 intel_crtc_to_shared_dpll(crtc));
149 assert_pll_disabled(dev_priv, pipe);
152 temp = I915_READ(lvds_encoder->reg);
153 temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
155 if (HAS_PCH_CPT(dev)) {
156 temp &= ~PORT_TRANS_SEL_MASK;
157 temp |= PORT_TRANS_SEL_CPT(pipe);
160 temp |= LVDS_PIPEB_SELECT;
162 temp &= ~LVDS_PIPEB_SELECT;
166 /* set the corresponsding LVDS_BORDER bit */
167 temp &= ~LVDS_BORDER_ENABLE;
168 temp |= crtc->config.gmch_pfit.lvds_border_bits;
169 /* Set the B0-B3 data pairs corresponding to whether we're going to
170 * set the DPLLs for dual-channel mode or not.
172 if (lvds_encoder->is_dual_link)
173 temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
175 temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
177 /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
178 * appropriately here, but we need to look more thoroughly into how
179 * panels behave in the two modes.
182 /* Set the dithering flag on LVDS as needed, note that there is no
183 * special lvds dither control bit on pch-split platforms, dithering is
184 * only controlled through the PIPECONF reg. */
185 if (INTEL_INFO(dev)->gen == 4) {
186 /* Bspec wording suggests that LVDS port dithering only exists
187 * for 18bpp panels. */
188 if (crtc->config.dither && crtc->config.pipe_bpp == 18)
189 temp |= LVDS_ENABLE_DITHER;
191 temp &= ~LVDS_ENABLE_DITHER;
193 temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
194 if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
195 temp |= LVDS_HSYNC_POLARITY;
196 if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
197 temp |= LVDS_VSYNC_POLARITY;
199 I915_WRITE(lvds_encoder->reg, temp);
203 * Sets the power state for the panel.
205 static void intel_enable_lvds(struct intel_encoder *encoder)
207 struct drm_device *dev = encoder->base.dev;
208 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
209 struct intel_connector *intel_connector =
210 &lvds_encoder->attached_connector->base;
211 struct drm_i915_private *dev_priv = dev->dev_private;
212 u32 ctl_reg, stat_reg;
214 if (HAS_PCH_SPLIT(dev)) {
215 ctl_reg = PCH_PP_CONTROL;
216 stat_reg = PCH_PP_STATUS;
218 ctl_reg = PP_CONTROL;
219 stat_reg = PP_STATUS;
222 I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN);
224 I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
225 POSTING_READ(lvds_encoder->reg);
226 if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
227 DRM_ERROR("timed out waiting for panel to power on\n");
229 intel_panel_enable_backlight(intel_connector);
232 static void intel_disable_lvds(struct intel_encoder *encoder)
234 struct drm_device *dev = encoder->base.dev;
235 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
236 struct intel_connector *intel_connector =
237 &lvds_encoder->attached_connector->base;
238 struct drm_i915_private *dev_priv = dev->dev_private;
239 u32 ctl_reg, stat_reg;
241 if (HAS_PCH_SPLIT(dev)) {
242 ctl_reg = PCH_PP_CONTROL;
243 stat_reg = PCH_PP_STATUS;
245 ctl_reg = PP_CONTROL;
246 stat_reg = PP_STATUS;
249 intel_panel_disable_backlight(intel_connector);
251 I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
252 if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
253 DRM_ERROR("timed out waiting for panel to power off\n");
255 I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
256 POSTING_READ(lvds_encoder->reg);
259 static int intel_lvds_mode_valid(struct drm_connector *connector,
260 struct drm_display_mode *mode)
262 struct intel_connector *intel_connector = to_intel_connector(connector);
263 struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
265 if (mode->hdisplay > fixed_mode->hdisplay)
267 if (mode->vdisplay > fixed_mode->vdisplay)
273 static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
274 struct intel_crtc_config *pipe_config)
276 struct drm_device *dev = intel_encoder->base.dev;
277 struct drm_i915_private *dev_priv = dev->dev_private;
278 struct intel_lvds_encoder *lvds_encoder =
279 to_lvds_encoder(&intel_encoder->base);
280 struct intel_connector *intel_connector =
281 &lvds_encoder->attached_connector->base;
282 struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
283 struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc;
284 unsigned int lvds_bpp;
286 /* Should never happen!! */
287 if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
288 DRM_ERROR("Can't support LVDS on pipe A\n");
292 if ((I915_READ(lvds_encoder->reg) & LVDS_A3_POWER_MASK) ==
298 if (lvds_bpp != pipe_config->pipe_bpp && !pipe_config->bw_constrained) {
299 DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
300 pipe_config->pipe_bpp, lvds_bpp);
301 pipe_config->pipe_bpp = lvds_bpp;
305 * We have timings from the BIOS for the panel, put them in
306 * to the adjusted mode. The CRTC will be set up for this mode,
307 * with the panel scaling set up to source from the H/VDisplay
308 * of the original mode.
310 intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
313 if (HAS_PCH_SPLIT(dev)) {
314 pipe_config->has_pch_encoder = true;
316 intel_pch_panel_fitting(intel_crtc, pipe_config,
317 intel_connector->panel.fitting_mode);
319 intel_gmch_panel_fitting(intel_crtc, pipe_config,
320 intel_connector->panel.fitting_mode);
325 * XXX: It would be nice to support lower refresh rates on the
326 * panels to reduce power consumption, and perhaps match the
327 * user's requested refresh rate.
333 static void intel_lvds_mode_set(struct intel_encoder *encoder)
336 * We don't do anything here, the LVDS port is fully set up in the pre
337 * enable hook - the ordering constraints for enabling the lvds port vs.
338 * enabling the display pll are too strict.
343 * Detect the LVDS connection.
345 * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
346 * connected and closed means disconnected. We also send hotplug events as
347 * needed, using lid status notification from the input layer.
349 static enum drm_connector_status
350 intel_lvds_detect(struct drm_connector *connector, bool force)
352 struct drm_device *dev = connector->dev;
353 enum drm_connector_status status;
355 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
356 connector->base.id, drm_get_connector_name(connector));
358 status = intel_panel_detect(dev);
359 if (status != connector_status_unknown)
362 return connector_status_connected;
366 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
368 static int intel_lvds_get_modes(struct drm_connector *connector)
370 struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
371 struct drm_device *dev = connector->dev;
372 struct drm_display_mode *mode;
374 /* use cached edid if we have one */
375 if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
376 return drm_add_edid_modes(connector, lvds_connector->base.edid);
378 mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
382 drm_mode_probed_add(connector, mode);
386 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
388 DRM_INFO("Skipping forced modeset for %s\n", id->ident);
392 /* The GPU hangs up on these systems if modeset is performed on LID open */
393 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
395 .callback = intel_no_modeset_on_lid_dmi_callback,
396 .ident = "Toshiba Tecra A11",
398 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
399 DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
403 { } /* terminating entry */
407 * Lid events. Note the use of 'modeset':
408 * - we set it to MODESET_ON_LID_OPEN on lid close,
409 * and set it to MODESET_DONE on open
410 * - we use it as a "only once" bit (ie we ignore
411 * duplicate events where it was already properly set)
412 * - the suspend/resume paths will set it to
413 * MODESET_SUSPENDED and ignore the lid open event,
414 * because they restore the mode ("lid open").
416 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
419 struct intel_lvds_connector *lvds_connector =
420 container_of(nb, struct intel_lvds_connector, lid_notifier);
421 struct drm_connector *connector = &lvds_connector->base.base;
422 struct drm_device *dev = connector->dev;
423 struct drm_i915_private *dev_priv = dev->dev_private;
425 if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
428 mutex_lock(&dev_priv->modeset_restore_lock);
429 if (dev_priv->modeset_restore == MODESET_SUSPENDED)
432 * check and update the status of LVDS connector after receiving
433 * the LID nofication event.
435 connector->status = connector->funcs->detect(connector, false);
437 /* Don't force modeset on machines where it causes a GPU lockup */
438 if (dmi_check_system(intel_no_modeset_on_lid))
440 if (!acpi_lid_open()) {
441 /* do modeset on next lid open event */
442 dev_priv->modeset_restore = MODESET_ON_LID_OPEN;
446 if (dev_priv->modeset_restore == MODESET_DONE)
449 drm_modeset_lock_all(dev);
450 intel_modeset_setup_hw_state(dev, true);
451 drm_modeset_unlock_all(dev);
453 dev_priv->modeset_restore = MODESET_DONE;
456 mutex_unlock(&dev_priv->modeset_restore_lock);
461 * intel_lvds_destroy - unregister and free LVDS structures
462 * @connector: connector to free
464 * Unregister the DDC bus for this connector then free the driver private
467 static void intel_lvds_destroy(struct drm_connector *connector)
469 struct intel_lvds_connector *lvds_connector =
470 to_lvds_connector(connector);
472 if (lvds_connector->lid_notifier.notifier_call)
473 acpi_lid_notifier_unregister(&lvds_connector->lid_notifier);
475 if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
476 kfree(lvds_connector->base.edid);
478 intel_panel_fini(&lvds_connector->base.panel);
480 drm_connector_cleanup(connector);
484 static int intel_lvds_set_property(struct drm_connector *connector,
485 struct drm_property *property,
488 struct intel_connector *intel_connector = to_intel_connector(connector);
489 struct drm_device *dev = connector->dev;
491 if (property == dev->mode_config.scaling_mode_property) {
492 struct drm_crtc *crtc;
494 if (value == DRM_MODE_SCALE_NONE) {
495 DRM_DEBUG_KMS("no scaling not supported\n");
499 if (intel_connector->panel.fitting_mode == value) {
500 /* the LVDS scaling property is not changed */
503 intel_connector->panel.fitting_mode = value;
505 crtc = intel_attached_encoder(connector)->base.crtc;
506 if (crtc && crtc->enabled) {
508 * If the CRTC is enabled, the display will be changed
509 * according to the new panel fitting mode.
511 intel_crtc_restore_mode(crtc);
518 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
519 .get_modes = intel_lvds_get_modes,
520 .mode_valid = intel_lvds_mode_valid,
521 .best_encoder = intel_best_encoder,
524 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
525 .dpms = intel_connector_dpms,
526 .detect = intel_lvds_detect,
527 .fill_modes = drm_helper_probe_single_connector_modes,
528 .set_property = intel_lvds_set_property,
529 .destroy = intel_lvds_destroy,
532 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
533 .destroy = intel_encoder_destroy,
536 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
538 DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
542 /* These systems claim to have LVDS, but really don't */
543 static const struct dmi_system_id intel_no_lvds[] = {
545 .callback = intel_no_lvds_dmi_callback,
546 .ident = "Apple Mac Mini (Core series)",
548 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
549 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
553 .callback = intel_no_lvds_dmi_callback,
554 .ident = "Apple Mac Mini (Core 2 series)",
556 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
557 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
561 .callback = intel_no_lvds_dmi_callback,
562 .ident = "MSI IM-945GSE-A",
564 DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
565 DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
569 .callback = intel_no_lvds_dmi_callback,
570 .ident = "Dell Studio Hybrid",
572 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
573 DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
577 .callback = intel_no_lvds_dmi_callback,
578 .ident = "Dell OptiPlex FX170",
580 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
581 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
585 .callback = intel_no_lvds_dmi_callback,
586 .ident = "AOpen Mini PC",
588 DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
589 DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
593 .callback = intel_no_lvds_dmi_callback,
594 .ident = "AOpen Mini PC MP915",
596 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
597 DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
601 .callback = intel_no_lvds_dmi_callback,
602 .ident = "AOpen i915GMm-HFS",
604 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
605 DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
609 .callback = intel_no_lvds_dmi_callback,
610 .ident = "AOpen i45GMx-I",
612 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
613 DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
617 .callback = intel_no_lvds_dmi_callback,
618 .ident = "Aopen i945GTt-VFA",
620 DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
624 .callback = intel_no_lvds_dmi_callback,
625 .ident = "Clientron U800",
627 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
628 DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
632 .callback = intel_no_lvds_dmi_callback,
633 .ident = "Clientron E830",
635 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
636 DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
640 .callback = intel_no_lvds_dmi_callback,
641 .ident = "Asus EeeBox PC EB1007",
643 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
644 DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
648 .callback = intel_no_lvds_dmi_callback,
649 .ident = "Asus AT5NM10T-I",
651 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
652 DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
656 .callback = intel_no_lvds_dmi_callback,
657 .ident = "Hewlett-Packard HP t5740",
659 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
660 DMI_MATCH(DMI_PRODUCT_NAME, " t5740"),
664 .callback = intel_no_lvds_dmi_callback,
665 .ident = "Hewlett-Packard t5745",
667 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
668 DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
672 .callback = intel_no_lvds_dmi_callback,
673 .ident = "Hewlett-Packard st5747",
675 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
676 DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
680 .callback = intel_no_lvds_dmi_callback,
681 .ident = "MSI Wind Box DC500",
683 DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
684 DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
688 .callback = intel_no_lvds_dmi_callback,
689 .ident = "Gigabyte GA-D525TUD",
691 DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
692 DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
696 .callback = intel_no_lvds_dmi_callback,
697 .ident = "Supermicro X7SPA-H",
699 DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
700 DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
704 .callback = intel_no_lvds_dmi_callback,
705 .ident = "Fujitsu Esprimo Q900",
707 DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
708 DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"),
712 .callback = intel_no_lvds_dmi_callback,
713 .ident = "Intel D410PT",
715 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
716 DMI_MATCH(DMI_BOARD_NAME, "D410PT"),
720 .callback = intel_no_lvds_dmi_callback,
721 .ident = "Intel D425KT",
723 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
724 DMI_EXACT_MATCH(DMI_BOARD_NAME, "D425KT"),
728 .callback = intel_no_lvds_dmi_callback,
729 .ident = "Intel D510MO",
731 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
732 DMI_EXACT_MATCH(DMI_BOARD_NAME, "D510MO"),
736 .callback = intel_no_lvds_dmi_callback,
737 .ident = "Intel D525MW",
739 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
740 DMI_EXACT_MATCH(DMI_BOARD_NAME, "D525MW"),
744 { } /* terminating entry */
748 * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
750 * @connector: LVDS connector
752 * Find the reduced downclock for LVDS in EDID.
754 static void intel_find_lvds_downclock(struct drm_device *dev,
755 struct drm_display_mode *fixed_mode,
756 struct drm_connector *connector)
758 struct drm_i915_private *dev_priv = dev->dev_private;
759 struct drm_display_mode *scan;
762 temp_downclock = fixed_mode->clock;
763 list_for_each_entry(scan, &connector->probed_modes, head) {
765 * If one mode has the same resolution with the fixed_panel
766 * mode while they have the different refresh rate, it means
767 * that the reduced downclock is found for the LVDS. In such
768 * case we can set the different FPx0/1 to dynamically select
769 * between low and high frequency.
771 if (scan->hdisplay == fixed_mode->hdisplay &&
772 scan->hsync_start == fixed_mode->hsync_start &&
773 scan->hsync_end == fixed_mode->hsync_end &&
774 scan->htotal == fixed_mode->htotal &&
775 scan->vdisplay == fixed_mode->vdisplay &&
776 scan->vsync_start == fixed_mode->vsync_start &&
777 scan->vsync_end == fixed_mode->vsync_end &&
778 scan->vtotal == fixed_mode->vtotal) {
779 if (scan->clock < temp_downclock) {
781 * The downclock is already found. But we
782 * expect to find the lower downclock.
784 temp_downclock = scan->clock;
788 if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
789 /* We found the downclock for LVDS. */
790 dev_priv->lvds_downclock_avail = 1;
791 dev_priv->lvds_downclock = temp_downclock;
792 DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
793 "Normal clock %dKhz, downclock %dKhz\n",
794 fixed_mode->clock, temp_downclock);
799 * Enumerate the child dev array parsed from VBT to check whether
800 * the LVDS is present.
801 * If it is present, return 1.
802 * If it is not present, return false.
803 * If no child dev is parsed from VBT, it assumes that the LVDS is present.
805 static bool lvds_is_present_in_vbt(struct drm_device *dev,
808 struct drm_i915_private *dev_priv = dev->dev_private;
811 if (!dev_priv->vbt.child_dev_num)
814 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
815 union child_device_config *uchild = dev_priv->vbt.child_dev + i;
816 struct old_child_dev_config *child = &uchild->old;
818 /* If the device type is not LFP, continue.
819 * We have to check both the new identifiers as well as the
820 * old for compatibility with some BIOSes.
822 if (child->device_type != DEVICE_TYPE_INT_LFP &&
823 child->device_type != DEVICE_TYPE_LFP)
826 if (intel_gmbus_is_port_valid(child->i2c_pin))
827 *i2c_pin = child->i2c_pin;
829 /* However, we cannot trust the BIOS writers to populate
830 * the VBT correctly. Since LVDS requires additional
831 * information from AIM blocks, a non-zero addin offset is
832 * a good indicator that the LVDS is actually present.
834 if (child->addin_offset)
837 /* But even then some BIOS writers perform some black magic
838 * and instantiate the device without reference to any
839 * additional data. Trust that if the VBT was written into
840 * the OpRegion then they have validated the LVDS's existence.
842 if (dev_priv->opregion.vbt)
849 static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)
851 DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
855 static const struct dmi_system_id intel_dual_link_lvds[] = {
857 .callback = intel_dual_link_lvds_callback,
858 .ident = "Apple MacBook Pro (Core i5/i7 Series)",
860 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
861 DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"),
864 { } /* terminating entry */
867 bool intel_is_dual_link_lvds(struct drm_device *dev)
869 struct intel_encoder *encoder;
870 struct intel_lvds_encoder *lvds_encoder;
872 list_for_each_entry(encoder, &dev->mode_config.encoder_list,
874 if (encoder->type == INTEL_OUTPUT_LVDS) {
875 lvds_encoder = to_lvds_encoder(&encoder->base);
877 return lvds_encoder->is_dual_link;
884 static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
886 struct drm_device *dev = lvds_encoder->base.base.dev;
888 struct drm_i915_private *dev_priv = dev->dev_private;
890 /* use the module option value if specified */
891 if (i915_lvds_channel_mode > 0)
892 return i915_lvds_channel_mode == 2;
894 if (dmi_check_system(intel_dual_link_lvds))
897 /* BIOS should set the proper LVDS register value at boot, but
898 * in reality, it doesn't set the value when the lid is closed;
899 * we need to check "the value to be set" in VBT when LVDS
900 * register is uninitialized.
902 val = I915_READ(lvds_encoder->reg);
903 if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
904 val = dev_priv->vbt.bios_lvds_val;
906 return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
909 static bool intel_lvds_supported(struct drm_device *dev)
911 /* With the introduction of the PCH we gained a dedicated
912 * LVDS presence pin, use it. */
913 if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
916 /* Otherwise LVDS was only attached to mobile products,
917 * except for the inglorious 830gm */
918 if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev))
925 * intel_lvds_init - setup LVDS connectors on this device
928 * Create the connector, register the LVDS DDC bus, and try to figure out what
929 * modes we can display on the LVDS panel (if present).
931 void intel_lvds_init(struct drm_device *dev)
933 struct drm_i915_private *dev_priv = dev->dev_private;
934 struct intel_lvds_encoder *lvds_encoder;
935 struct intel_encoder *intel_encoder;
936 struct intel_lvds_connector *lvds_connector;
937 struct intel_connector *intel_connector;
938 struct drm_connector *connector;
939 struct drm_encoder *encoder;
940 struct drm_display_mode *scan; /* *modes, *bios_mode; */
941 struct drm_display_mode *fixed_mode = NULL;
943 struct drm_crtc *crtc;
948 if (!intel_lvds_supported(dev))
951 /* Skip init on machines we know falsely report LVDS */
952 if (dmi_check_system(intel_no_lvds))
955 pin = GMBUS_PORT_PANEL;
956 if (!lvds_is_present_in_vbt(dev, &pin)) {
957 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
961 if (HAS_PCH_SPLIT(dev)) {
962 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
964 if (dev_priv->vbt.edp_support) {
965 DRM_DEBUG_KMS("disable LVDS for eDP support\n");
970 lvds_encoder = kzalloc(sizeof(*lvds_encoder), GFP_KERNEL);
974 lvds_connector = kzalloc(sizeof(*lvds_connector), GFP_KERNEL);
975 if (!lvds_connector) {
980 lvds_encoder->attached_connector = lvds_connector;
982 intel_encoder = &lvds_encoder->base;
983 encoder = &intel_encoder->base;
984 intel_connector = &lvds_connector->base;
985 connector = &intel_connector->base;
986 drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
987 DRM_MODE_CONNECTOR_LVDS);
989 drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
990 DRM_MODE_ENCODER_LVDS);
992 intel_encoder->enable = intel_enable_lvds;
993 intel_encoder->pre_enable = intel_pre_enable_lvds;
994 intel_encoder->compute_config = intel_lvds_compute_config;
995 intel_encoder->mode_set = intel_lvds_mode_set;
996 intel_encoder->disable = intel_disable_lvds;
997 intel_encoder->get_hw_state = intel_lvds_get_hw_state;
998 intel_encoder->get_config = intel_lvds_get_config;
999 intel_connector->get_hw_state = intel_connector_get_hw_state;
1001 intel_connector_attach_encoder(intel_connector, intel_encoder);
1002 intel_encoder->type = INTEL_OUTPUT_LVDS;
1004 intel_encoder->cloneable = false;
1005 if (HAS_PCH_SPLIT(dev))
1006 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
1007 else if (IS_GEN4(dev))
1008 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
1010 intel_encoder->crtc_mask = (1 << 1);
1012 drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
1013 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
1014 connector->interlace_allowed = false;
1015 connector->doublescan_allowed = false;
1017 if (HAS_PCH_SPLIT(dev)) {
1018 lvds_encoder->reg = PCH_LVDS;
1020 lvds_encoder->reg = LVDS;
1023 /* create the scaling mode property */
1024 drm_mode_create_scaling_mode_property(dev);
1025 drm_object_attach_property(&connector->base,
1026 dev->mode_config.scaling_mode_property,
1027 DRM_MODE_SCALE_ASPECT);
1028 intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
1031 * 1) check for EDID on DDC
1032 * 2) check for VBT data
1033 * 3) check to see if LVDS is already on
1034 * if none of the above, no panel
1035 * 4) make sure lid is open
1036 * if closed, act like it's not there for now
1040 * Attempt to get the fixed panel mode from DDC. Assume that the
1041 * preferred mode is the right one.
1043 edid = drm_get_edid(connector, intel_gmbus_get_adapter(dev_priv, pin));
1045 if (drm_add_edid_modes(connector, edid)) {
1046 drm_mode_connector_update_edid_property(connector,
1050 edid = ERR_PTR(-EINVAL);
1053 edid = ERR_PTR(-ENOENT);
1055 lvds_connector->base.edid = edid;
1057 if (IS_ERR_OR_NULL(edid)) {
1058 /* Didn't get an EDID, so
1059 * Set wide sync ranges so we get all modes
1060 * handed to valid_mode for checking
1062 connector->display_info.min_vfreq = 0;
1063 connector->display_info.max_vfreq = 200;
1064 connector->display_info.min_hfreq = 0;
1065 connector->display_info.max_hfreq = 200;
1068 list_for_each_entry(scan, &connector->probed_modes, head) {
1069 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
1070 DRM_DEBUG_KMS("using preferred mode from EDID: ");
1071 drm_mode_debug_printmodeline(scan);
1073 fixed_mode = drm_mode_duplicate(dev, scan);
1075 intel_find_lvds_downclock(dev, fixed_mode,
1082 /* Failed to get EDID, what about VBT? */
1083 if (dev_priv->vbt.lfp_lvds_vbt_mode) {
1084 DRM_DEBUG_KMS("using mode from VBT: ");
1085 drm_mode_debug_printmodeline(dev_priv->vbt.lfp_lvds_vbt_mode);
1087 fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt.lfp_lvds_vbt_mode);
1089 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1095 * If we didn't get EDID, try checking if the panel is already turned
1096 * on. If so, assume that whatever is currently programmed is the
1100 /* Ironlake: FIXME if still fail, not try pipe mode now */
1101 if (HAS_PCH_SPLIT(dev))
1104 lvds = I915_READ(LVDS);
1105 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1106 crtc = intel_get_crtc_for_pipe(dev, pipe);
1108 if (crtc && (lvds & LVDS_PORT_EN)) {
1109 fixed_mode = intel_crtc_mode_get(dev, crtc);
1111 DRM_DEBUG_KMS("using current (BIOS) mode: ");
1112 drm_mode_debug_printmodeline(fixed_mode);
1113 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1118 /* If we still don't have a mode after all that, give up. */
1123 lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder);
1124 DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
1125 lvds_encoder->is_dual_link ? "dual" : "single");
1128 * Unlock registers and just
1129 * leave them unlocked
1131 if (HAS_PCH_SPLIT(dev)) {
1132 I915_WRITE(PCH_PP_CONTROL,
1133 I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
1135 I915_WRITE(PP_CONTROL,
1136 I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
1138 lvds_connector->lid_notifier.notifier_call = intel_lid_notify;
1139 if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) {
1140 DRM_DEBUG_KMS("lid notifier registration failed\n");
1141 lvds_connector->lid_notifier.notifier_call = NULL;
1143 drm_sysfs_connector_add(connector);
1145 intel_panel_init(&intel_connector->panel, fixed_mode);
1146 intel_panel_setup_backlight(connector);
1151 DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1152 drm_connector_cleanup(connector);
1153 drm_encoder_cleanup(encoder);
1155 drm_mode_destroy(dev, fixed_mode);
1156 kfree(lvds_encoder);
1157 kfree(lvds_connector);