2 * Copyright © 2006-2010 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
28 * Chris Wilson <chris@chris-wilson.co.uk>
31 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
33 #include <linux/moduleparam.h>
34 #include "intel_drv.h"
36 #define PCI_LBPC 0xf4 /* legacy/combination backlight modes */
39 intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
40 struct drm_display_mode *adjusted_mode)
42 adjusted_mode->hdisplay = fixed_mode->hdisplay;
43 adjusted_mode->hsync_start = fixed_mode->hsync_start;
44 adjusted_mode->hsync_end = fixed_mode->hsync_end;
45 adjusted_mode->htotal = fixed_mode->htotal;
47 adjusted_mode->vdisplay = fixed_mode->vdisplay;
48 adjusted_mode->vsync_start = fixed_mode->vsync_start;
49 adjusted_mode->vsync_end = fixed_mode->vsync_end;
50 adjusted_mode->vtotal = fixed_mode->vtotal;
52 adjusted_mode->clock = fixed_mode->clock;
55 /* adjusted_mode has been preset to be the panel's fixed mode */
57 intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
58 struct intel_crtc_config *pipe_config,
61 struct drm_display_mode *mode, *adjusted_mode;
62 int x, y, width, height;
64 mode = &pipe_config->requested_mode;
65 adjusted_mode = &pipe_config->adjusted_mode;
67 x = y = width = height = 0;
69 /* Native modes don't need fitting */
70 if (adjusted_mode->hdisplay == mode->hdisplay &&
71 adjusted_mode->vdisplay == mode->vdisplay)
74 switch (fitting_mode) {
75 case DRM_MODE_SCALE_CENTER:
76 width = mode->hdisplay;
77 height = mode->vdisplay;
78 x = (adjusted_mode->hdisplay - width + 1)/2;
79 y = (adjusted_mode->vdisplay - height + 1)/2;
82 case DRM_MODE_SCALE_ASPECT:
83 /* Scale but preserve the aspect ratio */
85 u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
86 u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
87 if (scaled_width > scaled_height) { /* pillar */
88 width = scaled_height / mode->vdisplay;
91 x = (adjusted_mode->hdisplay - width + 1) / 2;
93 height = adjusted_mode->vdisplay;
94 } else if (scaled_width < scaled_height) { /* letter */
95 height = scaled_width / mode->hdisplay;
98 y = (adjusted_mode->vdisplay - height + 1) / 2;
100 width = adjusted_mode->hdisplay;
103 width = adjusted_mode->hdisplay;
104 height = adjusted_mode->vdisplay;
109 case DRM_MODE_SCALE_FULLSCREEN:
111 width = adjusted_mode->hdisplay;
112 height = adjusted_mode->vdisplay;
116 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
121 pipe_config->pch_pfit.pos = (x << 16) | y;
122 pipe_config->pch_pfit.size = (width << 16) | height;
126 centre_horizontally(struct drm_display_mode *mode,
129 u32 border, sync_pos, blank_width, sync_width;
131 /* keep the hsync and hblank widths constant */
132 sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
133 blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
134 sync_pos = (blank_width - sync_width + 1) / 2;
136 border = (mode->hdisplay - width + 1) / 2;
137 border += border & 1; /* make the border even */
139 mode->crtc_hdisplay = width;
140 mode->crtc_hblank_start = width + border;
141 mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
143 mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
144 mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
148 centre_vertically(struct drm_display_mode *mode,
151 u32 border, sync_pos, blank_width, sync_width;
153 /* keep the vsync and vblank widths constant */
154 sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
155 blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
156 sync_pos = (blank_width - sync_width + 1) / 2;
158 border = (mode->vdisplay - height + 1) / 2;
160 mode->crtc_vdisplay = height;
161 mode->crtc_vblank_start = height + border;
162 mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
164 mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
165 mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
168 static inline u32 panel_fitter_scaling(u32 source, u32 target)
171 * Floating point operation is not supported. So the FACTOR
172 * is defined, which can avoid the floating point computation
173 * when calculating the panel ratio.
176 #define FACTOR (1 << ACCURACY)
177 u32 ratio = source * FACTOR / target;
178 return (FACTOR * ratio + FACTOR/2) / FACTOR;
181 void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
182 struct intel_crtc_config *pipe_config,
185 struct drm_device *dev = intel_crtc->base.dev;
186 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
187 struct drm_display_mode *mode, *adjusted_mode;
189 mode = &pipe_config->requested_mode;
190 adjusted_mode = &pipe_config->adjusted_mode;
192 /* Native modes don't need fitting */
193 if (adjusted_mode->hdisplay == mode->hdisplay &&
194 adjusted_mode->vdisplay == mode->vdisplay)
197 drm_mode_set_crtcinfo(adjusted_mode, 0);
198 pipe_config->timings_set = true;
200 switch (fitting_mode) {
201 case DRM_MODE_SCALE_CENTER:
203 * For centered modes, we have to calculate border widths &
204 * heights and modify the values programmed into the CRTC.
206 centre_horizontally(adjusted_mode, mode->hdisplay);
207 centre_vertically(adjusted_mode, mode->vdisplay);
208 border = LVDS_BORDER_ENABLE;
210 case DRM_MODE_SCALE_ASPECT:
211 /* Scale but preserve the aspect ratio */
212 if (INTEL_INFO(dev)->gen >= 4) {
213 u32 scaled_width = adjusted_mode->hdisplay *
215 u32 scaled_height = mode->hdisplay *
216 adjusted_mode->vdisplay;
218 /* 965+ is easy, it does everything in hw */
219 if (scaled_width > scaled_height)
220 pfit_control |= PFIT_ENABLE |
222 else if (scaled_width < scaled_height)
223 pfit_control |= PFIT_ENABLE |
225 else if (adjusted_mode->hdisplay != mode->hdisplay)
226 pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
228 u32 scaled_width = adjusted_mode->hdisplay *
230 u32 scaled_height = mode->hdisplay *
231 adjusted_mode->vdisplay;
233 * For earlier chips we have to calculate the scaling
234 * ratio by hand and program it into the
235 * PFIT_PGM_RATIO register
237 if (scaled_width > scaled_height) { /* pillar */
238 centre_horizontally(adjusted_mode,
242 border = LVDS_BORDER_ENABLE;
243 if (mode->vdisplay != adjusted_mode->vdisplay) {
244 u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
245 pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
246 bits << PFIT_VERT_SCALE_SHIFT);
247 pfit_control |= (PFIT_ENABLE |
248 VERT_INTERP_BILINEAR |
249 HORIZ_INTERP_BILINEAR);
251 } else if (scaled_width < scaled_height) { /* letter */
252 centre_vertically(adjusted_mode,
256 border = LVDS_BORDER_ENABLE;
257 if (mode->hdisplay != adjusted_mode->hdisplay) {
258 u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
259 pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
260 bits << PFIT_VERT_SCALE_SHIFT);
261 pfit_control |= (PFIT_ENABLE |
262 VERT_INTERP_BILINEAR |
263 HORIZ_INTERP_BILINEAR);
266 /* Aspects match, Let hw scale both directions */
267 pfit_control |= (PFIT_ENABLE |
268 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
269 VERT_INTERP_BILINEAR |
270 HORIZ_INTERP_BILINEAR);
274 case DRM_MODE_SCALE_FULLSCREEN:
276 * Full scaling, even if it changes the aspect ratio.
277 * Fortunately this is all done for us in hw.
279 if (mode->vdisplay != adjusted_mode->vdisplay ||
280 mode->hdisplay != adjusted_mode->hdisplay) {
281 pfit_control |= PFIT_ENABLE;
282 if (INTEL_INFO(dev)->gen >= 4)
283 pfit_control |= PFIT_SCALING_AUTO;
285 pfit_control |= (VERT_AUTO_SCALE |
286 VERT_INTERP_BILINEAR |
288 HORIZ_INTERP_BILINEAR);
292 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
296 /* 965+ wants fuzzy fitting */
297 /* FIXME: handle multiple panels by failing gracefully */
298 if (INTEL_INFO(dev)->gen >= 4)
299 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
303 if ((pfit_control & PFIT_ENABLE) == 0) {
308 /* Make sure pre-965 set dither correctly for 18bpp panels. */
309 if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18)
310 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
312 pipe_config->gmch_pfit.control = pfit_control;
313 pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
314 pipe_config->gmch_pfit.lvds_border_bits = border;
317 static int is_backlight_combination_mode(struct drm_device *dev)
319 struct drm_i915_private *dev_priv = dev->dev_private;
321 if (INTEL_INFO(dev)->gen >= 4)
322 return I915_READ(BLC_PWM_CTL2) & BLM_COMBINATION_MODE;
325 return I915_READ(BLC_PWM_CTL) & BLM_LEGACY_MODE;
330 /* XXX: query mode clock or hardware clock and program max PWM appropriately
333 static u32 i915_read_blc_pwm_ctl(struct drm_device *dev)
335 struct drm_i915_private *dev_priv = dev->dev_private;
338 WARN_ON_SMP(!spin_is_locked(&dev_priv->backlight.lock));
340 /* Restore the CTL value if it lost, e.g. GPU reset */
342 if (HAS_PCH_SPLIT(dev_priv->dev)) {
343 val = I915_READ(BLC_PWM_PCH_CTL2);
344 if (dev_priv->regfile.saveBLC_PWM_CTL2 == 0) {
345 dev_priv->regfile.saveBLC_PWM_CTL2 = val;
346 } else if (val == 0) {
347 val = dev_priv->regfile.saveBLC_PWM_CTL2;
348 I915_WRITE(BLC_PWM_PCH_CTL2, val);
351 val = I915_READ(BLC_PWM_CTL);
352 if (dev_priv->regfile.saveBLC_PWM_CTL == 0) {
353 dev_priv->regfile.saveBLC_PWM_CTL = val;
354 if (INTEL_INFO(dev)->gen >= 4)
355 dev_priv->regfile.saveBLC_PWM_CTL2 =
356 I915_READ(BLC_PWM_CTL2);
357 } else if (val == 0) {
358 val = dev_priv->regfile.saveBLC_PWM_CTL;
359 I915_WRITE(BLC_PWM_CTL, val);
360 if (INTEL_INFO(dev)->gen >= 4)
361 I915_WRITE(BLC_PWM_CTL2,
362 dev_priv->regfile.saveBLC_PWM_CTL2);
369 static u32 intel_panel_get_max_backlight(struct drm_device *dev)
373 max = i915_read_blc_pwm_ctl(dev);
375 if (HAS_PCH_SPLIT(dev)) {
378 if (INTEL_INFO(dev)->gen < 4)
383 if (is_backlight_combination_mode(dev))
387 DRM_DEBUG_DRIVER("max backlight PWM = %d\n", max);
392 static int i915_panel_invert_brightness;
393 MODULE_PARM_DESC(invert_brightness, "Invert backlight brightness "
394 "(-1 force normal, 0 machine defaults, 1 force inversion), please "
395 "report PCI device ID, subsystem vendor and subsystem device ID "
396 "to dri-devel@lists.freedesktop.org, if your machine needs it. "
397 "It will then be included in an upcoming module version.");
398 module_param_named(invert_brightness, i915_panel_invert_brightness, int, 0600);
399 static u32 intel_panel_compute_brightness(struct drm_device *dev, u32 val)
401 struct drm_i915_private *dev_priv = dev->dev_private;
403 if (i915_panel_invert_brightness < 0)
406 if (i915_panel_invert_brightness > 0 ||
407 dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
408 u32 max = intel_panel_get_max_backlight(dev);
416 static u32 intel_panel_get_backlight(struct drm_device *dev)
418 struct drm_i915_private *dev_priv = dev->dev_private;
422 spin_lock_irqsave(&dev_priv->backlight.lock, flags);
424 if (HAS_PCH_SPLIT(dev)) {
425 val = I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
427 val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
428 if (INTEL_INFO(dev)->gen < 4)
431 if (is_backlight_combination_mode(dev)) {
434 pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc);
439 val = intel_panel_compute_brightness(dev, val);
441 spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
443 DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
447 static void intel_pch_panel_set_backlight(struct drm_device *dev, u32 level)
449 struct drm_i915_private *dev_priv = dev->dev_private;
450 u32 val = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
451 I915_WRITE(BLC_PWM_CPU_CTL, val | level);
454 static void intel_panel_actually_set_backlight(struct drm_device *dev, u32 level)
456 struct drm_i915_private *dev_priv = dev->dev_private;
459 DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
460 level = intel_panel_compute_brightness(dev, level);
462 if (HAS_PCH_SPLIT(dev))
463 return intel_pch_panel_set_backlight(dev, level);
465 if (is_backlight_combination_mode(dev)) {
466 u32 max = intel_panel_get_max_backlight(dev);
469 /* we're screwed, but keep behaviour backwards compatible */
473 lbpc = level * 0xfe / max + 1;
475 pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc);
478 tmp = I915_READ(BLC_PWM_CTL);
479 if (INTEL_INFO(dev)->gen < 4)
481 tmp &= ~BACKLIGHT_DUTY_CYCLE_MASK;
482 I915_WRITE(BLC_PWM_CTL, tmp | level);
485 /* set backlight brightness to level in range [0..max] */
486 void intel_panel_set_backlight(struct drm_device *dev, u32 level, u32 max)
488 struct drm_i915_private *dev_priv = dev->dev_private;
492 spin_lock_irqsave(&dev_priv->backlight.lock, flags);
494 freq = intel_panel_get_max_backlight(dev);
496 /* we are screwed, bail out */
500 /* scale to hardware, but be careful to not overflow */
502 level = level * freq / max;
504 level = freq / max * level;
506 dev_priv->backlight.level = level;
507 if (dev_priv->backlight.device)
508 dev_priv->backlight.device->props.brightness = level;
510 if (dev_priv->backlight.enabled)
511 intel_panel_actually_set_backlight(dev, level);
513 spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
516 void intel_panel_disable_backlight(struct drm_device *dev)
518 struct drm_i915_private *dev_priv = dev->dev_private;
522 * Do not disable backlight on the vgaswitcheroo path. When switching
523 * away from i915, the other client may depend on i915 to handle the
524 * backlight. This will leave the backlight on unnecessarily when
525 * another client is not activated.
527 if (dev->switch_power_state == DRM_SWITCH_POWER_CHANGING) {
528 DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n");
532 spin_lock_irqsave(&dev_priv->backlight.lock, flags);
534 dev_priv->backlight.enabled = false;
535 intel_panel_actually_set_backlight(dev, 0);
537 if (INTEL_INFO(dev)->gen >= 4) {
540 reg = HAS_PCH_SPLIT(dev) ? BLC_PWM_CPU_CTL2 : BLC_PWM_CTL2;
542 I915_WRITE(reg, I915_READ(reg) & ~BLM_PWM_ENABLE);
544 if (HAS_PCH_SPLIT(dev)) {
545 tmp = I915_READ(BLC_PWM_PCH_CTL1);
546 tmp &= ~BLM_PCH_PWM_ENABLE;
547 I915_WRITE(BLC_PWM_PCH_CTL1, tmp);
551 spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
554 void intel_panel_enable_backlight(struct drm_device *dev,
557 struct drm_i915_private *dev_priv = dev->dev_private;
558 enum transcoder cpu_transcoder =
559 intel_pipe_to_cpu_transcoder(dev_priv, pipe);
562 spin_lock_irqsave(&dev_priv->backlight.lock, flags);
564 if (dev_priv->backlight.level == 0) {
565 dev_priv->backlight.level = intel_panel_get_max_backlight(dev);
566 if (dev_priv->backlight.device)
567 dev_priv->backlight.device->props.brightness =
568 dev_priv->backlight.level;
571 if (INTEL_INFO(dev)->gen >= 4) {
574 reg = HAS_PCH_SPLIT(dev) ? BLC_PWM_CPU_CTL2 : BLC_PWM_CTL2;
577 tmp = I915_READ(reg);
579 /* Note that this can also get called through dpms changes. And
580 * we don't track the backlight dpms state, hence check whether
581 * we have to do anything first. */
582 if (tmp & BLM_PWM_ENABLE)
585 if (INTEL_INFO(dev)->num_pipes == 3)
586 tmp &= ~BLM_PIPE_SELECT_IVB;
588 tmp &= ~BLM_PIPE_SELECT;
590 if (cpu_transcoder == TRANSCODER_EDP)
591 tmp |= BLM_TRANSCODER_EDP;
593 tmp |= BLM_PIPE(cpu_transcoder);
594 tmp &= ~BLM_PWM_ENABLE;
596 I915_WRITE(reg, tmp);
598 I915_WRITE(reg, tmp | BLM_PWM_ENABLE);
600 if (HAS_PCH_SPLIT(dev) &&
601 !(dev_priv->quirks & QUIRK_NO_PCH_PWM_ENABLE)) {
602 tmp = I915_READ(BLC_PWM_PCH_CTL1);
603 tmp |= BLM_PCH_PWM_ENABLE;
604 tmp &= ~BLM_PCH_OVERRIDE_ENABLE;
605 I915_WRITE(BLC_PWM_PCH_CTL1, tmp);
610 /* Call below after setting BLC_PWM_CPU_CTL2 and BLC_PWM_PCH_CTL1.
611 * BLC_PWM_CPU_CTL may be cleared to zero automatically when these
614 dev_priv->backlight.enabled = true;
615 intel_panel_actually_set_backlight(dev, dev_priv->backlight.level);
617 spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
620 static void intel_panel_init_backlight(struct drm_device *dev)
622 struct drm_i915_private *dev_priv = dev->dev_private;
624 dev_priv->backlight.level = intel_panel_get_backlight(dev);
625 dev_priv->backlight.enabled = dev_priv->backlight.level != 0;
628 enum drm_connector_status
629 intel_panel_detect(struct drm_device *dev)
631 struct drm_i915_private *dev_priv = dev->dev_private;
633 /* Assume that the BIOS does not lie through the OpRegion... */
634 if (!i915_panel_ignore_lid && dev_priv->opregion.lid_state) {
635 return ioread32(dev_priv->opregion.lid_state) & 0x1 ?
636 connector_status_connected :
637 connector_status_disconnected;
640 switch (i915_panel_ignore_lid) {
642 return connector_status_connected;
644 return connector_status_disconnected;
646 return connector_status_unknown;
650 #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
651 static int intel_panel_update_status(struct backlight_device *bd)
653 struct drm_device *dev = bl_get_data(bd);
654 intel_panel_set_backlight(dev, bd->props.brightness,
655 bd->props.max_brightness);
659 static int intel_panel_get_brightness(struct backlight_device *bd)
661 struct drm_device *dev = bl_get_data(bd);
662 return intel_panel_get_backlight(dev);
665 static const struct backlight_ops intel_panel_bl_ops = {
666 .update_status = intel_panel_update_status,
667 .get_brightness = intel_panel_get_brightness,
670 int intel_panel_setup_backlight(struct drm_connector *connector)
672 struct drm_device *dev = connector->dev;
673 struct drm_i915_private *dev_priv = dev->dev_private;
674 struct backlight_properties props;
677 intel_panel_init_backlight(dev);
679 if (WARN_ON(dev_priv->backlight.device))
682 memset(&props, 0, sizeof(props));
683 props.type = BACKLIGHT_RAW;
684 props.brightness = dev_priv->backlight.level;
686 spin_lock_irqsave(&dev_priv->backlight.lock, flags);
687 props.max_brightness = intel_panel_get_max_backlight(dev);
688 spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
690 if (props.max_brightness == 0) {
691 DRM_DEBUG_DRIVER("Failed to get maximum backlight value\n");
694 dev_priv->backlight.device =
695 backlight_device_register("intel_backlight",
696 &connector->kdev, dev,
697 &intel_panel_bl_ops, &props);
699 if (IS_ERR(dev_priv->backlight.device)) {
700 DRM_ERROR("Failed to register backlight: %ld\n",
701 PTR_ERR(dev_priv->backlight.device));
702 dev_priv->backlight.device = NULL;
708 void intel_panel_destroy_backlight(struct drm_device *dev)
710 struct drm_i915_private *dev_priv = dev->dev_private;
711 if (dev_priv->backlight.device) {
712 backlight_device_unregister(dev_priv->backlight.device);
713 dev_priv->backlight.device = NULL;
717 int intel_panel_setup_backlight(struct drm_connector *connector)
719 intel_panel_init_backlight(connector->dev);
723 void intel_panel_destroy_backlight(struct drm_device *dev)
729 int intel_panel_init(struct intel_panel *panel,
730 struct drm_display_mode *fixed_mode)
732 panel->fixed_mode = fixed_mode;
737 void intel_panel_fini(struct intel_panel *panel)
739 struct intel_connector *intel_connector =
740 container_of(panel, struct intel_connector, panel);
742 if (panel->fixed_mode)
743 drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);