1 #ifndef _INTEL_RINGBUFFER_H_
2 #define _INTEL_RINGBUFFER_H_
11 struct intel_hw_status_page {
12 u32 __iomem *page_addr;
13 unsigned int gfx_addr;
14 struct drm_i915_gem_object *obj;
17 #define I915_RING_READ(reg) i915_gt_read(dev_priv, reg)
18 #define I915_RING_WRITE(reg, val) i915_gt_write(dev_priv, reg, val)
20 #define I915_READ_TAIL(ring) I915_RING_READ(RING_TAIL((ring)->mmio_base))
21 #define I915_WRITE_TAIL(ring, val) I915_RING_WRITE(RING_TAIL((ring)->mmio_base), val)
23 #define I915_READ_START(ring) I915_RING_READ(RING_START((ring)->mmio_base))
24 #define I915_WRITE_START(ring, val) I915_RING_WRITE(RING_START((ring)->mmio_base), val)
26 #define I915_READ_HEAD(ring) I915_RING_READ(RING_HEAD((ring)->mmio_base))
27 #define I915_WRITE_HEAD(ring, val) I915_RING_WRITE(RING_HEAD((ring)->mmio_base), val)
29 #define I915_READ_CTL(ring) I915_RING_READ(RING_CTL((ring)->mmio_base))
30 #define I915_WRITE_CTL(ring, val) I915_RING_WRITE(RING_CTL((ring)->mmio_base), val)
32 #define I915_READ_IMR(ring) I915_RING_READ(RING_IMR((ring)->mmio_base))
33 #define I915_WRITE_IMR(ring, val) I915_RING_WRITE(RING_IMR((ring)->mmio_base), val)
35 #define I915_READ_NOPID(ring) I915_RING_READ(RING_NOPID((ring)->mmio_base))
36 #define I915_READ_SYNC_0(ring) I915_RING_READ(RING_SYNC_0((ring)->mmio_base))
37 #define I915_READ_SYNC_1(ring) I915_RING_READ(RING_SYNC_1((ring)->mmio_base))
39 struct intel_ring_buffer {
48 struct drm_device *dev;
49 struct drm_i915_gem_object *obj;
56 struct intel_hw_status_page status_page;
61 u32 irq_seqno; /* last seq seem at irq time */
63 u32 sync_seqno[I915_NUM_RINGS-1];
64 bool __must_check (*irq_get)(struct intel_ring_buffer *ring);
65 void (*irq_put)(struct intel_ring_buffer *ring);
67 int (*init)(struct intel_ring_buffer *ring);
69 void (*write_tail)(struct intel_ring_buffer *ring,
71 int __must_check (*flush)(struct intel_ring_buffer *ring,
72 u32 invalidate_domains,
74 int (*add_request)(struct intel_ring_buffer *ring,
76 u32 (*get_seqno)(struct intel_ring_buffer *ring);
77 int (*dispatch_execbuffer)(struct intel_ring_buffer *ring,
78 u32 offset, u32 length);
79 void (*cleanup)(struct intel_ring_buffer *ring);
82 * List of objects currently involved in rendering from the
85 * Includes buffers having the contents of their GPU caches
86 * flushed, not necessarily primitives. last_rendering_seqno
87 * represents when the rendering involved will be completed.
89 * A reference is held on the buffer while on this list.
91 struct list_head active_list;
94 * List of breadcrumbs associated with GPU requests currently
97 struct list_head request_list;
100 * List of objects currently pending a GPU write flush.
102 * All elements on this list will belong to either the
103 * active_list or flushing_list, last_rendering_seqno can
104 * be used to differentiate between the two elements.
106 struct list_head gpu_write_list;
109 * Do we have some not yet emitted requests outstanding?
111 u32 outstanding_lazy_request;
113 wait_queue_head_t irq_queue;
120 intel_ring_sync_index(struct intel_ring_buffer *ring,
121 struct intel_ring_buffer *other)
126 * cs -> 0 = vcs, 1 = bcs
127 * vcs -> 0 = bcs, 1 = cs,
128 * bcs -> 0 = cs, 1 = vcs.
131 idx = (other - ring) - 1;
133 idx += I915_NUM_RINGS;
139 intel_read_status_page(struct intel_ring_buffer *ring,
142 return ioread32(ring->status_page.page_addr + reg);
145 void intel_cleanup_ring_buffer(struct intel_ring_buffer *ring);
146 int __must_check intel_wait_ring_buffer(struct intel_ring_buffer *ring, int n);
147 int __must_check intel_ring_begin(struct intel_ring_buffer *ring, int n);
149 static inline void intel_ring_emit(struct intel_ring_buffer *ring,
152 iowrite32(data, ring->virtual_start + ring->tail);
156 void intel_ring_advance(struct intel_ring_buffer *ring);
158 u32 intel_ring_get_seqno(struct intel_ring_buffer *ring);
159 int intel_ring_sync(struct intel_ring_buffer *ring,
160 struct intel_ring_buffer *to,
163 int intel_init_render_ring_buffer(struct drm_device *dev);
164 int intel_init_bsd_ring_buffer(struct drm_device *dev);
165 int intel_init_blt_ring_buffer(struct drm_device *dev);
167 u32 intel_ring_get_active_head(struct intel_ring_buffer *ring);
168 void intel_ring_setup_status_page(struct intel_ring_buffer *ring);
171 int intel_render_ring_init_dri(struct drm_device *dev, u64 start, u32 size);
173 #endif /* _INTEL_RINGBUFFER_H_ */