drivers/gpu/drm/i915/intel_ringbuffer.h

   1 #ifndef _INTEL_RINGBUFFER_H_
   2 #define _INTEL_RINGBUFFER_H_
   3
   4 enum {
   5     RCS = 0x0,
   6     VCS,
   7     BCS,
   8     I915_NUM_RINGS,
   9 };
  10
  11 struct  intel_hw_status_page {
  12         u32     __iomem *page_addr;
  13         unsigned int    gfx_addr;
  14         struct          drm_i915_gem_object *obj;
  15 };
  16
  17 #define I915_RING_READ(reg) i915_safe_read(dev_priv, reg)
  18
  19 #define I915_READ_TAIL(ring) I915_RING_READ(RING_TAIL(ring->mmio_base))
  20 #define I915_WRITE_TAIL(ring, val) I915_WRITE(RING_TAIL(ring->mmio_base), val)
  21
  22 #define I915_READ_START(ring) I915_RING_READ(RING_START(ring->mmio_base))
  23 #define I915_WRITE_START(ring, val) I915_WRITE(RING_START(ring->mmio_base), val)
  24
  25 #define I915_READ_HEAD(ring)  I915_RING_READ(RING_HEAD(ring->mmio_base))
  26 #define I915_WRITE_HEAD(ring, val) I915_WRITE(RING_HEAD(ring->mmio_base), val)
  27
  28 #define I915_READ_CTL(ring) I915_RING_READ(RING_CTL(ring->mmio_base))
  29 #define I915_WRITE_CTL(ring, val) I915_WRITE(RING_CTL(ring->mmio_base), val)
  30
  31 #define I915_READ_NOPID(ring) I915_RING_READ(RING_NOPID(ring->mmio_base))
  32 #define I915_READ_SYNC_0(ring) I915_RING_READ(RING_SYNC_0(ring->mmio_base))
  33 #define I915_READ_SYNC_1(ring) I915_RING_READ(RING_SYNC_1(ring->mmio_base))
  34
  35 struct  intel_ring_buffer {
  36         const char      *name;
  37         enum intel_ring_id {
  38                 RING_RENDER = 0x1,
  39                 RING_BSD = 0x2,
  40                 RING_BLT = 0x4,
  41         } id;
  42         u32             mmio_base;
  43         void            *virtual_start;
  44         struct          drm_device *dev;
  45         struct          drm_i915_gem_object *obj;
  46
  47         u32             actual_head;
  48         u32             head;
  49         u32             tail;
  50         int             space;
  51         int             size;
  52         int             effective_size;
  53         struct intel_hw_status_page status_page;
  54
  55         u32             irq_seqno;              /* last seq seem at irq time */
  56         u32             waiting_seqno;
  57         u32             sync_seqno[I915_NUM_RINGS-1];
  58         atomic_t        irq_refcount;
  59         bool __must_check (*irq_get)(struct intel_ring_buffer *ring);
  60         void            (*irq_put)(struct intel_ring_buffer *ring);
  61
  62         int             (*init)(struct intel_ring_buffer *ring);
  63
  64         void            (*write_tail)(struct intel_ring_buffer *ring,
  65                                       u32 value);
  66         int __must_check (*flush)(struct intel_ring_buffer *ring,
  67                                   u32   invalidate_domains,
  68                                   u32   flush_domains);
  69         int             (*add_request)(struct intel_ring_buffer *ring,
  70                                        u32 *seqno);
  71         u32             (*get_seqno)(struct intel_ring_buffer *ring);
  72         int             (*dispatch_execbuffer)(struct intel_ring_buffer *ring,
  73                                                u32 offset, u32 length);
  74         void            (*cleanup)(struct intel_ring_buffer *ring);
  75
  76         /**
  77          * List of objects currently involved in rendering from the
  78          * ringbuffer.
  79          *
  80          * Includes buffers having the contents of their GPU caches
  81          * flushed, not necessarily primitives.  last_rendering_seqno
  82          * represents when the rendering involved will be completed.
  83          *
  84          * A reference is held on the buffer while on this list.
  85          */
  86         struct list_head active_list;
  87
  88         /**
  89          * List of breadcrumbs associated with GPU requests currently
  90          * outstanding.
  91          */
  92         struct list_head request_list;
  93
  94         /**
  95          * List of objects currently pending a GPU write flush.
  96          *
  97          * All elements on this list will belong to either the
  98          * active_list or flushing_list, last_rendering_seqno can
  99          * be used to differentiate between the two elements.
 100          */
 101         struct list_head gpu_write_list;
 102
 103         /**
 104          * Do we have some not yet emitted requests outstanding?
 105          */
 106         u32 outstanding_lazy_request;
 107
 108         wait_queue_head_t irq_queue;
 109         drm_local_map_t map;
 110
 111         void *private;
 112 };
 113
 114 static inline u32
 115 intel_ring_sync_index(struct intel_ring_buffer *ring,
 116                       struct intel_ring_buffer *other)
 117 {
 118         int idx;
 119
 120         /*
 121          * cs -> 0 = vcs, 1 = bcs
 122          * vcs -> 0 = bcs, 1 = cs,
 123          * bcs -> 0 = cs, 1 = vcs.
 124          */
 125
 126         idx = (other - ring) - 1;
 127         if (idx < 0)
 128                 idx += I915_NUM_RINGS;
 129
 130         return idx;
 131 }
 132
 133 static inline u32
 134 intel_read_status_page(struct intel_ring_buffer *ring,
 135                        int reg)
 136 {
 137         return ioread32(ring->status_page.page_addr + reg);
 138 }
 139
 140 void intel_cleanup_ring_buffer(struct intel_ring_buffer *ring);
 141 int __must_check intel_wait_ring_buffer(struct intel_ring_buffer *ring, int n);
 142 int __must_check intel_ring_begin(struct intel_ring_buffer *ring, int n);
 143
 144 static inline void intel_ring_emit(struct intel_ring_buffer *ring,
 145                                    u32 data)
 146 {
 147         iowrite32(data, ring->virtual_start + ring->tail);
 148         ring->tail += 4;
 149 }
 150
 151 void intel_ring_advance(struct intel_ring_buffer *ring);
 152
 153 u32 intel_ring_get_seqno(struct intel_ring_buffer *ring);
 154 int intel_ring_sync(struct intel_ring_buffer *ring,
 155                     struct intel_ring_buffer *to,
 156                     u32 seqno);
 157
 158 int intel_init_render_ring_buffer(struct drm_device *dev);
 159 int intel_init_bsd_ring_buffer(struct drm_device *dev);
 160 int intel_init_blt_ring_buffer(struct drm_device *dev);
 161
 162 u32 intel_ring_get_active_head(struct intel_ring_buffer *ring);
 163 void intel_ring_setup_status_page(struct intel_ring_buffer *ring);
 164
 165 #endif /* _INTEL_RINGBUFFER_H_ */