drivers/gpu/drm/i915/intel_sdvo.c

   1 /*
   2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
   3  * Copyright © 2006-2007 Intel Corporation
   4  *   Jesse Barnes <jesse.barnes@intel.com>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23  * DEALINGS IN THE SOFTWARE.
  24  *
  25  * Authors:
  26  *      Eric Anholt <eric@anholt.net>
  27  */
  28 #include <linux/i2c.h>
  29 #include <linux/slab.h>
  30 #include <linux/delay.h>
  31 #include <linux/export.h>
  32 #include "drmP.h"
  33 #include "drm.h"
  34 #include "drm_crtc.h"
  35 #include "drm_edid.h"
  36 #include "intel_drv.h"
  37 #include "i915_drm.h"
  38 #include "i915_drv.h"
  39 #include "intel_sdvo_regs.h"
  40
  41 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
  42 #define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
  43 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
  44 #define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
  45
  46 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
  47                         SDVO_TV_MASK)
  48
  49 #define IS_TV(c)        (c->output_flag & SDVO_TV_MASK)
  50 #define IS_TMDS(c)      (c->output_flag & SDVO_TMDS_MASK)
  51 #define IS_LVDS(c)      (c->output_flag & SDVO_LVDS_MASK)
  52 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
  53 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
  54
  55
  56 static const char *tv_format_names[] = {
  57         "NTSC_M"   , "NTSC_J"  , "NTSC_443",
  58         "PAL_B"    , "PAL_D"   , "PAL_G"   ,
  59         "PAL_H"    , "PAL_I"   , "PAL_M"   ,
  60         "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
  61         "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
  62         "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
  63         "SECAM_60"
  64 };
  65
  66 #define TV_FORMAT_NUM  (sizeof(tv_format_names) / sizeof(*tv_format_names))
  67
  68 struct intel_sdvo {
  69         struct intel_encoder base;
  70
  71         struct i2c_adapter *i2c;
  72         u8 slave_addr;
  73
  74         struct i2c_adapter ddc;
  75
  76         /* Register for the SDVO device: SDVOB or SDVOC */
  77         uint32_t sdvo_reg;
  78
  79         /* Active outputs controlled by this SDVO output */
  80         uint16_t controlled_output;
  81
  82         /*
  83          * Capabilities of the SDVO device returned by
  84          * i830_sdvo_get_capabilities()
  85          */
  86         struct intel_sdvo_caps caps;
  87
  88         /* Pixel clock limitations reported by the SDVO device, in kHz */
  89         int pixel_clock_min, pixel_clock_max;
  90
  91         /*
  92         * For multiple function SDVO device,
  93         * this is for current attached outputs.
  94         */
  95         uint16_t attached_output;
  96
  97         /*
  98          * Hotplug activation bits for this device
  99          */
 100         uint8_t hotplug_active[2];
 101
 102         /**
 103          * This is used to select the color range of RBG outputs in HDMI mode.
 104          * It is only valid when using TMDS encoding and 8 bit per color mode.
 105          */
 106         uint32_t color_range;
 107
 108         /**
 109          * This is set if we're going to treat the device as TV-out.
 110          *
 111          * While we have these nice friendly flags for output types that ought
 112          * to decide this for us, the S-Video output on our HDMI+S-Video card
 113          * shows up as RGB1 (VGA).
 114          */
 115         bool is_tv;
 116
 117         /* On different gens SDVOB is at different places. */
 118         bool is_sdvob;
 119
 120         /* This is for current tv format name */
 121         int tv_format_index;
 122
 123         /**
 124          * This is set if we treat the device as HDMI, instead of DVI.
 125          */
 126         bool is_hdmi;
 127         bool has_hdmi_monitor;
 128         bool has_hdmi_audio;
 129
 130         /**
 131          * This is set if we detect output of sdvo device as LVDS and
 132          * have a valid fixed mode to use with the panel.
 133          */
 134         bool is_lvds;
 135
 136         /**
 137          * This is sdvo fixed pannel mode pointer
 138          */
 139         struct drm_display_mode *sdvo_lvds_fixed_mode;
 140
 141         /* DDC bus used by this SDVO encoder */
 142         uint8_t ddc_bus;
 143
 144         /* Input timings for adjusted_mode */
 145         struct intel_sdvo_dtd input_dtd;
 146 };
 147
 148 struct intel_sdvo_connector {
 149         struct intel_connector base;
 150
 151         /* Mark the type of connector */
 152         uint16_t output_flag;
 153
 154         enum hdmi_force_audio force_audio;
 155
 156         /* This contains all current supported TV format */
 157         u8 tv_format_supported[TV_FORMAT_NUM];
 158         int   format_supported_num;
 159         struct drm_property *tv_format;
 160
 161         /* add the property for the SDVO-TV */
 162         struct drm_property *left;
 163         struct drm_property *right;
 164         struct drm_property *top;
 165         struct drm_property *bottom;
 166         struct drm_property *hpos;
 167         struct drm_property *vpos;
 168         struct drm_property *contrast;
 169         struct drm_property *saturation;
 170         struct drm_property *hue;
 171         struct drm_property *sharpness;
 172         struct drm_property *flicker_filter;
 173         struct drm_property *flicker_filter_adaptive;
 174         struct drm_property *flicker_filter_2d;
 175         struct drm_property *tv_chroma_filter;
 176         struct drm_property *tv_luma_filter;
 177         struct drm_property *dot_crawl;
 178
 179         /* add the property for the SDVO-TV/LVDS */
 180         struct drm_property *brightness;
 181
 182         /* Add variable to record current setting for the above property */
 183         u32     left_margin, right_margin, top_margin, bottom_margin;
 184
 185         /* this is to get the range of margin.*/
 186         u32     max_hscan,  max_vscan;
 187         u32     max_hpos, cur_hpos;
 188         u32     max_vpos, cur_vpos;
 189         u32     cur_brightness, max_brightness;
 190         u32     cur_contrast,   max_contrast;
 191         u32     cur_saturation, max_saturation;
 192         u32     cur_hue,        max_hue;
 193         u32     cur_sharpness,  max_sharpness;
 194         u32     cur_flicker_filter,             max_flicker_filter;
 195         u32     cur_flicker_filter_adaptive,    max_flicker_filter_adaptive;
 196         u32     cur_flicker_filter_2d,          max_flicker_filter_2d;
 197         u32     cur_tv_chroma_filter,   max_tv_chroma_filter;
 198         u32     cur_tv_luma_filter,     max_tv_luma_filter;
 199         u32     cur_dot_crawl,  max_dot_crawl;
 200 };
 201
 202 static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
 203 {
 204         return container_of(encoder, struct intel_sdvo, base.base);
 205 }
 206
 207 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
 208 {
 209         return container_of(intel_attached_encoder(connector),
 210                             struct intel_sdvo, base);
 211 }
 212
 213 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
 214 {
 215         return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
 216 }
 217
 218 static bool
 219 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
 220 static bool
 221 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
 222                               struct intel_sdvo_connector *intel_sdvo_connector,
 223                               int type);
 224 static bool
 225 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
 226                                    struct intel_sdvo_connector *intel_sdvo_connector);
 227
 228 /**
 229  * Writes the SDVOB or SDVOC with the given value, but always writes both
 230  * SDVOB and SDVOC to work around apparent hardware issues (according to
 231  * comments in the BIOS).
 232  */
 233 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
 234 {
 235         struct drm_device *dev = intel_sdvo->base.base.dev;
 236         struct drm_i915_private *dev_priv = dev->dev_private;
 237         u32 bval = val, cval = val;
 238         int i;
 239
 240         if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
 241                 I915_WRITE(intel_sdvo->sdvo_reg, val);
 242                 I915_READ(intel_sdvo->sdvo_reg);
 243                 return;
 244         }
 245
 246         if (intel_sdvo->sdvo_reg == SDVOB) {
 247                 cval = I915_READ(SDVOC);
 248         } else {
 249                 bval = I915_READ(SDVOB);
 250         }
 251         /*
 252          * Write the registers twice for luck. Sometimes,
 253          * writing them only once doesn't appear to 'stick'.
 254          * The BIOS does this too. Yay, magic
 255          */
 256         for (i = 0; i < 2; i++)
 257         {
 258                 I915_WRITE(SDVOB, bval);
 259                 I915_READ(SDVOB);
 260                 I915_WRITE(SDVOC, cval);
 261                 I915_READ(SDVOC);
 262         }
 263 }
 264
 265 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
 266 {
 267         struct i2c_msg msgs[] = {
 268                 {
 269                         .addr = intel_sdvo->slave_addr,
 270                         .flags = 0,
 271                         .len = 1,
 272                         .buf = &addr,
 273                 },
 274                 {
 275                         .addr = intel_sdvo->slave_addr,
 276                         .flags = I2C_M_RD,
 277                         .len = 1,
 278                         .buf = ch,
 279                 }
 280         };
 281         int ret;
 282
 283         if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
 284                 return true;
 285
 286         DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
 287         return false;
 288 }
 289
 290 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
 291 /** Mapping of command numbers to names, for debug output */
 292 static const struct _sdvo_cmd_name {
 293         u8 cmd;
 294         const char *name;
 295 } sdvo_cmd_names[] = {
 296         SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
 297         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
 298         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
 299         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
 300         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
 301         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
 302         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
 303         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
 304         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
 305         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
 306         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
 307         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
 308         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
 309         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
 310         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
 311         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
 312         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
 313         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 314         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
 315         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 316         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
 317         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
 318         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
 319         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
 320         SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
 321         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
 322         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
 323         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
 324         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
 325         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
 326         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
 327         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
 328         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
 329         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
 330         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
 331         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
 332         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
 333         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
 334         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
 335         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
 336         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
 337         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
 338         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
 339
 340         /* Add the op code for SDVO enhancements */
 341         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
 342         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
 343         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
 344         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
 345         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
 346         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
 347         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
 348         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
 349         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
 350         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
 351         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
 352         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
 353         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
 354         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
 355         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
 356         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
 357         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
 358         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
 359         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
 360         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
 361         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
 362         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
 363         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
 364         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
 365         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
 366         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
 367         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
 368         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
 369         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
 370         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
 371         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
 372         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
 373         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
 374         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
 375         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
 376         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
 377         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
 378         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
 379         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
 380         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
 381         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
 382         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
 383         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
 384         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
 385
 386         /* HDMI op code */
 387         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
 388         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
 389         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
 390         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
 391         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
 392         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
 393         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
 394         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
 395         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
 396         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
 397         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
 398         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
 399         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
 400         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
 401         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
 402         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
 403         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
 404         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
 405         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
 406         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
 407 };
 408
 409 #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
 410
 411 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
 412                                    const void *args, int args_len)
 413 {
 414         int i;
 415
 416         DRM_DEBUG_KMS("%s: W: %02X ",
 417                                 SDVO_NAME(intel_sdvo), cmd);
 418         for (i = 0; i < args_len; i++)
 419                 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
 420         for (; i < 8; i++)
 421                 DRM_LOG_KMS("   ");
 422         for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
 423                 if (cmd == sdvo_cmd_names[i].cmd) {
 424                         DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
 425                         break;
 426                 }
 427         }
 428         if (i == ARRAY_SIZE(sdvo_cmd_names))
 429                 DRM_LOG_KMS("(%02X)", cmd);
 430         DRM_LOG_KMS("\n");
 431 }
 432
 433 static const char *cmd_status_names[] = {
 434         "Power on",
 435         "Success",
 436         "Not supported",
 437         "Invalid arg",
 438         "Pending",
 439         "Target not specified",
 440         "Scaling not supported"
 441 };
 442
 443 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
 444                                  const void *args, int args_len)
 445 {
 446         u8 *buf, status;
 447         struct i2c_msg *msgs;
 448         int i, ret = true;
 449
 450         buf = (u8 *)kzalloc(args_len * 2 + 2, GFP_KERNEL);
 451         if (!buf)
 452                 return false;
 453
 454         msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
 455         if (!msgs)
 456                 return false;
 457
 458         intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
 459
 460         for (i = 0; i < args_len; i++) {
 461                 msgs[i].addr = intel_sdvo->slave_addr;
 462                 msgs[i].flags = 0;
 463                 msgs[i].len = 2;
 464                 msgs[i].buf = buf + 2 *i;
 465                 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
 466                 buf[2*i + 1] = ((u8*)args)[i];
 467         }
 468         msgs[i].addr = intel_sdvo->slave_addr;
 469         msgs[i].flags = 0;
 470         msgs[i].len = 2;
 471         msgs[i].buf = buf + 2*i;
 472         buf[2*i + 0] = SDVO_I2C_OPCODE;
 473         buf[2*i + 1] = cmd;
 474
 475         /* the following two are to read the response */
 476         status = SDVO_I2C_CMD_STATUS;
 477         msgs[i+1].addr = intel_sdvo->slave_addr;
 478         msgs[i+1].flags = 0;
 479         msgs[i+1].len = 1;
 480         msgs[i+1].buf = &status;
 481
 482         msgs[i+2].addr = intel_sdvo->slave_addr;
 483         msgs[i+2].flags = I2C_M_RD;
 484         msgs[i+2].len = 1;
 485         msgs[i+2].buf = &status;
 486
 487         ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
 488         if (ret < 0) {
 489                 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
 490                 ret = false;
 491                 goto out;
 492         }
 493         if (ret != i+3) {
 494                 /* failure in I2C transfer */
 495                 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
 496                 ret = false;
 497         }
 498
 499 out:
 500         kfree(msgs);
 501         kfree(buf);
 502         return ret;
 503 }
 504
 505 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
 506                                      void *response, int response_len)
 507 {
 508         u8 retry = 5;
 509         u8 status;
 510         int i;
 511
 512         DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
 513
 514         /*
 515          * The documentation states that all commands will be
 516          * processed within 15µs, and that we need only poll
 517          * the status byte a maximum of 3 times in order for the
 518          * command to be complete.
 519          *
 520          * Check 5 times in case the hardware failed to read the docs.
 521          */
 522         if (!intel_sdvo_read_byte(intel_sdvo,
 523                                   SDVO_I2C_CMD_STATUS,
 524                                   &status))
 525                 goto log_fail;
 526
 527         while (status == SDVO_CMD_STATUS_PENDING && retry--) {
 528                 udelay(15);
 529                 if (!intel_sdvo_read_byte(intel_sdvo,
 530                                           SDVO_I2C_CMD_STATUS,
 531                                           &status))
 532                         goto log_fail;
 533         }
 534
 535         if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
 536                 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
 537         else
 538                 DRM_LOG_KMS("(??? %d)", status);
 539
 540         if (status != SDVO_CMD_STATUS_SUCCESS)
 541                 goto log_fail;
 542
 543         /* Read the command response */
 544         for (i = 0; i < response_len; i++) {
 545                 if (!intel_sdvo_read_byte(intel_sdvo,
 546                                           SDVO_I2C_RETURN_0 + i,
 547                                           &((u8 *)response)[i]))
 548                         goto log_fail;
 549                 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
 550         }
 551         DRM_LOG_KMS("\n");
 552         return true;
 553
 554 log_fail:
 555         DRM_LOG_KMS("... failed\n");
 556         return false;
 557 }
 558
 559 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
 560 {
 561         if (mode->clock >= 100000)
 562                 return 1;
 563         else if (mode->clock >= 50000)
 564                 return 2;
 565         else
 566                 return 4;
 567 }
 568
 569 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
 570                                               u8 ddc_bus)
 571 {
 572         /* This must be the immediately preceding write before the i2c xfer */
 573         return intel_sdvo_write_cmd(intel_sdvo,
 574                                     SDVO_CMD_SET_CONTROL_BUS_SWITCH,
 575                                     &ddc_bus, 1);
 576 }
 577
 578 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
 579 {
 580         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
 581                 return false;
 582
 583         return intel_sdvo_read_response(intel_sdvo, NULL, 0);
 584 }
 585
 586 static bool
 587 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
 588 {
 589         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
 590                 return false;
 591
 592         return intel_sdvo_read_response(intel_sdvo, value, len);
 593 }
 594
 595 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
 596 {
 597         struct intel_sdvo_set_target_input_args targets = {0};
 598         return intel_sdvo_set_value(intel_sdvo,
 599                                     SDVO_CMD_SET_TARGET_INPUT,
 600                                     &targets, sizeof(targets));
 601 }
 602
 603 /**
 604  * Return whether each input is trained.
 605  *
 606  * This function is making an assumption about the layout of the response,
 607  * which should be checked against the docs.
 608  */
 609 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
 610 {
 611         struct intel_sdvo_get_trained_inputs_response response;
 612
 613         BUILD_BUG_ON(sizeof(response) != 1);
 614         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
 615                                   &response, sizeof(response)))
 616                 return false;
 617
 618         *input_1 = response.input0_trained;
 619         *input_2 = response.input1_trained;
 620         return true;
 621 }
 622
 623 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
 624                                           u16 outputs)
 625 {
 626         return intel_sdvo_set_value(intel_sdvo,
 627                                     SDVO_CMD_SET_ACTIVE_OUTPUTS,
 628                                     &outputs, sizeof(outputs));
 629 }
 630
 631 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
 632                                                int mode)
 633 {
 634         u8 state = SDVO_ENCODER_STATE_ON;
 635
 636         switch (mode) {
 637         case DRM_MODE_DPMS_ON:
 638                 state = SDVO_ENCODER_STATE_ON;
 639                 break;
 640         case DRM_MODE_DPMS_STANDBY:
 641                 state = SDVO_ENCODER_STATE_STANDBY;
 642                 break;
 643         case DRM_MODE_DPMS_SUSPEND:
 644                 state = SDVO_ENCODER_STATE_SUSPEND;
 645                 break;
 646         case DRM_MODE_DPMS_OFF:
 647                 state = SDVO_ENCODER_STATE_OFF;
 648                 break;
 649         }
 650
 651         return intel_sdvo_set_value(intel_sdvo,
 652                                     SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
 653 }
 654
 655 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
 656                                                    int *clock_min,
 657                                                    int *clock_max)
 658 {
 659         struct intel_sdvo_pixel_clock_range clocks;
 660
 661         BUILD_BUG_ON(sizeof(clocks) != 4);
 662         if (!intel_sdvo_get_value(intel_sdvo,
 663                                   SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
 664                                   &clocks, sizeof(clocks)))
 665                 return false;
 666
 667         /* Convert the values from units of 10 kHz to kHz. */
 668         *clock_min = clocks.min * 10;
 669         *clock_max = clocks.max * 10;
 670         return true;
 671 }
 672
 673 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
 674                                          u16 outputs)
 675 {
 676         return intel_sdvo_set_value(intel_sdvo,
 677                                     SDVO_CMD_SET_TARGET_OUTPUT,
 678                                     &outputs, sizeof(outputs));
 679 }
 680
 681 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 682                                   struct intel_sdvo_dtd *dtd)
 683 {
 684         return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 685                 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 686 }
 687
 688 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
 689                                          struct intel_sdvo_dtd *dtd)
 690 {
 691         return intel_sdvo_set_timing(intel_sdvo,
 692                                      SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
 693 }
 694
 695 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
 696                                          struct intel_sdvo_dtd *dtd)
 697 {
 698         return intel_sdvo_set_timing(intel_sdvo,
 699                                      SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
 700 }
 701
 702 static bool
 703 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 704                                          uint16_t clock,
 705                                          uint16_t width,
 706                                          uint16_t height)
 707 {
 708         struct intel_sdvo_preferred_input_timing_args args;
 709
 710         memset(&args, 0, sizeof(args));
 711         args.clock = clock;
 712         args.width = width;
 713         args.height = height;
 714         args.interlace = 0;
 715
 716         if (intel_sdvo->is_lvds &&
 717            (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
 718             intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
 719                 args.scaled = 1;
 720
 721         return intel_sdvo_set_value(intel_sdvo,
 722                                     SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
 723                                     &args, sizeof(args));
 724 }
 725
 726 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 727                                                   struct intel_sdvo_dtd *dtd)
 728 {
 729         BUILD_BUG_ON(sizeof(dtd->part1) != 8);
 730         BUILD_BUG_ON(sizeof(dtd->part2) != 8);
 731         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
 732                                     &dtd->part1, sizeof(dtd->part1)) &&
 733                 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
 734                                      &dtd->part2, sizeof(dtd->part2));
 735 }
 736
 737 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
 738 {
 739         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
 740 }
 741
 742 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
 743                                          const struct drm_display_mode *mode)
 744 {
 745         uint16_t width, height;
 746         uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
 747         uint16_t h_sync_offset, v_sync_offset;
 748         int mode_clock;
 749
 750         width = mode->hdisplay;
 751         height = mode->vdisplay;
 752
 753         /* do some mode translations */
 754         h_blank_len = mode->htotal - mode->hdisplay;
 755         h_sync_len = mode->hsync_end - mode->hsync_start;
 756
 757         v_blank_len = mode->vtotal - mode->vdisplay;
 758         v_sync_len = mode->vsync_end - mode->vsync_start;
 759
 760         h_sync_offset = mode->hsync_start - mode->hdisplay;
 761         v_sync_offset = mode->vsync_start - mode->vdisplay;
 762
 763         mode_clock = mode->clock;
 764         mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1;
 765         mode_clock /= 10;
 766         dtd->part1.clock = mode_clock;
 767
 768         dtd->part1.h_active = width & 0xff;
 769         dtd->part1.h_blank = h_blank_len & 0xff;
 770         dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
 771                 ((h_blank_len >> 8) & 0xf);
 772         dtd->part1.v_active = height & 0xff;
 773         dtd->part1.v_blank = v_blank_len & 0xff;
 774         dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
 775                 ((v_blank_len >> 8) & 0xf);
 776
 777         dtd->part2.h_sync_off = h_sync_offset & 0xff;
 778         dtd->part2.h_sync_width = h_sync_len & 0xff;
 779         dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
 780                 (v_sync_len & 0xf);
 781         dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
 782                 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
 783                 ((v_sync_len & 0x30) >> 4);
 784
 785         dtd->part2.dtd_flags = 0x18;
 786         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
 787                 dtd->part2.dtd_flags |= 0x2;
 788         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 789                 dtd->part2.dtd_flags |= 0x4;
 790
 791         dtd->part2.sdvo_flags = 0;
 792         dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
 793         dtd->part2.reserved = 0;
 794 }
 795
 796 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
 797                                          const struct intel_sdvo_dtd *dtd)
 798 {
 799         mode->hdisplay = dtd->part1.h_active;
 800         mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
 801         mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
 802         mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
 803         mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
 804         mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
 805         mode->htotal = mode->hdisplay + dtd->part1.h_blank;
 806         mode->htotal += (dtd->part1.h_high & 0xf) << 8;
 807
 808         mode->vdisplay = dtd->part1.v_active;
 809         mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
 810         mode->vsync_start = mode->vdisplay;
 811         mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
 812         mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
 813         mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
 814         mode->vsync_end = mode->vsync_start +
 815                 (dtd->part2.v_sync_off_width & 0xf);
 816         mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
 817         mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
 818         mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
 819
 820         mode->clock = dtd->part1.clock * 10;
 821
 822         mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
 823         if (dtd->part2.dtd_flags & 0x2)
 824                 mode->flags |= DRM_MODE_FLAG_PHSYNC;
 825         if (dtd->part2.dtd_flags & 0x4)
 826                 mode->flags |= DRM_MODE_FLAG_PVSYNC;
 827 }
 828
 829 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
 830 {
 831         struct intel_sdvo_encode encode;
 832
 833         BUILD_BUG_ON(sizeof(encode) != 2);
 834         return intel_sdvo_get_value(intel_sdvo,
 835                                   SDVO_CMD_GET_SUPP_ENCODE,
 836                                   &encode, sizeof(encode));
 837 }
 838
 839 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
 840                                   uint8_t mode)
 841 {
 842         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
 843 }
 844
 845 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
 846                                        uint8_t mode)
 847 {
 848         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
 849 }
 850
 851 #if 0
 852 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
 853 {
 854         int i, j;
 855         uint8_t set_buf_index[2];
 856         uint8_t av_split;
 857         uint8_t buf_size;
 858         uint8_t buf[48];
 859         uint8_t *pos;
 860
 861         intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
 862
 863         for (i = 0; i <= av_split; i++) {
 864                 set_buf_index[0] = i; set_buf_index[1] = 0;
 865                 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
 866                                      set_buf_index, 2);
 867                 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
 868                 intel_sdvo_read_response(encoder, &buf_size, 1);
 869
 870                 pos = buf;
 871                 for (j = 0; j <= buf_size; j += 8) {
 872                         intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
 873                                              NULL, 0);
 874                         intel_sdvo_read_response(encoder, pos, 8);
 875                         pos += 8;
 876                 }
 877         }
 878 }
 879 #endif
 880
 881 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
 882 {
 883         struct dip_infoframe avi_if = {
 884                 .type = DIP_TYPE_AVI,
 885                 .ver = DIP_VERSION_AVI,
 886                 .len = DIP_LEN_AVI,
 887         };
 888         uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
 889         uint8_t set_buf_index[2] = { 1, 0 };
 890         uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)];
 891         uint64_t *data = (uint64_t *)sdvo_data;
 892         unsigned i;
 893
 894         intel_dip_infoframe_csum(&avi_if);
 895
 896         /* sdvo spec says that the ecc is handled by the hw, and it looks like
 897          * we must not send the ecc field, either. */
 898         memcpy(sdvo_data, &avi_if, 3);
 899         sdvo_data[3] = avi_if.checksum;
 900         memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi));
 901
 902         if (!intel_sdvo_set_value(intel_sdvo,
 903                                   SDVO_CMD_SET_HBUF_INDEX,
 904                                   set_buf_index, 2))
 905                 return false;
 906
 907         for (i = 0; i < sizeof(sdvo_data); i += 8) {
 908                 if (!intel_sdvo_set_value(intel_sdvo,
 909                                           SDVO_CMD_SET_HBUF_DATA,
 910                                           data, 8))
 911                         return false;
 912                 data++;
 913         }
 914
 915         return intel_sdvo_set_value(intel_sdvo,
 916                                     SDVO_CMD_SET_HBUF_TXRATE,
 917                                     &tx_rate, 1);
 918 }
 919
 920 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
 921 {
 922         struct intel_sdvo_tv_format format;
 923         uint32_t format_map;
 924
 925         format_map = 1 << intel_sdvo->tv_format_index;
 926         memset(&format, 0, sizeof(format));
 927         memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
 928
 929         BUILD_BUG_ON(sizeof(format) != 6);
 930         return intel_sdvo_set_value(intel_sdvo,
 931                                     SDVO_CMD_SET_TV_FORMAT,
 932                                     &format, sizeof(format));
 933 }
 934
 935 static bool
 936 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
 937                                         struct drm_display_mode *mode)
 938 {
 939         struct intel_sdvo_dtd output_dtd;
 940
 941         if (!intel_sdvo_set_target_output(intel_sdvo,
 942                                           intel_sdvo->attached_output))
 943                 return false;
 944
 945         intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
 946         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
 947                 return false;
 948
 949         return true;
 950 }
 951
 952 static bool
 953 intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
 954                                         struct drm_display_mode *mode,
 955                                         struct drm_display_mode *adjusted_mode)
 956 {
 957         /* Reset the input timing to the screen. Assume always input 0. */
 958         if (!intel_sdvo_set_target_input(intel_sdvo))
 959                 return false;
 960
 961         if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
 962                                                       mode->clock / 10,
 963                                                       mode->hdisplay,
 964                                                       mode->vdisplay))
 965                 return false;
 966
 967         if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
 968                                                    &intel_sdvo->input_dtd))
 969                 return false;
 970
 971         intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd);
 972
 973         return true;
 974 }
 975
 976 static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
 977                                   struct drm_display_mode *mode,
 978                                   struct drm_display_mode *adjusted_mode)
 979 {
 980         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
 981         int multiplier;
 982
 983         /* We need to construct preferred input timings based on our
 984          * output timings.  To do that, we have to set the output
 985          * timings, even though this isn't really the right place in
 986          * the sequence to do it. Oh well.
 987          */
 988         if (intel_sdvo->is_tv) {
 989                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
 990                         return false;
 991
 992                 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
 993                                                              mode,
 994                                                              adjusted_mode);
 995         } else if (intel_sdvo->is_lvds) {
 996                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
 997                                                              intel_sdvo->sdvo_lvds_fixed_mode))
 998                         return false;
 999
1000                 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
1001                                                              mode,
1002                                                              adjusted_mode);
1003         }
1004
1005         /* Make the CRTC code factor in the SDVO pixel multiplier.  The
1006          * SDVO device will factor out the multiplier during mode_set.
1007          */
1008         multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
1009         intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
1010
1011         return true;
1012 }
1013
1014 static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1015                                 struct drm_display_mode *mode,
1016                                 struct drm_display_mode *adjusted_mode)
1017 {
1018         struct drm_device *dev = encoder->dev;
1019         struct drm_i915_private *dev_priv = dev->dev_private;
1020         struct drm_crtc *crtc = encoder->crtc;
1021         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1022         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1023         u32 sdvox;
1024         struct intel_sdvo_in_out_map in_out;
1025         struct intel_sdvo_dtd input_dtd, output_dtd;
1026         int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
1027         int rate;
1028
1029         if (!mode)
1030                 return;
1031
1032         /* First, set the input mapping for the first input to our controlled
1033          * output. This is only correct if we're a single-input device, in
1034          * which case the first input is the output from the appropriate SDVO
1035          * channel on the motherboard.  In a two-input device, the first input
1036          * will be SDVOB and the second SDVOC.
1037          */
1038         in_out.in0 = intel_sdvo->attached_output;
1039         in_out.in1 = 0;
1040
1041         intel_sdvo_set_value(intel_sdvo,
1042                              SDVO_CMD_SET_IN_OUT_MAP,
1043                              &in_out, sizeof(in_out));
1044
1045         /* Set the output timings to the screen */
1046         if (!intel_sdvo_set_target_output(intel_sdvo,
1047                                           intel_sdvo->attached_output))
1048                 return;
1049
1050         /* lvds has a special fixed output timing. */
1051         if (intel_sdvo->is_lvds)
1052                 intel_sdvo_get_dtd_from_mode(&output_dtd,
1053                                              intel_sdvo->sdvo_lvds_fixed_mode);
1054         else
1055                 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1056         (void) intel_sdvo_set_output_timing(intel_sdvo, &output_dtd);
1057
1058         /* Set the input timing to the screen. Assume always input 0. */
1059         if (!intel_sdvo_set_target_input(intel_sdvo))
1060                 return;
1061
1062         if (intel_sdvo->has_hdmi_monitor) {
1063                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1064                 intel_sdvo_set_colorimetry(intel_sdvo,
1065                                            SDVO_COLORIMETRY_RGB256);
1066                 intel_sdvo_set_avi_infoframe(intel_sdvo);
1067         } else
1068                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1069
1070         if (intel_sdvo->is_tv &&
1071             !intel_sdvo_set_tv_format(intel_sdvo))
1072                 return;
1073
1074         /* We have tried to get input timing in mode_fixup, and filled into
1075          * adjusted_mode.
1076          */
1077         intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1078         (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
1079
1080         switch (pixel_multiplier) {
1081         default:
1082         case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1083         case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1084         case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1085         }
1086         if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1087                 return;
1088
1089         /* Set the SDVO control regs. */
1090         if (INTEL_INFO(dev)->gen >= 4) {
1091                 /* The real mode polarity is set by the SDVO commands, using
1092                  * struct intel_sdvo_dtd. */
1093                 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1094                 if (intel_sdvo->is_hdmi)
1095                         sdvox |= intel_sdvo->color_range;
1096                 if (INTEL_INFO(dev)->gen < 5)
1097                         sdvox |= SDVO_BORDER_ENABLE;
1098         } else {
1099                 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1100                 switch (intel_sdvo->sdvo_reg) {
1101                 case SDVOB:
1102                         sdvox &= SDVOB_PRESERVE_MASK;
1103                         break;
1104                 case SDVOC:
1105                         sdvox &= SDVOC_PRESERVE_MASK;
1106                         break;
1107                 }
1108                 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1109         }
1110
1111         if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
1112                 sdvox |= TRANSCODER_CPT(intel_crtc->pipe);
1113         else
1114                 sdvox |= TRANSCODER(intel_crtc->pipe);
1115
1116         if (intel_sdvo->has_hdmi_audio)
1117                 sdvox |= SDVO_AUDIO_ENABLE;
1118
1119         if (INTEL_INFO(dev)->gen >= 4) {
1120                 /* done in crtc_mode_set as the dpll_md reg must be written early */
1121         } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1122                 /* done in crtc_mode_set as it lives inside the dpll register */
1123         } else {
1124                 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1125         }
1126
1127         if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1128             INTEL_INFO(dev)->gen < 5)
1129                 sdvox |= SDVO_STALL_SELECT;
1130         intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1131 }
1132
1133 static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1134 {
1135         struct drm_device *dev = encoder->dev;
1136         struct drm_i915_private *dev_priv = dev->dev_private;
1137         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1138         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
1139         u32 temp;
1140
1141         if (mode != DRM_MODE_DPMS_ON) {
1142                 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1143                 if (0)
1144                         intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1145
1146                 if (mode == DRM_MODE_DPMS_OFF) {
1147                         temp = I915_READ(intel_sdvo->sdvo_reg);
1148                         if ((temp & SDVO_ENABLE) != 0) {
1149                                 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1150                         }
1151                 }
1152         } else {
1153                 bool input1, input2;
1154                 int i;
1155                 u8 status;
1156
1157                 temp = I915_READ(intel_sdvo->sdvo_reg);
1158                 if ((temp & SDVO_ENABLE) == 0)
1159                         intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1160                 for (i = 0; i < 2; i++)
1161                         intel_wait_for_vblank(dev, intel_crtc->pipe);
1162
1163                 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1164                 /* Warn if the device reported failure to sync.
1165                  * A lot of SDVO devices fail to notify of sync, but it's
1166                  * a given it the status is a success, we succeeded.
1167                  */
1168                 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1169                         DRM_DEBUG_KMS("First %s output reported failure to "
1170                                         "sync\n", SDVO_NAME(intel_sdvo));
1171                 }
1172
1173                 if (0)
1174                         intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1175                 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1176         }
1177         return;
1178 }
1179
1180 static int intel_sdvo_mode_valid(struct drm_connector *connector,
1181                                  struct drm_display_mode *mode)
1182 {
1183         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1184
1185         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1186                 return MODE_NO_DBLESCAN;
1187
1188         if (intel_sdvo->pixel_clock_min > mode->clock)
1189                 return MODE_CLOCK_LOW;
1190
1191         if (intel_sdvo->pixel_clock_max < mode->clock)
1192                 return MODE_CLOCK_HIGH;
1193
1194         if (intel_sdvo->is_lvds) {
1195                 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1196                         return MODE_PANEL;
1197
1198                 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1199                         return MODE_PANEL;
1200         }
1201
1202         return MODE_OK;
1203 }
1204
1205 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1206 {
1207         BUILD_BUG_ON(sizeof(*caps) != 8);
1208         if (!intel_sdvo_get_value(intel_sdvo,
1209                                   SDVO_CMD_GET_DEVICE_CAPS,
1210                                   caps, sizeof(*caps)))
1211                 return false;
1212
1213         DRM_DEBUG_KMS("SDVO capabilities:\n"
1214                       "  vendor_id: %d\n"
1215                       "  device_id: %d\n"
1216                       "  device_rev_id: %d\n"
1217                       "  sdvo_version_major: %d\n"
1218                       "  sdvo_version_minor: %d\n"
1219                       "  sdvo_inputs_mask: %d\n"
1220                       "  smooth_scaling: %d\n"
1221                       "  sharp_scaling: %d\n"
1222                       "  up_scaling: %d\n"
1223                       "  down_scaling: %d\n"
1224                       "  stall_support: %d\n"
1225                       "  output_flags: %d\n",
1226                       caps->vendor_id,
1227                       caps->device_id,
1228                       caps->device_rev_id,
1229                       caps->sdvo_version_major,
1230                       caps->sdvo_version_minor,
1231                       caps->sdvo_inputs_mask,
1232                       caps->smooth_scaling,
1233                       caps->sharp_scaling,
1234                       caps->up_scaling,
1235                       caps->down_scaling,
1236                       caps->stall_support,
1237                       caps->output_flags);
1238
1239         return true;
1240 }
1241
1242 static int intel_sdvo_supports_hotplug(struct intel_sdvo *intel_sdvo)
1243 {
1244         u8 response[2];
1245
1246         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1247                                     &response, 2) && response[0];
1248 }
1249
1250 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1251 {
1252         struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1253
1254         intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &intel_sdvo->hotplug_active, 2);
1255 }
1256
1257 static bool
1258 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1259 {
1260         /* Is there more than one type of output? */
1261         return hweight16(intel_sdvo->caps.output_flags) > 1;
1262 }
1263
1264 static struct edid *
1265 intel_sdvo_get_edid(struct drm_connector *connector)
1266 {
1267         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1268         return drm_get_edid(connector, &sdvo->ddc);
1269 }
1270
1271 /* Mac mini hack -- use the same DDC as the analog connector */
1272 static struct edid *
1273 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1274 {
1275         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1276
1277         return drm_get_edid(connector,
1278                             intel_gmbus_get_adapter(dev_priv,
1279                                                     dev_priv->crt_ddc_pin));
1280 }
1281
1282 static enum drm_connector_status
1283 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1284 {
1285         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1286         enum drm_connector_status status;
1287         struct edid *edid;
1288
1289         edid = intel_sdvo_get_edid(connector);
1290
1291         if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1292                 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1293
1294                 /*
1295                  * Don't use the 1 as the argument of DDC bus switch to get
1296                  * the EDID. It is used for SDVO SPD ROM.
1297                  */
1298                 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1299                         intel_sdvo->ddc_bus = ddc;
1300                         edid = intel_sdvo_get_edid(connector);
1301                         if (edid)
1302                                 break;
1303                 }
1304                 /*
1305                  * If we found the EDID on the other bus,
1306                  * assume that is the correct DDC bus.
1307                  */
1308                 if (edid == NULL)
1309                         intel_sdvo->ddc_bus = saved_ddc;
1310         }
1311
1312         /*
1313          * When there is no edid and no monitor is connected with VGA
1314          * port, try to use the CRT ddc to read the EDID for DVI-connector.
1315          */
1316         if (edid == NULL)
1317                 edid = intel_sdvo_get_analog_edid(connector);
1318
1319         status = connector_status_unknown;
1320         if (edid != NULL) {
1321                 /* DDC bus is shared, match EDID to connector type */
1322                 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1323                         status = connector_status_connected;
1324                         if (intel_sdvo->is_hdmi) {
1325                                 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1326                                 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1327                         }
1328                 } else
1329                         status = connector_status_disconnected;
1330                 connector->display_info.raw_edid = NULL;
1331                 kfree(edid);
1332         }
1333
1334         if (status == connector_status_connected) {
1335                 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1336                 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
1337                         intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
1338         }
1339
1340         return status;
1341 }
1342
1343 static bool
1344 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1345                                   struct edid *edid)
1346 {
1347         bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1348         bool connector_is_digital = !!IS_DIGITAL(sdvo);
1349
1350         DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1351                       connector_is_digital, monitor_is_digital);
1352         return connector_is_digital == monitor_is_digital;
1353 }
1354
1355 static enum drm_connector_status
1356 intel_sdvo_detect(struct drm_connector *connector, bool force)
1357 {
1358         uint16_t response;
1359         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1360         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1361         enum drm_connector_status ret;
1362
1363         if (!intel_sdvo_write_cmd(intel_sdvo,
1364                                   SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
1365                 return connector_status_unknown;
1366
1367         /* add 30ms delay when the output type might be TV */
1368         if (intel_sdvo->caps.output_flags & SDVO_TV_MASK)
1369                 mdelay(30);
1370
1371         if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1372                 return connector_status_unknown;
1373
1374         DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1375                       response & 0xff, response >> 8,
1376                       intel_sdvo_connector->output_flag);
1377
1378         if (response == 0)
1379                 return connector_status_disconnected;
1380
1381         intel_sdvo->attached_output = response;
1382
1383         intel_sdvo->has_hdmi_monitor = false;
1384         intel_sdvo->has_hdmi_audio = false;
1385
1386         if ((intel_sdvo_connector->output_flag & response) == 0)
1387                 ret = connector_status_disconnected;
1388         else if (IS_TMDS(intel_sdvo_connector))
1389                 ret = intel_sdvo_tmds_sink_detect(connector);
1390         else {
1391                 struct edid *edid;
1392
1393                 /* if we have an edid check it matches the connection */
1394                 edid = intel_sdvo_get_edid(connector);
1395                 if (edid == NULL)
1396                         edid = intel_sdvo_get_analog_edid(connector);
1397                 if (edid != NULL) {
1398                         if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1399                                                               edid))
1400                                 ret = connector_status_connected;
1401                         else
1402                                 ret = connector_status_disconnected;
1403
1404                         connector->display_info.raw_edid = NULL;
1405                         kfree(edid);
1406                 } else
1407                         ret = connector_status_connected;
1408         }
1409
1410         /* May update encoder flag for like clock for SDVO TV, etc.*/
1411         if (ret == connector_status_connected) {
1412                 intel_sdvo->is_tv = false;
1413                 intel_sdvo->is_lvds = false;
1414                 intel_sdvo->base.needs_tv_clock = false;
1415
1416                 if (response & SDVO_TV_MASK) {
1417                         intel_sdvo->is_tv = true;
1418                         intel_sdvo->base.needs_tv_clock = true;
1419                 }
1420                 if (response & SDVO_LVDS_MASK)
1421                         intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1422         }
1423
1424         return ret;
1425 }
1426
1427 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1428 {
1429         struct edid *edid;
1430
1431         /* set the bus switch and get the modes */
1432         edid = intel_sdvo_get_edid(connector);
1433
1434         /*
1435          * Mac mini hack.  On this device, the DVI-I connector shares one DDC
1436          * link between analog and digital outputs. So, if the regular SDVO
1437          * DDC fails, check to see if the analog output is disconnected, in
1438          * which case we'll look there for the digital DDC data.
1439          */
1440         if (edid == NULL)
1441                 edid = intel_sdvo_get_analog_edid(connector);
1442
1443         if (edid != NULL) {
1444                 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1445                                                       edid)) {
1446                         drm_mode_connector_update_edid_property(connector, edid);
1447                         drm_add_edid_modes(connector, edid);
1448                 }
1449
1450                 connector->display_info.raw_edid = NULL;
1451                 kfree(edid);
1452         }
1453 }
1454
1455 /*
1456  * Set of SDVO TV modes.
1457  * Note!  This is in reply order (see loop in get_tv_modes).
1458  * XXX: all 60Hz refresh?
1459  */
1460 static const struct drm_display_mode sdvo_tv_modes[] = {
1461         { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1462                    416, 0, 200, 201, 232, 233, 0,
1463                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1464         { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1465                    416, 0, 240, 241, 272, 273, 0,
1466                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1467         { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1468                    496, 0, 300, 301, 332, 333, 0,
1469                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1470         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1471                    736, 0, 350, 351, 382, 383, 0,
1472                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1473         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1474                    736, 0, 400, 401, 432, 433, 0,
1475                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1476         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1477                    736, 0, 480, 481, 512, 513, 0,
1478                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1479         { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1480                    800, 0, 480, 481, 512, 513, 0,
1481                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1482         { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1483                    800, 0, 576, 577, 608, 609, 0,
1484                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1485         { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1486                    816, 0, 350, 351, 382, 383, 0,
1487                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1488         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1489                    816, 0, 400, 401, 432, 433, 0,
1490                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1491         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1492                    816, 0, 480, 481, 512, 513, 0,
1493                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1494         { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1495                    816, 0, 540, 541, 572, 573, 0,
1496                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1497         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1498                    816, 0, 576, 577, 608, 609, 0,
1499                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1500         { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1501                    864, 0, 576, 577, 608, 609, 0,
1502                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1503         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1504                    896, 0, 600, 601, 632, 633, 0,
1505                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1506         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1507                    928, 0, 624, 625, 656, 657, 0,
1508                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1509         { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1510                    1016, 0, 766, 767, 798, 799, 0,
1511                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1512         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1513                    1120, 0, 768, 769, 800, 801, 0,
1514                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1515         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1516                    1376, 0, 1024, 1025, 1056, 1057, 0,
1517                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1518 };
1519
1520 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1521 {
1522         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1523         struct intel_sdvo_sdtv_resolution_request tv_res;
1524         uint32_t reply = 0, format_map = 0;
1525         int i;
1526
1527         /* Read the list of supported input resolutions for the selected TV
1528          * format.
1529          */
1530         format_map = 1 << intel_sdvo->tv_format_index;
1531         memcpy(&tv_res, &format_map,
1532                min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1533
1534         if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1535                 return;
1536
1537         BUILD_BUG_ON(sizeof(tv_res) != 3);
1538         if (!intel_sdvo_write_cmd(intel_sdvo,
1539                                   SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1540                                   &tv_res, sizeof(tv_res)))
1541                 return;
1542         if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1543                 return;
1544
1545         for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1546                 if (reply & (1 << i)) {
1547                         struct drm_display_mode *nmode;
1548                         nmode = drm_mode_duplicate(connector->dev,
1549                                                    &sdvo_tv_modes[i]);
1550                         if (nmode)
1551                                 drm_mode_probed_add(connector, nmode);
1552                 }
1553 }
1554
1555 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1556 {
1557         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1558         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1559         struct drm_display_mode *newmode;
1560
1561         /*
1562          * Attempt to get the mode list from DDC.
1563          * Assume that the preferred modes are
1564          * arranged in priority order.
1565          */
1566         intel_ddc_get_modes(connector, intel_sdvo->i2c);
1567         if (list_empty(&connector->probed_modes) == false)
1568                 goto end;
1569
1570         /* Fetch modes from VBT */
1571         if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1572                 newmode = drm_mode_duplicate(connector->dev,
1573                                              dev_priv->sdvo_lvds_vbt_mode);
1574                 if (newmode != NULL) {
1575                         /* Guarantee the mode is preferred */
1576                         newmode->type = (DRM_MODE_TYPE_PREFERRED |
1577                                          DRM_MODE_TYPE_DRIVER);
1578                         drm_mode_probed_add(connector, newmode);
1579                 }
1580         }
1581
1582 end:
1583         list_for_each_entry(newmode, &connector->probed_modes, head) {
1584                 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1585                         intel_sdvo->sdvo_lvds_fixed_mode =
1586                                 drm_mode_duplicate(connector->dev, newmode);
1587
1588                         intel_sdvo->is_lvds = true;
1589                         break;
1590                 }
1591         }
1592
1593 }
1594
1595 static int intel_sdvo_get_modes(struct drm_connector *connector)
1596 {
1597         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1598
1599         if (IS_TV(intel_sdvo_connector))
1600                 intel_sdvo_get_tv_modes(connector);
1601         else if (IS_LVDS(intel_sdvo_connector))
1602                 intel_sdvo_get_lvds_modes(connector);
1603         else
1604                 intel_sdvo_get_ddc_modes(connector);
1605
1606         return !list_empty(&connector->probed_modes);
1607 }
1608
1609 static void
1610 intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1611 {
1612         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1613         struct drm_device *dev = connector->dev;
1614
1615         if (intel_sdvo_connector->left)
1616                 drm_property_destroy(dev, intel_sdvo_connector->left);
1617         if (intel_sdvo_connector->right)
1618                 drm_property_destroy(dev, intel_sdvo_connector->right);
1619         if (intel_sdvo_connector->top)
1620                 drm_property_destroy(dev, intel_sdvo_connector->top);
1621         if (intel_sdvo_connector->bottom)
1622                 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1623         if (intel_sdvo_connector->hpos)
1624                 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1625         if (intel_sdvo_connector->vpos)
1626                 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1627         if (intel_sdvo_connector->saturation)
1628                 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1629         if (intel_sdvo_connector->contrast)
1630                 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1631         if (intel_sdvo_connector->hue)
1632                 drm_property_destroy(dev, intel_sdvo_connector->hue);
1633         if (intel_sdvo_connector->sharpness)
1634                 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1635         if (intel_sdvo_connector->flicker_filter)
1636                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1637         if (intel_sdvo_connector->flicker_filter_2d)
1638                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1639         if (intel_sdvo_connector->flicker_filter_adaptive)
1640                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1641         if (intel_sdvo_connector->tv_luma_filter)
1642                 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1643         if (intel_sdvo_connector->tv_chroma_filter)
1644                 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
1645         if (intel_sdvo_connector->dot_crawl)
1646                 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
1647         if (intel_sdvo_connector->brightness)
1648                 drm_property_destroy(dev, intel_sdvo_connector->brightness);
1649 }
1650
1651 static void intel_sdvo_destroy(struct drm_connector *connector)
1652 {
1653         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1654
1655         if (intel_sdvo_connector->tv_format)
1656                 drm_property_destroy(connector->dev,
1657                                      intel_sdvo_connector->tv_format);
1658
1659         intel_sdvo_destroy_enhance_property(connector);
1660         drm_sysfs_connector_remove(connector);
1661         drm_connector_cleanup(connector);
1662         kfree(connector);
1663 }
1664
1665 static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1666 {
1667         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1668         struct edid *edid;
1669         bool has_audio = false;
1670
1671         if (!intel_sdvo->is_hdmi)
1672                 return false;
1673
1674         edid = intel_sdvo_get_edid(connector);
1675         if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1676                 has_audio = drm_detect_monitor_audio(edid);
1677
1678         return has_audio;
1679 }
1680
1681 static int
1682 intel_sdvo_set_property(struct drm_connector *connector,
1683                         struct drm_property *property,
1684                         uint64_t val)
1685 {
1686         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1687         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1688         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1689         uint16_t temp_value;
1690         uint8_t cmd;
1691         int ret;
1692
1693         ret = drm_connector_property_set_value(connector, property, val);
1694         if (ret)
1695                 return ret;
1696
1697         if (property == dev_priv->force_audio_property) {
1698                 int i = val;
1699                 bool has_audio;
1700
1701                 if (i == intel_sdvo_connector->force_audio)
1702                         return 0;
1703
1704                 intel_sdvo_connector->force_audio = i;
1705
1706                 if (i == HDMI_AUDIO_AUTO)
1707                         has_audio = intel_sdvo_detect_hdmi_audio(connector);
1708                 else
1709                         has_audio = (i == HDMI_AUDIO_ON);
1710
1711                 if (has_audio == intel_sdvo->has_hdmi_audio)
1712                         return 0;
1713
1714                 intel_sdvo->has_hdmi_audio = has_audio;
1715                 goto done;
1716         }
1717
1718         if (property == dev_priv->broadcast_rgb_property) {
1719                 if (val == !!intel_sdvo->color_range)
1720                         return 0;
1721
1722                 intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
1723                 goto done;
1724         }
1725
1726 #define CHECK_PROPERTY(name, NAME) \
1727         if (intel_sdvo_connector->name == property) { \
1728                 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1729                 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1730                 cmd = SDVO_CMD_SET_##NAME; \
1731                 intel_sdvo_connector->cur_##name = temp_value; \
1732                 goto set_value; \
1733         }
1734
1735         if (property == intel_sdvo_connector->tv_format) {
1736                 if (val >= TV_FORMAT_NUM)
1737                         return -EINVAL;
1738
1739                 if (intel_sdvo->tv_format_index ==
1740                     intel_sdvo_connector->tv_format_supported[val])
1741                         return 0;
1742
1743                 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
1744                 goto done;
1745         } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
1746                 temp_value = val;
1747                 if (intel_sdvo_connector->left == property) {
1748                         drm_connector_property_set_value(connector,
1749                                                          intel_sdvo_connector->right, val);
1750                         if (intel_sdvo_connector->left_margin == temp_value)
1751                                 return 0;
1752
1753                         intel_sdvo_connector->left_margin = temp_value;
1754                         intel_sdvo_connector->right_margin = temp_value;
1755                         temp_value = intel_sdvo_connector->max_hscan -
1756                                 intel_sdvo_connector->left_margin;
1757                         cmd = SDVO_CMD_SET_OVERSCAN_H;
1758                         goto set_value;
1759                 } else if (intel_sdvo_connector->right == property) {
1760                         drm_connector_property_set_value(connector,
1761                                                          intel_sdvo_connector->left, val);
1762                         if (intel_sdvo_connector->right_margin == temp_value)
1763                                 return 0;
1764
1765                         intel_sdvo_connector->left_margin = temp_value;
1766                         intel_sdvo_connector->right_margin = temp_value;
1767                         temp_value = intel_sdvo_connector->max_hscan -
1768                                 intel_sdvo_connector->left_margin;
1769                         cmd = SDVO_CMD_SET_OVERSCAN_H;
1770                         goto set_value;
1771                 } else if (intel_sdvo_connector->top == property) {
1772                         drm_connector_property_set_value(connector,
1773                                                          intel_sdvo_connector->bottom, val);
1774                         if (intel_sdvo_connector->top_margin == temp_value)
1775                                 return 0;
1776
1777                         intel_sdvo_connector->top_margin = temp_value;
1778                         intel_sdvo_connector->bottom_margin = temp_value;
1779                         temp_value = intel_sdvo_connector->max_vscan -
1780                                 intel_sdvo_connector->top_margin;
1781                         cmd = SDVO_CMD_SET_OVERSCAN_V;
1782                         goto set_value;
1783                 } else if (intel_sdvo_connector->bottom == property) {
1784                         drm_connector_property_set_value(connector,
1785                                                          intel_sdvo_connector->top, val);
1786                         if (intel_sdvo_connector->bottom_margin == temp_value)
1787                                 return 0;
1788
1789                         intel_sdvo_connector->top_margin = temp_value;
1790                         intel_sdvo_connector->bottom_margin = temp_value;
1791                         temp_value = intel_sdvo_connector->max_vscan -
1792                                 intel_sdvo_connector->top_margin;
1793                         cmd = SDVO_CMD_SET_OVERSCAN_V;
1794                         goto set_value;
1795                 }
1796                 CHECK_PROPERTY(hpos, HPOS)
1797                 CHECK_PROPERTY(vpos, VPOS)
1798                 CHECK_PROPERTY(saturation, SATURATION)
1799                 CHECK_PROPERTY(contrast, CONTRAST)
1800                 CHECK_PROPERTY(hue, HUE)
1801                 CHECK_PROPERTY(brightness, BRIGHTNESS)
1802                 CHECK_PROPERTY(sharpness, SHARPNESS)
1803                 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1804                 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1805                 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1806                 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1807                 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
1808                 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
1809         }
1810
1811         return -EINVAL; /* unknown property */
1812
1813 set_value:
1814         if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1815                 return -EIO;
1816
1817
1818 done:
1819         if (intel_sdvo->base.base.crtc) {
1820                 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
1821                 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
1822                                          crtc->y, crtc->fb);
1823         }
1824
1825         return 0;
1826 #undef CHECK_PROPERTY
1827 }
1828
1829 static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1830         .dpms = intel_sdvo_dpms,
1831         .mode_fixup = intel_sdvo_mode_fixup,
1832         .prepare = intel_encoder_prepare,
1833         .mode_set = intel_sdvo_mode_set,
1834         .commit = intel_encoder_commit,
1835 };
1836
1837 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
1838         .dpms = drm_helper_connector_dpms,
1839         .detect = intel_sdvo_detect,
1840         .fill_modes = drm_helper_probe_single_connector_modes,
1841         .set_property = intel_sdvo_set_property,
1842         .destroy = intel_sdvo_destroy,
1843 };
1844
1845 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1846         .get_modes = intel_sdvo_get_modes,
1847         .mode_valid = intel_sdvo_mode_valid,
1848         .best_encoder = intel_best_encoder,
1849 };
1850
1851 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
1852 {
1853         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1854
1855         if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
1856                 drm_mode_destroy(encoder->dev,
1857                                  intel_sdvo->sdvo_lvds_fixed_mode);
1858
1859         i2c_del_adapter(&intel_sdvo->ddc);
1860         intel_encoder_destroy(encoder);
1861 }
1862
1863 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1864         .destroy = intel_sdvo_enc_destroy,
1865 };
1866
1867 static void
1868 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1869 {
1870         uint16_t mask = 0;
1871         unsigned int num_bits;
1872
1873         /* Make a mask of outputs less than or equal to our own priority in the
1874          * list.
1875          */
1876         switch (sdvo->controlled_output) {
1877         case SDVO_OUTPUT_LVDS1:
1878                 mask |= SDVO_OUTPUT_LVDS1;
1879         case SDVO_OUTPUT_LVDS0:
1880                 mask |= SDVO_OUTPUT_LVDS0;
1881         case SDVO_OUTPUT_TMDS1:
1882                 mask |= SDVO_OUTPUT_TMDS1;
1883         case SDVO_OUTPUT_TMDS0:
1884                 mask |= SDVO_OUTPUT_TMDS0;
1885         case SDVO_OUTPUT_RGB1:
1886                 mask |= SDVO_OUTPUT_RGB1;
1887         case SDVO_OUTPUT_RGB0:
1888                 mask |= SDVO_OUTPUT_RGB0;
1889                 break;
1890         }
1891
1892         /* Count bits to find what number we are in the priority list. */
1893         mask &= sdvo->caps.output_flags;
1894         num_bits = hweight16(mask);
1895         /* If more than 3 outputs, default to DDC bus 3 for now. */
1896         if (num_bits > 3)
1897                 num_bits = 3;
1898
1899         /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1900         sdvo->ddc_bus = 1 << num_bits;
1901 }
1902
1903 /**
1904  * Choose the appropriate DDC bus for control bus switch command for this
1905  * SDVO output based on the controlled output.
1906  *
1907  * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1908  * outputs, then LVDS outputs.
1909  */
1910 static void
1911 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
1912                           struct intel_sdvo *sdvo, u32 reg)
1913 {
1914         struct sdvo_device_mapping *mapping;
1915
1916         if (sdvo->is_sdvob)
1917                 mapping = &(dev_priv->sdvo_mappings[0]);
1918         else
1919                 mapping = &(dev_priv->sdvo_mappings[1]);
1920
1921         if (mapping->initialized)
1922                 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1923         else
1924                 intel_sdvo_guess_ddc_bus(sdvo);
1925 }
1926
1927 static void
1928 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
1929                           struct intel_sdvo *sdvo, u32 reg)
1930 {
1931         struct sdvo_device_mapping *mapping;
1932         u8 pin;
1933
1934         if (sdvo->is_sdvob)
1935                 mapping = &dev_priv->sdvo_mappings[0];
1936         else
1937                 mapping = &dev_priv->sdvo_mappings[1];
1938
1939         pin = GMBUS_PORT_DPB;
1940         if (mapping->initialized)
1941                 pin = mapping->i2c_pin;
1942
1943         if (intel_gmbus_is_port_valid(pin)) {
1944                 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
1945                 intel_gmbus_set_speed(sdvo->i2c, GMBUS_RATE_1MHZ);
1946                 intel_gmbus_force_bit(sdvo->i2c, true);
1947         } else {
1948                 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
1949         }
1950 }
1951
1952 static bool
1953 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
1954 {
1955         return intel_sdvo_check_supp_encode(intel_sdvo);
1956 }
1957
1958 static u8
1959 intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
1960 {
1961         struct drm_i915_private *dev_priv = dev->dev_private;
1962         struct sdvo_device_mapping *my_mapping, *other_mapping;
1963
1964         if (sdvo->is_sdvob) {
1965                 my_mapping = &dev_priv->sdvo_mappings[0];
1966                 other_mapping = &dev_priv->sdvo_mappings[1];
1967         } else {
1968                 my_mapping = &dev_priv->sdvo_mappings[1];
1969                 other_mapping = &dev_priv->sdvo_mappings[0];
1970         }
1971
1972         /* If the BIOS described our SDVO device, take advantage of it. */
1973         if (my_mapping->slave_addr)
1974                 return my_mapping->slave_addr;
1975
1976         /* If the BIOS only described a different SDVO device, use the
1977          * address that it isn't using.
1978          */
1979         if (other_mapping->slave_addr) {
1980                 if (other_mapping->slave_addr == 0x70)
1981                         return 0x72;
1982                 else
1983                         return 0x70;
1984         }
1985
1986         /* No SDVO device info is found for another DVO port,
1987          * so use mapping assumption we had before BIOS parsing.
1988          */
1989         if (sdvo->is_sdvob)
1990                 return 0x70;
1991         else
1992                 return 0x72;
1993 }
1994
1995 static void
1996 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
1997                           struct intel_sdvo *encoder)
1998 {
1999         drm_connector_init(encoder->base.base.dev,
2000                            &connector->base.base,
2001                            &intel_sdvo_connector_funcs,
2002                            connector->base.base.connector_type);
2003
2004         drm_connector_helper_add(&connector->base.base,
2005                                  &intel_sdvo_connector_helper_funcs);
2006
2007         connector->base.base.interlace_allowed = 1;
2008         connector->base.base.doublescan_allowed = 0;
2009         connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2010
2011         intel_connector_attach_encoder(&connector->base, &encoder->base);
2012         drm_sysfs_connector_add(&connector->base.base);
2013 }
2014
2015 static void
2016 intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
2017 {
2018         struct drm_device *dev = connector->base.base.dev;
2019
2020         intel_attach_force_audio_property(&connector->base.base);
2021         if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))
2022                 intel_attach_broadcast_rgb_property(&connector->base.base);
2023 }
2024
2025 static bool
2026 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2027 {
2028         struct drm_encoder *encoder = &intel_sdvo->base.base;
2029         struct drm_connector *connector;
2030         struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2031         struct intel_connector *intel_connector;
2032         struct intel_sdvo_connector *intel_sdvo_connector;
2033
2034         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2035         if (!intel_sdvo_connector)
2036                 return false;
2037
2038         if (device == 0) {
2039                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2040                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2041         } else if (device == 1) {
2042                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2043                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2044         }
2045
2046         intel_connector = &intel_sdvo_connector->base;
2047         connector = &intel_connector->base;
2048         if (intel_sdvo_supports_hotplug(intel_sdvo) & (1 << device)) {
2049                 connector->polled = DRM_CONNECTOR_POLL_HPD;
2050                 intel_sdvo->hotplug_active[0] |= 1 << device;
2051                 /* Some SDVO devices have one-shot hotplug interrupts.
2052                  * Ensure that they get re-enabled when an interrupt happens.
2053                  */
2054                 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2055                 intel_sdvo_enable_hotplug(intel_encoder);
2056         }
2057         else
2058                 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2059         encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2060         connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2061
2062         if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2063                 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2064                 intel_sdvo->is_hdmi = true;
2065         }
2066         intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2067                                        (1 << INTEL_ANALOG_CLONE_BIT));
2068
2069         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2070         if (intel_sdvo->is_hdmi)
2071                 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
2072
2073         return true;
2074 }
2075
2076 static bool
2077 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2078 {
2079         struct drm_encoder *encoder = &intel_sdvo->base.base;
2080         struct drm_connector *connector;
2081         struct intel_connector *intel_connector;
2082         struct intel_sdvo_connector *intel_sdvo_connector;
2083
2084         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2085         if (!intel_sdvo_connector)
2086                 return false;
2087
2088         intel_connector = &intel_sdvo_connector->base;
2089         connector = &intel_connector->base;
2090         encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2091         connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2092
2093         intel_sdvo->controlled_output |= type;
2094         intel_sdvo_connector->output_flag = type;
2095
2096         intel_sdvo->is_tv = true;
2097         intel_sdvo->base.needs_tv_clock = true;
2098         intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
2099
2100         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2101
2102         if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2103                 goto err;
2104
2105         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2106                 goto err;
2107
2108         return true;
2109
2110 err:
2111         intel_sdvo_destroy(connector);
2112         return false;
2113 }
2114
2115 static bool
2116 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2117 {
2118         struct drm_encoder *encoder = &intel_sdvo->base.base;
2119         struct drm_connector *connector;
2120         struct intel_connector *intel_connector;
2121         struct intel_sdvo_connector *intel_sdvo_connector;
2122
2123         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2124         if (!intel_sdvo_connector)
2125                 return false;
2126
2127         intel_connector = &intel_sdvo_connector->base;
2128         connector = &intel_connector->base;
2129         connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2130         encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2131         connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2132
2133         if (device == 0) {
2134                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2135                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2136         } else if (device == 1) {
2137                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2138                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2139         }
2140
2141         intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2142                                        (1 << INTEL_ANALOG_CLONE_BIT));
2143
2144         intel_sdvo_connector_init(intel_sdvo_connector,
2145                                   intel_sdvo);
2146         return true;
2147 }
2148
2149 static bool
2150 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2151 {
2152         struct drm_encoder *encoder = &intel_sdvo->base.base;
2153         struct drm_connector *connector;
2154         struct intel_connector *intel_connector;
2155         struct intel_sdvo_connector *intel_sdvo_connector;
2156
2157         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2158         if (!intel_sdvo_connector)
2159                 return false;
2160
2161         intel_connector = &intel_sdvo_connector->base;
2162         connector = &intel_connector->base;
2163         encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2164         connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2165
2166         if (device == 0) {
2167                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2168                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2169         } else if (device == 1) {
2170                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2171                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2172         }
2173
2174         intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
2175                                        (1 << INTEL_SDVO_LVDS_CLONE_BIT));
2176
2177         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2178         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2179                 goto err;
2180
2181         return true;
2182
2183 err:
2184         intel_sdvo_destroy(connector);
2185         return false;
2186 }
2187
2188 static bool
2189 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2190 {
2191         intel_sdvo->is_tv = false;
2192         intel_sdvo->base.needs_tv_clock = false;
2193         intel_sdvo->is_lvds = false;
2194
2195         /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2196
2197         if (flags & SDVO_OUTPUT_TMDS0)
2198                 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2199                         return false;
2200
2201         if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2202                 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2203                         return false;
2204
2205         /* TV has no XXX1 function block */
2206         if (flags & SDVO_OUTPUT_SVID0)
2207                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2208                         return false;
2209
2210         if (flags & SDVO_OUTPUT_CVBS0)
2211                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2212                         return false;
2213
2214         if (flags & SDVO_OUTPUT_YPRPB0)
2215                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2216                         return false;
2217
2218         if (flags & SDVO_OUTPUT_RGB0)
2219                 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2220                         return false;
2221
2222         if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2223                 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2224                         return false;
2225
2226         if (flags & SDVO_OUTPUT_LVDS0)
2227                 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2228                         return false;
2229
2230         if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2231                 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2232                         return false;
2233
2234         if ((flags & SDVO_OUTPUT_MASK) == 0) {
2235                 unsigned char bytes[2];
2236
2237                 intel_sdvo->controlled_output = 0;
2238                 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2239                 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2240                               SDVO_NAME(intel_sdvo),
2241                               bytes[0], bytes[1]);
2242                 return false;
2243         }
2244         intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2245
2246         return true;
2247 }
2248
2249 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2250                                           struct intel_sdvo_connector *intel_sdvo_connector,
2251                                           int type)
2252 {
2253         struct drm_device *dev = intel_sdvo->base.base.dev;
2254         struct intel_sdvo_tv_format format;
2255         uint32_t format_map, i;
2256
2257         if (!intel_sdvo_set_target_output(intel_sdvo, type))
2258                 return false;
2259
2260         BUILD_BUG_ON(sizeof(format) != 6);
2261         if (!intel_sdvo_get_value(intel_sdvo,
2262                                   SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2263                                   &format, sizeof(format)))
2264                 return false;
2265
2266         memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2267
2268         if (format_map == 0)
2269                 return false;
2270
2271         intel_sdvo_connector->format_supported_num = 0;
2272         for (i = 0 ; i < TV_FORMAT_NUM; i++)
2273                 if (format_map & (1 << i))
2274                         intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2275
2276
2277         intel_sdvo_connector->tv_format =
2278                         drm_property_create(dev, DRM_MODE_PROP_ENUM,
2279                                             "mode", intel_sdvo_connector->format_supported_num);
2280         if (!intel_sdvo_connector->tv_format)
2281                 return false;
2282
2283         for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2284                 drm_property_add_enum(
2285                                 intel_sdvo_connector->tv_format, i,
2286                                 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2287
2288         intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2289         drm_connector_attach_property(&intel_sdvo_connector->base.base,
2290                                       intel_sdvo_connector->tv_format, 0);
2291         return true;
2292
2293 }
2294
2295 #define ENHANCEMENT(name, NAME) do { \
2296         if (enhancements.name) { \
2297                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2298                     !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2299                         return false; \
2300                 intel_sdvo_connector->max_##name = data_value[0]; \
2301                 intel_sdvo_connector->cur_##name = response; \
2302                 intel_sdvo_connector->name = \
2303                         drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2304                 if (!intel_sdvo_connector->name) return false; \
2305                 drm_connector_attach_property(connector, \
2306                                               intel_sdvo_connector->name, \
2307                                               intel_sdvo_connector->cur_##name); \
2308                 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2309                               data_value[0], data_value[1], response); \
2310         } \
2311 } while (0)
2312
2313 static bool
2314 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2315                                       struct intel_sdvo_connector *intel_sdvo_connector,
2316                                       struct intel_sdvo_enhancements_reply enhancements)
2317 {
2318         struct drm_device *dev = intel_sdvo->base.base.dev;
2319         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2320         uint16_t response, data_value[2];
2321
2322         /* when horizontal overscan is supported, Add the left/right  property */
2323         if (enhancements.overscan_h) {
2324                 if (!intel_sdvo_get_value(intel_sdvo,
2325                                           SDVO_CMD_GET_MAX_OVERSCAN_H,
2326                                           &data_value, 4))
2327                         return false;
2328
2329                 if (!intel_sdvo_get_value(intel_sdvo,
2330                                           SDVO_CMD_GET_OVERSCAN_H,
2331                                           &response, 2))
2332                         return false;
2333
2334                 intel_sdvo_connector->max_hscan = data_value[0];
2335                 intel_sdvo_connector->left_margin = data_value[0] - response;
2336                 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2337                 intel_sdvo_connector->left =
2338                         drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2339                 if (!intel_sdvo_connector->left)
2340                         return false;
2341
2342                 drm_connector_attach_property(connector,
2343                                               intel_sdvo_connector->left,
2344                                               intel_sdvo_connector->left_margin);
2345
2346                 intel_sdvo_connector->right =
2347                         drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2348                 if (!intel_sdvo_connector->right)
2349                         return false;
2350
2351                 drm_connector_attach_property(connector,
2352                                               intel_sdvo_connector->right,
2353                                               intel_sdvo_connector->right_margin);
2354                 DRM_DEBUG_KMS("h_overscan: max %d, "
2355                               "default %d, current %d\n",
2356                               data_value[0], data_value[1], response);
2357         }
2358
2359         if (enhancements.overscan_v) {
2360                 if (!intel_sdvo_get_value(intel_sdvo,
2361                                           SDVO_CMD_GET_MAX_OVERSCAN_V,
2362                                           &data_value, 4))
2363                         return false;
2364
2365                 if (!intel_sdvo_get_value(intel_sdvo,
2366                                           SDVO_CMD_GET_OVERSCAN_V,
2367                                           &response, 2))
2368                         return false;
2369
2370                 intel_sdvo_connector->max_vscan = data_value[0];
2371                 intel_sdvo_connector->top_margin = data_value[0] - response;
2372                 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2373                 intel_sdvo_connector->top =
2374                         drm_property_create_range(dev, 0,
2375                                             "top_margin", 0, data_value[0]);
2376                 if (!intel_sdvo_connector->top)
2377                         return false;
2378
2379                 drm_connector_attach_property(connector,
2380                                               intel_sdvo_connector->top,
2381                                               intel_sdvo_connector->top_margin);
2382
2383                 intel_sdvo_connector->bottom =
2384                         drm_property_create_range(dev, 0,
2385                                             "bottom_margin", 0, data_value[0]);
2386                 if (!intel_sdvo_connector->bottom)
2387                         return false;
2388
2389                 drm_connector_attach_property(connector,
2390                                               intel_sdvo_connector->bottom,
2391                                               intel_sdvo_connector->bottom_margin);
2392                 DRM_DEBUG_KMS("v_overscan: max %d, "
2393                               "default %d, current %d\n",
2394                               data_value[0], data_value[1], response);
2395         }
2396
2397         ENHANCEMENT(hpos, HPOS);
2398         ENHANCEMENT(vpos, VPOS);
2399         ENHANCEMENT(saturation, SATURATION);
2400         ENHANCEMENT(contrast, CONTRAST);
2401         ENHANCEMENT(hue, HUE);
2402         ENHANCEMENT(sharpness, SHARPNESS);
2403         ENHANCEMENT(brightness, BRIGHTNESS);
2404         ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2405         ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2406         ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2407         ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2408         ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2409
2410         if (enhancements.dot_crawl) {
2411                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2412                         return false;
2413
2414                 intel_sdvo_connector->max_dot_crawl = 1;
2415                 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2416                 intel_sdvo_connector->dot_crawl =
2417                         drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2418                 if (!intel_sdvo_connector->dot_crawl)
2419                         return false;
2420
2421                 drm_connector_attach_property(connector,
2422                                               intel_sdvo_connector->dot_crawl,
2423                                               intel_sdvo_connector->cur_dot_crawl);
2424                 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2425         }
2426
2427         return true;
2428 }
2429
2430 static bool
2431 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2432                                         struct intel_sdvo_connector *intel_sdvo_connector,
2433                                         struct intel_sdvo_enhancements_reply enhancements)
2434 {
2435         struct drm_device *dev = intel_sdvo->base.base.dev;
2436         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2437         uint16_t response, data_value[2];
2438
2439         ENHANCEMENT(brightness, BRIGHTNESS);
2440
2441         return true;
2442 }
2443 #undef ENHANCEMENT
2444
2445 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2446                                                struct intel_sdvo_connector *intel_sdvo_connector)
2447 {
2448         union {
2449                 struct intel_sdvo_enhancements_reply reply;
2450                 uint16_t response;
2451         } enhancements;
2452
2453         BUILD_BUG_ON(sizeof(enhancements) != 2);
2454
2455         enhancements.response = 0;
2456         intel_sdvo_get_value(intel_sdvo,
2457                              SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2458                              &enhancements, sizeof(enhancements));
2459         if (enhancements.response == 0) {
2460                 DRM_DEBUG_KMS("No enhancement is supported\n");
2461                 return true;
2462         }
2463
2464         if (IS_TV(intel_sdvo_connector))
2465                 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2466         else if (IS_LVDS(intel_sdvo_connector))
2467                 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2468         else
2469                 return true;
2470 }
2471
2472 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2473                                      struct i2c_msg *msgs,
2474                                      int num)
2475 {
2476         struct intel_sdvo *sdvo = adapter->algo_data;
2477
2478         if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2479                 return -EIO;
2480
2481         return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2482 }
2483
2484 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2485 {
2486         struct intel_sdvo *sdvo = adapter->algo_data;
2487         return sdvo->i2c->algo->functionality(sdvo->i2c);
2488 }
2489
2490 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2491         .master_xfer    = intel_sdvo_ddc_proxy_xfer,
2492         .functionality  = intel_sdvo_ddc_proxy_func
2493 };
2494
2495 static bool
2496 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2497                           struct drm_device *dev)
2498 {
2499         sdvo->ddc.owner = THIS_MODULE;
2500         sdvo->ddc.class = I2C_CLASS_DDC;
2501         snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2502         sdvo->ddc.dev.parent = &dev->pdev->dev;
2503         sdvo->ddc.algo_data = sdvo;
2504         sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2505
2506         return i2c_add_adapter(&sdvo->ddc) == 0;
2507 }
2508
2509 bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
2510 {
2511         struct drm_i915_private *dev_priv = dev->dev_private;
2512         struct intel_encoder *intel_encoder;
2513         struct intel_sdvo *intel_sdvo;
2514         int i;
2515
2516         intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2517         if (!intel_sdvo)
2518                 return false;
2519
2520         intel_sdvo->sdvo_reg = sdvo_reg;
2521         intel_sdvo->is_sdvob = is_sdvob;
2522         intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
2523         intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
2524         if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
2525                 kfree(intel_sdvo);
2526                 return false;
2527         }
2528
2529         /* encoder type will be decided later */
2530         intel_encoder = &intel_sdvo->base;
2531         intel_encoder->type = INTEL_OUTPUT_SDVO;
2532         drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2533
2534         /* Read the regs to test if we can talk to the device */
2535         for (i = 0; i < 0x40; i++) {
2536                 u8 byte;
2537
2538                 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2539                         DRM_DEBUG_KMS("No SDVO device found on %s\n",
2540                                       SDVO_NAME(intel_sdvo));
2541                         goto err;
2542                 }
2543         }
2544
2545         if (intel_sdvo->is_sdvob)
2546                 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
2547         else
2548                 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
2549
2550         drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
2551
2552         /* In default case sdvo lvds is false */
2553         if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2554                 goto err;
2555
2556         /* Set up hotplug command - note paranoia about contents of reply.
2557          * We assume that the hardware is in a sane state, and only touch
2558          * the bits we think we understand.
2559          */
2560         intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG,
2561                              &intel_sdvo->hotplug_active, 2);
2562         intel_sdvo->hotplug_active[0] &= ~0x3;
2563
2564         if (intel_sdvo_output_setup(intel_sdvo,
2565                                     intel_sdvo->caps.output_flags) != true) {
2566                 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
2567                               SDVO_NAME(intel_sdvo));
2568                 goto err;
2569         }
2570
2571         intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2572
2573         /* Set the input timing to the screen. Assume always input 0. */
2574         if (!intel_sdvo_set_target_input(intel_sdvo))
2575                 goto err;
2576
2577         if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2578                                                     &intel_sdvo->pixel_clock_min,
2579                                                     &intel_sdvo->pixel_clock_max))
2580                 goto err;
2581
2582         DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2583                         "clock range %dMHz - %dMHz, "
2584                         "input 1: %c, input 2: %c, "
2585                         "output 1: %c, output 2: %c\n",
2586                         SDVO_NAME(intel_sdvo),
2587                         intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2588                         intel_sdvo->caps.device_rev_id,
2589                         intel_sdvo->pixel_clock_min / 1000,
2590                         intel_sdvo->pixel_clock_max / 1000,
2591                         (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2592                         (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2593                         /* check currently supported outputs */
2594                         intel_sdvo->caps.output_flags &
2595                         (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2596                         intel_sdvo->caps.output_flags &
2597                         (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2598         return true;
2599
2600 err:
2601         drm_encoder_cleanup(&intel_encoder->base);
2602         i2c_del_adapter(&intel_sdvo->ddc);
2603         kfree(intel_sdvo);
2604
2605         return false;
2606 }