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1 /*
2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
3  * Copyright © 2006-2007 Intel Corporation
4  *   Jesse Barnes <jesse.barnes@intel.com>
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice (including the next
14  * paragraph) shall be included in all copies or substantial portions of the
15  * Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23  * DEALINGS IN THE SOFTWARE.
24  *
25  * Authors:
26  *      Eric Anholt <eric@anholt.net>
27  */
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
31 #include "drmP.h"
32 #include "drm.h"
33 #include "drm_crtc.h"
34 #include "drm_edid.h"
35 #include "intel_drv.h"
36 #include "i915_drm.h"
37 #include "i915_drv.h"
38 #include "intel_sdvo_regs.h"
39
40 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
41 #define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
42 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
43 #define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0)
44
45 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
46                          SDVO_TV_MASK)
47
48 #define IS_TV(c)        (c->output_flag & SDVO_TV_MASK)
49 #define IS_LVDS(c)      (c->output_flag & SDVO_LVDS_MASK)
50 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
51
52
53 static const char *tv_format_names[] = {
54         "NTSC_M"   , "NTSC_J"  , "NTSC_443",
55         "PAL_B"    , "PAL_D"   , "PAL_G"   ,
56         "PAL_H"    , "PAL_I"   , "PAL_M"   ,
57         "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
58         "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
59         "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
60         "SECAM_60"
61 };
62
63 #define TV_FORMAT_NUM  (sizeof(tv_format_names) / sizeof(*tv_format_names))
64
65 struct intel_sdvo {
66         struct intel_encoder base;
67
68         struct i2c_adapter *i2c;
69         u8 slave_addr;
70
71         struct i2c_adapter ddc;
72
73         /* Register for the SDVO device: SDVOB or SDVOC */
74         int sdvo_reg;
75
76         /* Active outputs controlled by this SDVO output */
77         uint16_t controlled_output;
78
79         /*
80          * Capabilities of the SDVO device returned by
81          * i830_sdvo_get_capabilities()
82          */
83         struct intel_sdvo_caps caps;
84
85         /* Pixel clock limitations reported by the SDVO device, in kHz */
86         int pixel_clock_min, pixel_clock_max;
87
88         /*
89         * For multiple function SDVO device,
90         * this is for current attached outputs.
91         */
92         uint16_t attached_output;
93
94         /**
95          * This is set if we're going to treat the device as TV-out.
96          *
97          * While we have these nice friendly flags for output types that ought
98          * to decide this for us, the S-Video output on our HDMI+S-Video card
99          * shows up as RGB1 (VGA).
100          */
101         bool is_tv;
102
103         /* This is for current tv format name */
104         int tv_format_index;
105
106         /**
107          * This is set if we treat the device as HDMI, instead of DVI.
108          */
109         bool is_hdmi;
110
111         /**
112          * This is set if we detect output of sdvo device as LVDS and
113          * have a valid fixed mode to use with the panel.
114          */
115         bool is_lvds;
116
117         /**
118          * This is sdvo fixed pannel mode pointer
119          */
120         struct drm_display_mode *sdvo_lvds_fixed_mode;
121
122         /*
123          * supported encoding mode, used to determine whether HDMI is
124          * supported
125          */
126         struct intel_sdvo_encode encode;
127
128         /* DDC bus used by this SDVO encoder */
129         uint8_t ddc_bus;
130
131         /* Input timings for adjusted_mode */
132         struct intel_sdvo_dtd input_dtd;
133 };
134
135 struct intel_sdvo_connector {
136         struct intel_connector base;
137
138         /* Mark the type of connector */
139         uint16_t output_flag;
140
141         /* This contains all current supported TV format */
142         u8 tv_format_supported[TV_FORMAT_NUM];
143         int   format_supported_num;
144         struct drm_property *tv_format;
145
146         /* add the property for the SDVO-TV */
147         struct drm_property *left;
148         struct drm_property *right;
149         struct drm_property *top;
150         struct drm_property *bottom;
151         struct drm_property *hpos;
152         struct drm_property *vpos;
153         struct drm_property *contrast;
154         struct drm_property *saturation;
155         struct drm_property *hue;
156         struct drm_property *sharpness;
157         struct drm_property *flicker_filter;
158         struct drm_property *flicker_filter_adaptive;
159         struct drm_property *flicker_filter_2d;
160         struct drm_property *tv_chroma_filter;
161         struct drm_property *tv_luma_filter;
162         struct drm_property *dot_crawl;
163
164         /* add the property for the SDVO-TV/LVDS */
165         struct drm_property *brightness;
166
167         /* Add variable to record current setting for the above property */
168         u32     left_margin, right_margin, top_margin, bottom_margin;
169
170         /* this is to get the range of margin.*/
171         u32     max_hscan,  max_vscan;
172         u32     max_hpos, cur_hpos;
173         u32     max_vpos, cur_vpos;
174         u32     cur_brightness, max_brightness;
175         u32     cur_contrast,   max_contrast;
176         u32     cur_saturation, max_saturation;
177         u32     cur_hue,        max_hue;
178         u32     cur_sharpness,  max_sharpness;
179         u32     cur_flicker_filter,             max_flicker_filter;
180         u32     cur_flicker_filter_adaptive,    max_flicker_filter_adaptive;
181         u32     cur_flicker_filter_2d,          max_flicker_filter_2d;
182         u32     cur_tv_chroma_filter,   max_tv_chroma_filter;
183         u32     cur_tv_luma_filter,     max_tv_luma_filter;
184         u32     cur_dot_crawl,  max_dot_crawl;
185 };
186
187 static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
188 {
189         return container_of(encoder, struct intel_sdvo, base.base);
190 }
191
192 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
193 {
194         return container_of(intel_attached_encoder(connector),
195                             struct intel_sdvo, base);
196 }
197
198 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
199 {
200         return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
201 }
202
203 static bool
204 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
205 static bool
206 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
207                               struct intel_sdvo_connector *intel_sdvo_connector,
208                               int type);
209 static bool
210 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
211                                    struct intel_sdvo_connector *intel_sdvo_connector);
212
213 /**
214  * Writes the SDVOB or SDVOC with the given value, but always writes both
215  * SDVOB and SDVOC to work around apparent hardware issues (according to
216  * comments in the BIOS).
217  */
218 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
219 {
220         struct drm_device *dev = intel_sdvo->base.base.dev;
221         struct drm_i915_private *dev_priv = dev->dev_private;
222         u32 bval = val, cval = val;
223         int i;
224
225         if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
226                 I915_WRITE(intel_sdvo->sdvo_reg, val);
227                 I915_READ(intel_sdvo->sdvo_reg);
228                 return;
229         }
230
231         if (intel_sdvo->sdvo_reg == SDVOB) {
232                 cval = I915_READ(SDVOC);
233         } else {
234                 bval = I915_READ(SDVOB);
235         }
236         /*
237          * Write the registers twice for luck. Sometimes,
238          * writing them only once doesn't appear to 'stick'.
239          * The BIOS does this too. Yay, magic
240          */
241         for (i = 0; i < 2; i++)
242         {
243                 I915_WRITE(SDVOB, bval);
244                 I915_READ(SDVOB);
245                 I915_WRITE(SDVOC, cval);
246                 I915_READ(SDVOC);
247         }
248 }
249
250 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
251 {
252         struct i2c_msg msgs[] = {
253                 {
254                         .addr = intel_sdvo->slave_addr,
255                         .flags = 0,
256                         .len = 1,
257                         .buf = &addr,
258                 },
259                 {
260                         .addr = intel_sdvo->slave_addr,
261                         .flags = I2C_M_RD,
262                         .len = 1,
263                         .buf = ch,
264                 }
265         };
266         int ret;
267
268         if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
269                 return true;
270
271         DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
272         return false;
273 }
274
275 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
276 /** Mapping of command numbers to names, for debug output */
277 static const struct _sdvo_cmd_name {
278         u8 cmd;
279         const char *name;
280 } sdvo_cmd_names[] = {
281     SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
282     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
283     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
284     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
285     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
286     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
287     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
288     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
289     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
290     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
291     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
292     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
293     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
294     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
295     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
296     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
297     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
298     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
299     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
300     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
301     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
302     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
303     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
304     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
305     SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
306     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
307     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
308     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
309     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
310     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
311     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
312     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
313     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
314     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
315     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
316     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
317     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
318     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
319     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
320     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
321     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
322     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
323     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
324
325     /* Add the op code for SDVO enhancements */
326     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
327     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
328     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
329     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
330     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
331     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
332     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
333     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
334     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
335     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
336     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
337     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
338     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
339     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
340     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
341     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
342     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
343     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
344     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
345     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
346     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
347     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
348     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
349     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
350     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
351     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
352     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
353     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
354     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
355     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
356     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
357     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
358     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
359     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
360     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
361     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
362     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
363     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
364     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
365     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
366     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
367     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
368     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
369     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
370
371     /* HDMI op code */
372     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
373     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
374     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
375     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
376     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
377     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
378     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
379     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
380     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
381     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
382     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
383     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
384     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
385     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
386     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
387     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
388     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
389     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
390     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
391     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
392 };
393
394 #define IS_SDVOB(reg)   (reg == SDVOB || reg == PCH_SDVOB)
395 #define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
396
397 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
398                                    const void *args, int args_len)
399 {
400         int i;
401
402         DRM_DEBUG_KMS("%s: W: %02X ",
403                                 SDVO_NAME(intel_sdvo), cmd);
404         for (i = 0; i < args_len; i++)
405                 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
406         for (; i < 8; i++)
407                 DRM_LOG_KMS("   ");
408         for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
409                 if (cmd == sdvo_cmd_names[i].cmd) {
410                         DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
411                         break;
412                 }
413         }
414         if (i == ARRAY_SIZE(sdvo_cmd_names))
415                 DRM_LOG_KMS("(%02X)", cmd);
416         DRM_LOG_KMS("\n");
417 }
418
419 static const char *cmd_status_names[] = {
420         "Power on",
421         "Success",
422         "Not supported",
423         "Invalid arg",
424         "Pending",
425         "Target not specified",
426         "Scaling not supported"
427 };
428
429 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
430                                  const void *args, int args_len)
431 {
432         u8 buf[args_len*2 + 2], status;
433         struct i2c_msg msgs[args_len + 3];
434         int i, ret;
435
436         intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
437
438         for (i = 0; i < args_len; i++) {
439                 msgs[i].addr = intel_sdvo->slave_addr;
440                 msgs[i].flags = 0;
441                 msgs[i].len = 2;
442                 msgs[i].buf = buf + 2 *i;
443                 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
444                 buf[2*i + 1] = ((u8*)args)[i];
445         }
446         msgs[i].addr = intel_sdvo->slave_addr;
447         msgs[i].flags = 0;
448         msgs[i].len = 2;
449         msgs[i].buf = buf + 2*i;
450         buf[2*i + 0] = SDVO_I2C_OPCODE;
451         buf[2*i + 1] = cmd;
452
453         /* the following two are to read the response */
454         status = SDVO_I2C_CMD_STATUS;
455         msgs[i+1].addr = intel_sdvo->slave_addr;
456         msgs[i+1].flags = 0;
457         msgs[i+1].len = 1;
458         msgs[i+1].buf = &status;
459
460         msgs[i+2].addr = intel_sdvo->slave_addr;
461         msgs[i+2].flags = I2C_M_RD;
462         msgs[i+2].len = 1;
463         msgs[i+2].buf = &status;
464
465         ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
466         if (ret < 0) {
467                 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
468                 return false;
469         }
470         if (ret != i+3) {
471                 /* failure in I2C transfer */
472                 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
473                 return false;
474         }
475
476         i = 3;
477         while (status == SDVO_CMD_STATUS_PENDING && i--) {
478                 if (!intel_sdvo_read_byte(intel_sdvo,
479                                           SDVO_I2C_CMD_STATUS,
480                                           &status))
481                         return false;
482         }
483         if (status != SDVO_CMD_STATUS_SUCCESS) {
484                 DRM_DEBUG_KMS("command returns response %s [%d]\n",
485                               status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP ? cmd_status_names[status] : "???",
486                               status);
487                 return false;
488         }
489
490         return true;
491 }
492
493 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
494                                      void *response, int response_len)
495 {
496         u8 retry = 5;
497         u8 status;
498         int i;
499
500         /*
501          * The documentation states that all commands will be
502          * processed within 15µs, and that we need only poll
503          * the status byte a maximum of 3 times in order for the
504          * command to be complete.
505          *
506          * Check 5 times in case the hardware failed to read the docs.
507          */
508         do {
509                 if (!intel_sdvo_read_byte(intel_sdvo,
510                                           SDVO_I2C_CMD_STATUS,
511                                           &status))
512                         return false;
513         } while (status == SDVO_CMD_STATUS_PENDING && --retry);
514
515         DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
516         if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
517                 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
518         else
519                 DRM_LOG_KMS("(??? %d)", status);
520
521         if (status != SDVO_CMD_STATUS_SUCCESS)
522                 goto log_fail;
523
524         /* Read the command response */
525         for (i = 0; i < response_len; i++) {
526                 if (!intel_sdvo_read_byte(intel_sdvo,
527                                           SDVO_I2C_RETURN_0 + i,
528                                           &((u8 *)response)[i]))
529                         goto log_fail;
530                 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
531         }
532         DRM_LOG_KMS("\n");
533         return true;
534
535 log_fail:
536         DRM_LOG_KMS("\n");
537         return false;
538 }
539
540 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
541 {
542         if (mode->clock >= 100000)
543                 return 1;
544         else if (mode->clock >= 50000)
545                 return 2;
546         else
547                 return 4;
548 }
549
550 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
551                                               u8 ddc_bus)
552 {
553         return intel_sdvo_write_cmd(intel_sdvo,
554                                     SDVO_CMD_SET_CONTROL_BUS_SWITCH,
555                                     &ddc_bus, 1);
556 }
557
558 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
559 {
560         return intel_sdvo_write_cmd(intel_sdvo, cmd, data, len);
561 }
562
563 static bool
564 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
565 {
566         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
567                 return false;
568
569         return intel_sdvo_read_response(intel_sdvo, value, len);
570 }
571
572 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
573 {
574         struct intel_sdvo_set_target_input_args targets = {0};
575         return intel_sdvo_set_value(intel_sdvo,
576                                     SDVO_CMD_SET_TARGET_INPUT,
577                                     &targets, sizeof(targets));
578 }
579
580 /**
581  * Return whether each input is trained.
582  *
583  * This function is making an assumption about the layout of the response,
584  * which should be checked against the docs.
585  */
586 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
587 {
588         struct intel_sdvo_get_trained_inputs_response response;
589
590         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
591                                   &response, sizeof(response)))
592                 return false;
593
594         *input_1 = response.input0_trained;
595         *input_2 = response.input1_trained;
596         return true;
597 }
598
599 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
600                                           u16 outputs)
601 {
602         return intel_sdvo_set_value(intel_sdvo,
603                                     SDVO_CMD_SET_ACTIVE_OUTPUTS,
604                                     &outputs, sizeof(outputs));
605 }
606
607 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
608                                                int mode)
609 {
610         u8 state = SDVO_ENCODER_STATE_ON;
611
612         switch (mode) {
613         case DRM_MODE_DPMS_ON:
614                 state = SDVO_ENCODER_STATE_ON;
615                 break;
616         case DRM_MODE_DPMS_STANDBY:
617                 state = SDVO_ENCODER_STATE_STANDBY;
618                 break;
619         case DRM_MODE_DPMS_SUSPEND:
620                 state = SDVO_ENCODER_STATE_SUSPEND;
621                 break;
622         case DRM_MODE_DPMS_OFF:
623                 state = SDVO_ENCODER_STATE_OFF;
624                 break;
625         }
626
627         return intel_sdvo_set_value(intel_sdvo,
628                                     SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
629 }
630
631 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
632                                                    int *clock_min,
633                                                    int *clock_max)
634 {
635         struct intel_sdvo_pixel_clock_range clocks;
636
637         if (!intel_sdvo_get_value(intel_sdvo,
638                                   SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
639                                   &clocks, sizeof(clocks)))
640                 return false;
641
642         /* Convert the values from units of 10 kHz to kHz. */
643         *clock_min = clocks.min * 10;
644         *clock_max = clocks.max * 10;
645         return true;
646 }
647
648 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
649                                          u16 outputs)
650 {
651         return intel_sdvo_set_value(intel_sdvo,
652                                     SDVO_CMD_SET_TARGET_OUTPUT,
653                                     &outputs, sizeof(outputs));
654 }
655
656 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
657                                   struct intel_sdvo_dtd *dtd)
658 {
659         return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
660                 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
661 }
662
663 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
664                                          struct intel_sdvo_dtd *dtd)
665 {
666         return intel_sdvo_set_timing(intel_sdvo,
667                                      SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
668 }
669
670 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
671                                          struct intel_sdvo_dtd *dtd)
672 {
673         return intel_sdvo_set_timing(intel_sdvo,
674                                      SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
675 }
676
677 static bool
678 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
679                                          uint16_t clock,
680                                          uint16_t width,
681                                          uint16_t height)
682 {
683         struct intel_sdvo_preferred_input_timing_args args;
684
685         memset(&args, 0, sizeof(args));
686         args.clock = clock;
687         args.width = width;
688         args.height = height;
689         args.interlace = 0;
690
691         if (intel_sdvo->is_lvds &&
692            (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
693             intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
694                 args.scaled = 1;
695
696         return intel_sdvo_set_value(intel_sdvo,
697                                     SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
698                                     &args, sizeof(args));
699 }
700
701 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
702                                                   struct intel_sdvo_dtd *dtd)
703 {
704         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
705                                     &dtd->part1, sizeof(dtd->part1)) &&
706                 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
707                                      &dtd->part2, sizeof(dtd->part2));
708 }
709
710 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
711 {
712         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
713 }
714
715 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
716                                          const struct drm_display_mode *mode)
717 {
718         uint16_t width, height;
719         uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
720         uint16_t h_sync_offset, v_sync_offset;
721
722         width = mode->crtc_hdisplay;
723         height = mode->crtc_vdisplay;
724
725         /* do some mode translations */
726         h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
727         h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
728
729         v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
730         v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
731
732         h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
733         v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
734
735         dtd->part1.clock = mode->clock / 10;
736         dtd->part1.h_active = width & 0xff;
737         dtd->part1.h_blank = h_blank_len & 0xff;
738         dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
739                 ((h_blank_len >> 8) & 0xf);
740         dtd->part1.v_active = height & 0xff;
741         dtd->part1.v_blank = v_blank_len & 0xff;
742         dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
743                 ((v_blank_len >> 8) & 0xf);
744
745         dtd->part2.h_sync_off = h_sync_offset & 0xff;
746         dtd->part2.h_sync_width = h_sync_len & 0xff;
747         dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
748                 (v_sync_len & 0xf);
749         dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
750                 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
751                 ((v_sync_len & 0x30) >> 4);
752
753         dtd->part2.dtd_flags = 0x18;
754         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
755                 dtd->part2.dtd_flags |= 0x2;
756         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
757                 dtd->part2.dtd_flags |= 0x4;
758
759         dtd->part2.sdvo_flags = 0;
760         dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
761         dtd->part2.reserved = 0;
762 }
763
764 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
765                                          const struct intel_sdvo_dtd *dtd)
766 {
767         mode->hdisplay = dtd->part1.h_active;
768         mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
769         mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
770         mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
771         mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
772         mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
773         mode->htotal = mode->hdisplay + dtd->part1.h_blank;
774         mode->htotal += (dtd->part1.h_high & 0xf) << 8;
775
776         mode->vdisplay = dtd->part1.v_active;
777         mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
778         mode->vsync_start = mode->vdisplay;
779         mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
780         mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
781         mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
782         mode->vsync_end = mode->vsync_start +
783                 (dtd->part2.v_sync_off_width & 0xf);
784         mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
785         mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
786         mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
787
788         mode->clock = dtd->part1.clock * 10;
789
790         mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
791         if (dtd->part2.dtd_flags & 0x2)
792                 mode->flags |= DRM_MODE_FLAG_PHSYNC;
793         if (dtd->part2.dtd_flags & 0x4)
794                 mode->flags |= DRM_MODE_FLAG_PVSYNC;
795 }
796
797 static bool intel_sdvo_get_supp_encode(struct intel_sdvo *intel_sdvo,
798                                        struct intel_sdvo_encode *encode)
799 {
800         if (intel_sdvo_get_value(intel_sdvo,
801                                   SDVO_CMD_GET_SUPP_ENCODE,
802                                   encode, sizeof(*encode)))
803                 return true;
804
805         /* non-support means DVI */
806         memset(encode, 0, sizeof(*encode));
807         return false;
808 }
809
810 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
811                                   uint8_t mode)
812 {
813         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
814 }
815
816 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
817                                        uint8_t mode)
818 {
819         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
820 }
821
822 #if 0
823 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
824 {
825         int i, j;
826         uint8_t set_buf_index[2];
827         uint8_t av_split;
828         uint8_t buf_size;
829         uint8_t buf[48];
830         uint8_t *pos;
831
832         intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
833
834         for (i = 0; i <= av_split; i++) {
835                 set_buf_index[0] = i; set_buf_index[1] = 0;
836                 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
837                                      set_buf_index, 2);
838                 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
839                 intel_sdvo_read_response(encoder, &buf_size, 1);
840
841                 pos = buf;
842                 for (j = 0; j <= buf_size; j += 8) {
843                         intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
844                                              NULL, 0);
845                         intel_sdvo_read_response(encoder, pos, 8);
846                         pos += 8;
847                 }
848         }
849 }
850 #endif
851
852 static bool intel_sdvo_set_hdmi_buf(struct intel_sdvo *intel_sdvo,
853                                     int index,
854                                     uint8_t *data, int8_t size, uint8_t tx_rate)
855 {
856     uint8_t set_buf_index[2];
857
858     set_buf_index[0] = index;
859     set_buf_index[1] = 0;
860
861     if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_INDEX,
862                               set_buf_index, 2))
863             return false;
864
865     for (; size > 0; size -= 8) {
866         if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_DATA, data, 8))
867                 return false;
868
869         data += 8;
870     }
871
872     return intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_TXRATE, &tx_rate, 1);
873 }
874
875 static uint8_t intel_sdvo_calc_hbuf_csum(uint8_t *data, uint8_t size)
876 {
877         uint8_t csum = 0;
878         int i;
879
880         for (i = 0; i < size; i++)
881                 csum += data[i];
882
883         return 0x100 - csum;
884 }
885
886 #define DIP_TYPE_AVI    0x82
887 #define DIP_VERSION_AVI 0x2
888 #define DIP_LEN_AVI     13
889
890 struct dip_infoframe {
891         uint8_t type;
892         uint8_t version;
893         uint8_t len;
894         uint8_t checksum;
895         union {
896                 struct {
897                         /* Packet Byte #1 */
898                         uint8_t S:2;
899                         uint8_t B:2;
900                         uint8_t A:1;
901                         uint8_t Y:2;
902                         uint8_t rsvd1:1;
903                         /* Packet Byte #2 */
904                         uint8_t R:4;
905                         uint8_t M:2;
906                         uint8_t C:2;
907                         /* Packet Byte #3 */
908                         uint8_t SC:2;
909                         uint8_t Q:2;
910                         uint8_t EC:3;
911                         uint8_t ITC:1;
912                         /* Packet Byte #4 */
913                         uint8_t VIC:7;
914                         uint8_t rsvd2:1;
915                         /* Packet Byte #5 */
916                         uint8_t PR:4;
917                         uint8_t rsvd3:4;
918                         /* Packet Byte #6~13 */
919                         uint16_t top_bar_end;
920                         uint16_t bottom_bar_start;
921                         uint16_t left_bar_end;
922                         uint16_t right_bar_start;
923                 } avi;
924                 struct {
925                         /* Packet Byte #1 */
926                         uint8_t channel_count:3;
927                         uint8_t rsvd1:1;
928                         uint8_t coding_type:4;
929                         /* Packet Byte #2 */
930                         uint8_t sample_size:2; /* SS0, SS1 */
931                         uint8_t sample_frequency:3;
932                         uint8_t rsvd2:3;
933                         /* Packet Byte #3 */
934                         uint8_t coding_type_private:5;
935                         uint8_t rsvd3:3;
936                         /* Packet Byte #4 */
937                         uint8_t channel_allocation;
938                         /* Packet Byte #5 */
939                         uint8_t rsvd4:3;
940                         uint8_t level_shift:4;
941                         uint8_t downmix_inhibit:1;
942                 } audio;
943                 uint8_t payload[28];
944         } __attribute__ ((packed)) u;
945 } __attribute__((packed));
946
947 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
948                                          struct drm_display_mode * mode)
949 {
950         struct dip_infoframe avi_if = {
951                 .type = DIP_TYPE_AVI,
952                 .version = DIP_VERSION_AVI,
953                 .len = DIP_LEN_AVI,
954         };
955
956         avi_if.checksum = intel_sdvo_calc_hbuf_csum((uint8_t *)&avi_if,
957                                                     4 + avi_if.len);
958         return intel_sdvo_set_hdmi_buf(intel_sdvo, 1, (uint8_t *)&avi_if,
959                                        4 + avi_if.len,
960                                        SDVO_HBUF_TX_VSYNC);
961 }
962
963 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
964 {
965         struct intel_sdvo_tv_format format;
966         uint32_t format_map;
967
968         format_map = 1 << intel_sdvo->tv_format_index;
969         memset(&format, 0, sizeof(format));
970         memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
971
972         BUILD_BUG_ON(sizeof(format) != 6);
973         return intel_sdvo_set_value(intel_sdvo,
974                                     SDVO_CMD_SET_TV_FORMAT,
975                                     &format, sizeof(format));
976 }
977
978 static bool
979 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
980                                         struct drm_display_mode *mode)
981 {
982         struct intel_sdvo_dtd output_dtd;
983
984         if (!intel_sdvo_set_target_output(intel_sdvo,
985                                           intel_sdvo->attached_output))
986                 return false;
987
988         intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
989         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
990                 return false;
991
992         return true;
993 }
994
995 static bool
996 intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
997                                         struct drm_display_mode *mode,
998                                         struct drm_display_mode *adjusted_mode)
999 {
1000         /* Reset the input timing to the screen. Assume always input 0. */
1001         if (!intel_sdvo_set_target_input(intel_sdvo))
1002                 return false;
1003
1004         if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1005                                                       mode->clock / 10,
1006                                                       mode->hdisplay,
1007                                                       mode->vdisplay))
1008                 return false;
1009
1010         if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
1011                                                    &intel_sdvo->input_dtd))
1012                 return false;
1013
1014         intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd);
1015
1016         drm_mode_set_crtcinfo(adjusted_mode, 0);
1017         return true;
1018 }
1019
1020 static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
1021                                   struct drm_display_mode *mode,
1022                                   struct drm_display_mode *adjusted_mode)
1023 {
1024         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1025         int multiplier;
1026
1027         /* We need to construct preferred input timings based on our
1028          * output timings.  To do that, we have to set the output
1029          * timings, even though this isn't really the right place in
1030          * the sequence to do it. Oh well.
1031          */
1032         if (intel_sdvo->is_tv) {
1033                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
1034                         return false;
1035
1036                 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
1037                                                              mode,
1038                                                              adjusted_mode);
1039         } else if (intel_sdvo->is_lvds) {
1040                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1041                                                              intel_sdvo->sdvo_lvds_fixed_mode))
1042                         return false;
1043
1044                 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
1045                                                              mode,
1046                                                              adjusted_mode);
1047         }
1048
1049         /* Make the CRTC code factor in the SDVO pixel multiplier.  The
1050          * SDVO device will factor out the multiplier during mode_set.
1051          */
1052         multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
1053         intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
1054
1055         return true;
1056 }
1057
1058 static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1059                                 struct drm_display_mode *mode,
1060                                 struct drm_display_mode *adjusted_mode)
1061 {
1062         struct drm_device *dev = encoder->dev;
1063         struct drm_i915_private *dev_priv = dev->dev_private;
1064         struct drm_crtc *crtc = encoder->crtc;
1065         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1066         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1067         u32 sdvox;
1068         struct intel_sdvo_in_out_map in_out;
1069         struct intel_sdvo_dtd input_dtd;
1070         int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
1071         int rate;
1072
1073         if (!mode)
1074                 return;
1075
1076         /* First, set the input mapping for the first input to our controlled
1077          * output. This is only correct if we're a single-input device, in
1078          * which case the first input is the output from the appropriate SDVO
1079          * channel on the motherboard.  In a two-input device, the first input
1080          * will be SDVOB and the second SDVOC.
1081          */
1082         in_out.in0 = intel_sdvo->attached_output;
1083         in_out.in1 = 0;
1084
1085         intel_sdvo_set_value(intel_sdvo,
1086                              SDVO_CMD_SET_IN_OUT_MAP,
1087                              &in_out, sizeof(in_out));
1088
1089         /* Set the output timings to the screen */
1090         if (!intel_sdvo_set_target_output(intel_sdvo,
1091                                           intel_sdvo->attached_output))
1092                 return;
1093
1094         /* We have tried to get input timing in mode_fixup, and filled into
1095          * adjusted_mode.
1096          */
1097         if (intel_sdvo->is_tv || intel_sdvo->is_lvds) {
1098                 input_dtd = intel_sdvo->input_dtd;
1099         } else {
1100                 /* Set the output timing to the screen */
1101                 if (!intel_sdvo_set_target_output(intel_sdvo,
1102                                                   intel_sdvo->attached_output))
1103                         return;
1104
1105                 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1106                 (void) intel_sdvo_set_output_timing(intel_sdvo, &input_dtd);
1107         }
1108
1109         /* Set the input timing to the screen. Assume always input 0. */
1110         if (!intel_sdvo_set_target_input(intel_sdvo))
1111                 return;
1112
1113         if (intel_sdvo->is_hdmi &&
1114             !intel_sdvo_set_avi_infoframe(intel_sdvo, mode))
1115                 return;
1116
1117         if (intel_sdvo->is_tv &&
1118             !intel_sdvo_set_tv_format(intel_sdvo))
1119                 return;
1120
1121         (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
1122
1123         switch (pixel_multiplier) {
1124         default:
1125         case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1126         case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1127         case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1128         }
1129         if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1130                 return;
1131
1132         /* Set the SDVO control regs. */
1133         if (INTEL_INFO(dev)->gen >= 4) {
1134                 sdvox = SDVO_BORDER_ENABLE;
1135                 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
1136                         sdvox |= SDVO_VSYNC_ACTIVE_HIGH;
1137                 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
1138                         sdvox |= SDVO_HSYNC_ACTIVE_HIGH;
1139         } else {
1140                 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1141                 switch (intel_sdvo->sdvo_reg) {
1142                 case SDVOB:
1143                         sdvox &= SDVOB_PRESERVE_MASK;
1144                         break;
1145                 case SDVOC:
1146                         sdvox &= SDVOC_PRESERVE_MASK;
1147                         break;
1148                 }
1149                 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1150         }
1151         if (intel_crtc->pipe == 1)
1152                 sdvox |= SDVO_PIPE_B_SELECT;
1153         if (intel_sdvo->is_hdmi)
1154                 sdvox |= SDVO_AUDIO_ENABLE;
1155
1156         if (INTEL_INFO(dev)->gen >= 4) {
1157                 /* done in crtc_mode_set as the dpll_md reg must be written early */
1158         } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1159                 /* done in crtc_mode_set as it lives inside the dpll register */
1160         } else {
1161                 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1162         }
1163
1164         if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL)
1165                 sdvox |= SDVO_STALL_SELECT;
1166         intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1167 }
1168
1169 static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1170 {
1171         struct drm_device *dev = encoder->dev;
1172         struct drm_i915_private *dev_priv = dev->dev_private;
1173         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1174         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
1175         u32 temp;
1176
1177         if (mode != DRM_MODE_DPMS_ON) {
1178                 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1179                 if (0)
1180                         intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1181
1182                 if (mode == DRM_MODE_DPMS_OFF) {
1183                         temp = I915_READ(intel_sdvo->sdvo_reg);
1184                         if ((temp & SDVO_ENABLE) != 0) {
1185                                 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1186                         }
1187                 }
1188         } else {
1189                 bool input1, input2;
1190                 int i;
1191                 u8 status;
1192
1193                 temp = I915_READ(intel_sdvo->sdvo_reg);
1194                 if ((temp & SDVO_ENABLE) == 0)
1195                         intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1196                 for (i = 0; i < 2; i++)
1197                         intel_wait_for_vblank(dev, intel_crtc->pipe);
1198
1199                 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1200                 /* Warn if the device reported failure to sync.
1201                  * A lot of SDVO devices fail to notify of sync, but it's
1202                  * a given it the status is a success, we succeeded.
1203                  */
1204                 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1205                         DRM_DEBUG_KMS("First %s output reported failure to "
1206                                         "sync\n", SDVO_NAME(intel_sdvo));
1207                 }
1208
1209                 if (0)
1210                         intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1211                 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1212         }
1213         return;
1214 }
1215
1216 static int intel_sdvo_mode_valid(struct drm_connector *connector,
1217                                  struct drm_display_mode *mode)
1218 {
1219         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1220
1221         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1222                 return MODE_NO_DBLESCAN;
1223
1224         if (intel_sdvo->pixel_clock_min > mode->clock)
1225                 return MODE_CLOCK_LOW;
1226
1227         if (intel_sdvo->pixel_clock_max < mode->clock)
1228                 return MODE_CLOCK_HIGH;
1229
1230         if (intel_sdvo->is_lvds) {
1231                 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1232                         return MODE_PANEL;
1233
1234                 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1235                         return MODE_PANEL;
1236         }
1237
1238         return MODE_OK;
1239 }
1240
1241 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1242 {
1243         if (!intel_sdvo_get_value(intel_sdvo,
1244                                   SDVO_CMD_GET_DEVICE_CAPS,
1245                                   caps, sizeof(*caps)))
1246                 return false;
1247
1248         DRM_DEBUG_KMS("SDVO capabilities:\n"
1249                       "  vendor_id: %d\n"
1250                       "  device_id: %d\n"
1251                       "  device_rev_id: %d\n"
1252                       "  sdvo_version_major: %d\n"
1253                       "  sdvo_version_minor: %d\n"
1254                       "  sdvo_inputs_mask: %d\n"
1255                       "  smooth_scaling: %d\n"
1256                       "  sharp_scaling: %d\n"
1257                       "  up_scaling: %d\n"
1258                       "  down_scaling: %d\n"
1259                       "  stall_support: %d\n"
1260                       "  output_flags: %d\n",
1261                       caps->vendor_id,
1262                       caps->device_id,
1263                       caps->device_rev_id,
1264                       caps->sdvo_version_major,
1265                       caps->sdvo_version_minor,
1266                       caps->sdvo_inputs_mask,
1267                       caps->smooth_scaling,
1268                       caps->sharp_scaling,
1269                       caps->up_scaling,
1270                       caps->down_scaling,
1271                       caps->stall_support,
1272                       caps->output_flags);
1273
1274         return true;
1275 }
1276
1277 /* No use! */
1278 #if 0
1279 struct drm_connector* intel_sdvo_find(struct drm_device *dev, int sdvoB)
1280 {
1281         struct drm_connector *connector = NULL;
1282         struct intel_sdvo *iout = NULL;
1283         struct intel_sdvo *sdvo;
1284
1285         /* find the sdvo connector */
1286         list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1287                 iout = to_intel_sdvo(connector);
1288
1289                 if (iout->type != INTEL_OUTPUT_SDVO)
1290                         continue;
1291
1292                 sdvo = iout->dev_priv;
1293
1294                 if (sdvo->sdvo_reg == SDVOB && sdvoB)
1295                         return connector;
1296
1297                 if (sdvo->sdvo_reg == SDVOC && !sdvoB)
1298                         return connector;
1299
1300         }
1301
1302         return NULL;
1303 }
1304
1305 int intel_sdvo_supports_hotplug(struct drm_connector *connector)
1306 {
1307         u8 response[2];
1308         u8 status;
1309         struct intel_sdvo *intel_sdvo;
1310         DRM_DEBUG_KMS("\n");
1311
1312         if (!connector)
1313                 return 0;
1314
1315         intel_sdvo = to_intel_sdvo(connector);
1316
1317         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1318                                     &response, 2) && response[0];
1319 }
1320
1321 void intel_sdvo_set_hotplug(struct drm_connector *connector, int on)
1322 {
1323         u8 response[2];
1324         u8 status;
1325         struct intel_sdvo *intel_sdvo = to_intel_sdvo(connector);
1326
1327         intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1328         intel_sdvo_read_response(intel_sdvo, &response, 2);
1329
1330         if (on) {
1331                 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL, 0);
1332                 status = intel_sdvo_read_response(intel_sdvo, &response, 2);
1333
1334                 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
1335         } else {
1336                 response[0] = 0;
1337                 response[1] = 0;
1338                 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
1339         }
1340
1341         intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1342         intel_sdvo_read_response(intel_sdvo, &response, 2);
1343 }
1344 #endif
1345
1346 static bool
1347 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1348 {
1349         int caps = 0;
1350
1351         if (intel_sdvo->caps.output_flags &
1352                 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1))
1353                 caps++;
1354         if (intel_sdvo->caps.output_flags &
1355                 (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1))
1356                 caps++;
1357         if (intel_sdvo->caps.output_flags &
1358                 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_SVID1))
1359                 caps++;
1360         if (intel_sdvo->caps.output_flags &
1361                 (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_CVBS1))
1362                 caps++;
1363         if (intel_sdvo->caps.output_flags &
1364                 (SDVO_OUTPUT_YPRPB0 | SDVO_OUTPUT_YPRPB1))
1365                 caps++;
1366
1367         if (intel_sdvo->caps.output_flags &
1368                 (SDVO_OUTPUT_SCART0 | SDVO_OUTPUT_SCART1))
1369                 caps++;
1370
1371         if (intel_sdvo->caps.output_flags &
1372                 (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1))
1373                 caps++;
1374
1375         return (caps > 1);
1376 }
1377
1378 static struct edid *
1379 intel_sdvo_get_edid(struct drm_connector *connector)
1380 {
1381         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1382         return drm_get_edid(connector, &sdvo->ddc);
1383 }
1384
1385 static struct drm_connector *
1386 intel_find_analog_connector(struct drm_device *dev)
1387 {
1388         struct drm_connector *connector;
1389         struct intel_sdvo *encoder;
1390
1391         list_for_each_entry(encoder,
1392                             &dev->mode_config.encoder_list,
1393                             base.base.head) {
1394                 if (encoder->base.type == INTEL_OUTPUT_ANALOG) {
1395                         list_for_each_entry(connector,
1396                                             &dev->mode_config.connector_list,
1397                                             head) {
1398                                 if (&encoder->base ==
1399                                     intel_attached_encoder(connector))
1400                                         return connector;
1401                         }
1402                 }
1403         }
1404
1405         return NULL;
1406 }
1407
1408 static int
1409 intel_analog_is_connected(struct drm_device *dev)
1410 {
1411         struct drm_connector *analog_connector;
1412
1413         analog_connector = intel_find_analog_connector(dev);
1414         if (!analog_connector)
1415                 return false;
1416
1417         if (analog_connector->funcs->detect(analog_connector, false) ==
1418                         connector_status_disconnected)
1419                 return false;
1420
1421         return true;
1422 }
1423
1424 /* Mac mini hack -- use the same DDC as the analog connector */
1425 static struct edid *
1426 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1427 {
1428         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1429
1430         if (!intel_analog_is_connected(connector->dev))
1431                 return NULL;
1432
1433         return drm_get_edid(connector, &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
1434 }
1435
1436 enum drm_connector_status
1437 intel_sdvo_hdmi_sink_detect(struct drm_connector *connector)
1438 {
1439         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1440         enum drm_connector_status status;
1441         struct edid *edid;
1442
1443         edid = intel_sdvo_get_edid(connector);
1444
1445         if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1446                 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1447
1448                 /*
1449                  * Don't use the 1 as the argument of DDC bus switch to get
1450                  * the EDID. It is used for SDVO SPD ROM.
1451                  */
1452                 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1453                         intel_sdvo->ddc_bus = ddc;
1454                         edid = intel_sdvo_get_edid(connector);
1455                         if (edid)
1456                                 break;
1457                 }
1458                 /*
1459                  * If we found the EDID on the other bus,
1460                  * assume that is the correct DDC bus.
1461                  */
1462                 if (edid == NULL)
1463                         intel_sdvo->ddc_bus = saved_ddc;
1464         }
1465
1466         /*
1467          * When there is no edid and no monitor is connected with VGA
1468          * port, try to use the CRT ddc to read the EDID for DVI-connector.
1469          */
1470         if (edid == NULL)
1471                 edid = intel_sdvo_get_analog_edid(connector);
1472
1473         status = connector_status_unknown;
1474         if (edid != NULL) {
1475                 /* DDC bus is shared, match EDID to connector type */
1476                 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1477                         status = connector_status_connected;
1478                         intel_sdvo->is_hdmi = drm_detect_hdmi_monitor(edid);
1479                 }
1480                 connector->display_info.raw_edid = NULL;
1481                 kfree(edid);
1482         }
1483         
1484         return status;
1485 }
1486
1487 static enum drm_connector_status
1488 intel_sdvo_detect(struct drm_connector *connector, bool force)
1489 {
1490         uint16_t response;
1491         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1492         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1493         enum drm_connector_status ret;
1494
1495         if (!intel_sdvo_write_cmd(intel_sdvo,
1496                                   SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
1497                 return connector_status_unknown;
1498         if (intel_sdvo->is_tv) {
1499                 /* add 30ms delay when the output type is SDVO-TV */
1500                 mdelay(30);
1501         }
1502         if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1503                 return connector_status_unknown;
1504
1505         DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1506                       response & 0xff, response >> 8,
1507                       intel_sdvo_connector->output_flag);
1508
1509         if (response == 0)
1510                 return connector_status_disconnected;
1511
1512         intel_sdvo->attached_output = response;
1513
1514         if ((intel_sdvo_connector->output_flag & response) == 0)
1515                 ret = connector_status_disconnected;
1516         else if (response & SDVO_TMDS_MASK)
1517                 ret = intel_sdvo_hdmi_sink_detect(connector);
1518         else
1519                 ret = connector_status_connected;
1520
1521         /* May update encoder flag for like clock for SDVO TV, etc.*/
1522         if (ret == connector_status_connected) {
1523                 intel_sdvo->is_tv = false;
1524                 intel_sdvo->is_lvds = false;
1525                 intel_sdvo->base.needs_tv_clock = false;
1526
1527                 if (response & SDVO_TV_MASK) {
1528                         intel_sdvo->is_tv = true;
1529                         intel_sdvo->base.needs_tv_clock = true;
1530                 }
1531                 if (response & SDVO_LVDS_MASK)
1532                         intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1533         }
1534
1535         return ret;
1536 }
1537
1538 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1539 {
1540         struct edid *edid;
1541
1542         /* set the bus switch and get the modes */
1543         edid = intel_sdvo_get_edid(connector);
1544
1545         /*
1546          * Mac mini hack.  On this device, the DVI-I connector shares one DDC
1547          * link between analog and digital outputs. So, if the regular SDVO
1548          * DDC fails, check to see if the analog output is disconnected, in
1549          * which case we'll look there for the digital DDC data.
1550          */
1551         if (edid == NULL)
1552                 edid = intel_sdvo_get_analog_edid(connector);
1553
1554         if (edid != NULL) {
1555                 drm_mode_connector_update_edid_property(connector, edid);
1556                 drm_add_edid_modes(connector, edid);
1557                 connector->display_info.raw_edid = NULL;
1558                 kfree(edid);
1559         }
1560 }
1561
1562 /*
1563  * Set of SDVO TV modes.
1564  * Note!  This is in reply order (see loop in get_tv_modes).
1565  * XXX: all 60Hz refresh?
1566  */
1567 struct drm_display_mode sdvo_tv_modes[] = {
1568         { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1569                    416, 0, 200, 201, 232, 233, 0,
1570                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1571         { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1572                    416, 0, 240, 241, 272, 273, 0,
1573                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1574         { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1575                    496, 0, 300, 301, 332, 333, 0,
1576                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1577         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1578                    736, 0, 350, 351, 382, 383, 0,
1579                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1580         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1581                    736, 0, 400, 401, 432, 433, 0,
1582                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1583         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1584                    736, 0, 480, 481, 512, 513, 0,
1585                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1586         { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1587                    800, 0, 480, 481, 512, 513, 0,
1588                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1589         { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1590                    800, 0, 576, 577, 608, 609, 0,
1591                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1592         { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1593                    816, 0, 350, 351, 382, 383, 0,
1594                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1595         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1596                    816, 0, 400, 401, 432, 433, 0,
1597                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1598         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1599                    816, 0, 480, 481, 512, 513, 0,
1600                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1601         { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1602                    816, 0, 540, 541, 572, 573, 0,
1603                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1604         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1605                    816, 0, 576, 577, 608, 609, 0,
1606                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1607         { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1608                    864, 0, 576, 577, 608, 609, 0,
1609                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1610         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1611                    896, 0, 600, 601, 632, 633, 0,
1612                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1613         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1614                    928, 0, 624, 625, 656, 657, 0,
1615                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1616         { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1617                    1016, 0, 766, 767, 798, 799, 0,
1618                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1619         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1620                    1120, 0, 768, 769, 800, 801, 0,
1621                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1622         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1623                    1376, 0, 1024, 1025, 1056, 1057, 0,
1624                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1625 };
1626
1627 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1628 {
1629         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1630         struct intel_sdvo_sdtv_resolution_request tv_res;
1631         uint32_t reply = 0, format_map = 0;
1632         int i;
1633
1634         /* Read the list of supported input resolutions for the selected TV
1635          * format.
1636          */
1637         format_map = 1 << intel_sdvo->tv_format_index;
1638         memcpy(&tv_res, &format_map,
1639                min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1640
1641         if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1642                 return;
1643
1644         BUILD_BUG_ON(sizeof(tv_res) != 3);
1645         if (!intel_sdvo_write_cmd(intel_sdvo,
1646                                   SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1647                                   &tv_res, sizeof(tv_res)))
1648                 return;
1649         if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1650                 return;
1651
1652         for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1653                 if (reply & (1 << i)) {
1654                         struct drm_display_mode *nmode;
1655                         nmode = drm_mode_duplicate(connector->dev,
1656                                                    &sdvo_tv_modes[i]);
1657                         if (nmode)
1658                                 drm_mode_probed_add(connector, nmode);
1659                 }
1660 }
1661
1662 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1663 {
1664         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1665         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1666         struct drm_display_mode *newmode;
1667
1668         /*
1669          * Attempt to get the mode list from DDC.
1670          * Assume that the preferred modes are
1671          * arranged in priority order.
1672          */
1673         intel_ddc_get_modes(connector, intel_sdvo->i2c);
1674         if (list_empty(&connector->probed_modes) == false)
1675                 goto end;
1676
1677         /* Fetch modes from VBT */
1678         if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1679                 newmode = drm_mode_duplicate(connector->dev,
1680                                              dev_priv->sdvo_lvds_vbt_mode);
1681                 if (newmode != NULL) {
1682                         /* Guarantee the mode is preferred */
1683                         newmode->type = (DRM_MODE_TYPE_PREFERRED |
1684                                          DRM_MODE_TYPE_DRIVER);
1685                         drm_mode_probed_add(connector, newmode);
1686                 }
1687         }
1688
1689 end:
1690         list_for_each_entry(newmode, &connector->probed_modes, head) {
1691                 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1692                         intel_sdvo->sdvo_lvds_fixed_mode =
1693                                 drm_mode_duplicate(connector->dev, newmode);
1694
1695                         drm_mode_set_crtcinfo(intel_sdvo->sdvo_lvds_fixed_mode,
1696                                               0);
1697
1698                         intel_sdvo->is_lvds = true;
1699                         break;
1700                 }
1701         }
1702
1703 }
1704
1705 static int intel_sdvo_get_modes(struct drm_connector *connector)
1706 {
1707         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1708
1709         if (IS_TV(intel_sdvo_connector))
1710                 intel_sdvo_get_tv_modes(connector);
1711         else if (IS_LVDS(intel_sdvo_connector))
1712                 intel_sdvo_get_lvds_modes(connector);
1713         else
1714                 intel_sdvo_get_ddc_modes(connector);
1715
1716         return !list_empty(&connector->probed_modes);
1717 }
1718
1719 static void
1720 intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1721 {
1722         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1723         struct drm_device *dev = connector->dev;
1724
1725         if (intel_sdvo_connector->left)
1726                 drm_property_destroy(dev, intel_sdvo_connector->left);
1727         if (intel_sdvo_connector->right)
1728                 drm_property_destroy(dev, intel_sdvo_connector->right);
1729         if (intel_sdvo_connector->top)
1730                 drm_property_destroy(dev, intel_sdvo_connector->top);
1731         if (intel_sdvo_connector->bottom)
1732                 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1733         if (intel_sdvo_connector->hpos)
1734                 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1735         if (intel_sdvo_connector->vpos)
1736                 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1737         if (intel_sdvo_connector->saturation)
1738                 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1739         if (intel_sdvo_connector->contrast)
1740                 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1741         if (intel_sdvo_connector->hue)
1742                 drm_property_destroy(dev, intel_sdvo_connector->hue);
1743         if (intel_sdvo_connector->sharpness)
1744                 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1745         if (intel_sdvo_connector->flicker_filter)
1746                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1747         if (intel_sdvo_connector->flicker_filter_2d)
1748                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1749         if (intel_sdvo_connector->flicker_filter_adaptive)
1750                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1751         if (intel_sdvo_connector->tv_luma_filter)
1752                 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1753         if (intel_sdvo_connector->tv_chroma_filter)
1754                 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
1755         if (intel_sdvo_connector->dot_crawl)
1756                 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
1757         if (intel_sdvo_connector->brightness)
1758                 drm_property_destroy(dev, intel_sdvo_connector->brightness);
1759 }
1760
1761 static void intel_sdvo_destroy(struct drm_connector *connector)
1762 {
1763         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1764
1765         if (intel_sdvo_connector->tv_format)
1766                 drm_property_destroy(connector->dev,
1767                                      intel_sdvo_connector->tv_format);
1768
1769         intel_sdvo_destroy_enhance_property(connector);
1770         drm_sysfs_connector_remove(connector);
1771         drm_connector_cleanup(connector);
1772         kfree(connector);
1773 }
1774
1775 static int
1776 intel_sdvo_set_property(struct drm_connector *connector,
1777                         struct drm_property *property,
1778                         uint64_t val)
1779 {
1780         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1781         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1782         uint16_t temp_value;
1783         uint8_t cmd;
1784         int ret;
1785
1786         ret = drm_connector_property_set_value(connector, property, val);
1787         if (ret)
1788                 return ret;
1789
1790 #define CHECK_PROPERTY(name, NAME) \
1791         if (intel_sdvo_connector->name == property) { \
1792                 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1793                 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1794                 cmd = SDVO_CMD_SET_##NAME; \
1795                 intel_sdvo_connector->cur_##name = temp_value; \
1796                 goto set_value; \
1797         }
1798
1799         if (property == intel_sdvo_connector->tv_format) {
1800                 if (val >= TV_FORMAT_NUM)
1801                         return -EINVAL;
1802
1803                 if (intel_sdvo->tv_format_index ==
1804                     intel_sdvo_connector->tv_format_supported[val])
1805                         return 0;
1806
1807                 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
1808                 goto done;
1809         } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
1810                 temp_value = val;
1811                 if (intel_sdvo_connector->left == property) {
1812                         drm_connector_property_set_value(connector,
1813                                                          intel_sdvo_connector->right, val);
1814                         if (intel_sdvo_connector->left_margin == temp_value)
1815                                 return 0;
1816
1817                         intel_sdvo_connector->left_margin = temp_value;
1818                         intel_sdvo_connector->right_margin = temp_value;
1819                         temp_value = intel_sdvo_connector->max_hscan -
1820                                 intel_sdvo_connector->left_margin;
1821                         cmd = SDVO_CMD_SET_OVERSCAN_H;
1822                         goto set_value;
1823                 } else if (intel_sdvo_connector->right == property) {
1824                         drm_connector_property_set_value(connector,
1825                                                          intel_sdvo_connector->left, val);
1826                         if (intel_sdvo_connector->right_margin == temp_value)
1827                                 return 0;
1828
1829                         intel_sdvo_connector->left_margin = temp_value;
1830                         intel_sdvo_connector->right_margin = temp_value;
1831                         temp_value = intel_sdvo_connector->max_hscan -
1832                                 intel_sdvo_connector->left_margin;
1833                         cmd = SDVO_CMD_SET_OVERSCAN_H;
1834                         goto set_value;
1835                 } else if (intel_sdvo_connector->top == property) {
1836                         drm_connector_property_set_value(connector,
1837                                                          intel_sdvo_connector->bottom, val);
1838                         if (intel_sdvo_connector->top_margin == temp_value)
1839                                 return 0;
1840
1841                         intel_sdvo_connector->top_margin = temp_value;
1842                         intel_sdvo_connector->bottom_margin = temp_value;
1843                         temp_value = intel_sdvo_connector->max_vscan -
1844                                 intel_sdvo_connector->top_margin;
1845                         cmd = SDVO_CMD_SET_OVERSCAN_V;
1846                         goto set_value;
1847                 } else if (intel_sdvo_connector->bottom == property) {
1848                         drm_connector_property_set_value(connector,
1849                                                          intel_sdvo_connector->top, val);
1850                         if (intel_sdvo_connector->bottom_margin == temp_value)
1851                                 return 0;
1852
1853                         intel_sdvo_connector->top_margin = temp_value;
1854                         intel_sdvo_connector->bottom_margin = temp_value;
1855                         temp_value = intel_sdvo_connector->max_vscan -
1856                                 intel_sdvo_connector->top_margin;
1857                         cmd = SDVO_CMD_SET_OVERSCAN_V;
1858                         goto set_value;
1859                 }
1860                 CHECK_PROPERTY(hpos, HPOS)
1861                 CHECK_PROPERTY(vpos, VPOS)
1862                 CHECK_PROPERTY(saturation, SATURATION)
1863                 CHECK_PROPERTY(contrast, CONTRAST)
1864                 CHECK_PROPERTY(hue, HUE)
1865                 CHECK_PROPERTY(brightness, BRIGHTNESS)
1866                 CHECK_PROPERTY(sharpness, SHARPNESS)
1867                 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1868                 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1869                 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1870                 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1871                 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
1872                 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
1873         }
1874
1875         return -EINVAL; /* unknown property */
1876
1877 set_value:
1878         if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1879                 return -EIO;
1880
1881
1882 done:
1883         if (intel_sdvo->base.base.crtc) {
1884                 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
1885                 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
1886                                          crtc->y, crtc->fb);
1887         }
1888
1889         return 0;
1890 #undef CHECK_PROPERTY
1891 }
1892
1893 static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1894         .dpms = intel_sdvo_dpms,
1895         .mode_fixup = intel_sdvo_mode_fixup,
1896         .prepare = intel_encoder_prepare,
1897         .mode_set = intel_sdvo_mode_set,
1898         .commit = intel_encoder_commit,
1899 };
1900
1901 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
1902         .dpms = drm_helper_connector_dpms,
1903         .detect = intel_sdvo_detect,
1904         .fill_modes = drm_helper_probe_single_connector_modes,
1905         .set_property = intel_sdvo_set_property,
1906         .destroy = intel_sdvo_destroy,
1907 };
1908
1909 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1910         .get_modes = intel_sdvo_get_modes,
1911         .mode_valid = intel_sdvo_mode_valid,
1912         .best_encoder = intel_best_encoder,
1913 };
1914
1915 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
1916 {
1917         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1918
1919         if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
1920                 drm_mode_destroy(encoder->dev,
1921                                  intel_sdvo->sdvo_lvds_fixed_mode);
1922
1923         i2c_del_adapter(&intel_sdvo->ddc);
1924         intel_encoder_destroy(encoder);
1925 }
1926
1927 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1928         .destroy = intel_sdvo_enc_destroy,
1929 };
1930
1931 static void
1932 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1933 {
1934         uint16_t mask = 0;
1935         unsigned int num_bits;
1936
1937         /* Make a mask of outputs less than or equal to our own priority in the
1938          * list.
1939          */
1940         switch (sdvo->controlled_output) {
1941         case SDVO_OUTPUT_LVDS1:
1942                 mask |= SDVO_OUTPUT_LVDS1;
1943         case SDVO_OUTPUT_LVDS0:
1944                 mask |= SDVO_OUTPUT_LVDS0;
1945         case SDVO_OUTPUT_TMDS1:
1946                 mask |= SDVO_OUTPUT_TMDS1;
1947         case SDVO_OUTPUT_TMDS0:
1948                 mask |= SDVO_OUTPUT_TMDS0;
1949         case SDVO_OUTPUT_RGB1:
1950                 mask |= SDVO_OUTPUT_RGB1;
1951         case SDVO_OUTPUT_RGB0:
1952                 mask |= SDVO_OUTPUT_RGB0;
1953                 break;
1954         }
1955
1956         /* Count bits to find what number we are in the priority list. */
1957         mask &= sdvo->caps.output_flags;
1958         num_bits = hweight16(mask);
1959         /* If more than 3 outputs, default to DDC bus 3 for now. */
1960         if (num_bits > 3)
1961                 num_bits = 3;
1962
1963         /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1964         sdvo->ddc_bus = 1 << num_bits;
1965 }
1966
1967 /**
1968  * Choose the appropriate DDC bus for control bus switch command for this
1969  * SDVO output based on the controlled output.
1970  *
1971  * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1972  * outputs, then LVDS outputs.
1973  */
1974 static void
1975 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
1976                           struct intel_sdvo *sdvo, u32 reg)
1977 {
1978         struct sdvo_device_mapping *mapping;
1979
1980         if (IS_SDVOB(reg))
1981                 mapping = &(dev_priv->sdvo_mappings[0]);
1982         else
1983                 mapping = &(dev_priv->sdvo_mappings[1]);
1984
1985         if (mapping->initialized)
1986                 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1987         else
1988                 intel_sdvo_guess_ddc_bus(sdvo);
1989 }
1990
1991 static void
1992 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
1993                           struct intel_sdvo *sdvo, u32 reg)
1994 {
1995         struct sdvo_device_mapping *mapping;
1996         u8 pin, speed;
1997
1998         if (IS_SDVOB(reg))
1999                 mapping = &dev_priv->sdvo_mappings[0];
2000         else
2001                 mapping = &dev_priv->sdvo_mappings[1];
2002
2003         pin = GMBUS_PORT_DPB;
2004         speed = GMBUS_RATE_1MHZ >> 8;
2005         if (mapping->initialized) {
2006                 pin = mapping->i2c_pin;
2007                 speed = mapping->i2c_speed;
2008         }
2009
2010         sdvo->i2c = &dev_priv->gmbus[pin].adapter;
2011         intel_gmbus_set_speed(sdvo->i2c, speed);
2012         intel_gmbus_force_bit(sdvo->i2c, true);
2013 }
2014
2015 static bool
2016 intel_sdvo_get_digital_encoding_mode(struct intel_sdvo *intel_sdvo, int device)
2017 {
2018         return intel_sdvo_set_target_output(intel_sdvo,
2019                                             device == 0 ? SDVO_OUTPUT_TMDS0 : SDVO_OUTPUT_TMDS1) &&
2020                 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE,
2021                                      &intel_sdvo->is_hdmi, 1);
2022 }
2023
2024 static u8
2025 intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg)
2026 {
2027         struct drm_i915_private *dev_priv = dev->dev_private;
2028         struct sdvo_device_mapping *my_mapping, *other_mapping;
2029
2030         if (IS_SDVOB(sdvo_reg)) {
2031                 my_mapping = &dev_priv->sdvo_mappings[0];
2032                 other_mapping = &dev_priv->sdvo_mappings[1];
2033         } else {
2034                 my_mapping = &dev_priv->sdvo_mappings[1];
2035                 other_mapping = &dev_priv->sdvo_mappings[0];
2036         }
2037
2038         /* If the BIOS described our SDVO device, take advantage of it. */
2039         if (my_mapping->slave_addr)
2040                 return my_mapping->slave_addr;
2041
2042         /* If the BIOS only described a different SDVO device, use the
2043          * address that it isn't using.
2044          */
2045         if (other_mapping->slave_addr) {
2046                 if (other_mapping->slave_addr == 0x70)
2047                         return 0x72;
2048                 else
2049                         return 0x70;
2050         }
2051
2052         /* No SDVO device info is found for another DVO port,
2053          * so use mapping assumption we had before BIOS parsing.
2054          */
2055         if (IS_SDVOB(sdvo_reg))
2056                 return 0x70;
2057         else
2058                 return 0x72;
2059 }
2060
2061 static void
2062 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2063                           struct intel_sdvo *encoder)
2064 {
2065         drm_connector_init(encoder->base.base.dev,
2066                            &connector->base.base,
2067                            &intel_sdvo_connector_funcs,
2068                            connector->base.base.connector_type);
2069
2070         drm_connector_helper_add(&connector->base.base,
2071                                  &intel_sdvo_connector_helper_funcs);
2072
2073         connector->base.base.interlace_allowed = 0;
2074         connector->base.base.doublescan_allowed = 0;
2075         connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2076
2077         intel_connector_attach_encoder(&connector->base, &encoder->base);
2078         drm_sysfs_connector_add(&connector->base.base);
2079 }
2080
2081 static bool
2082 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2083 {
2084         struct drm_encoder *encoder = &intel_sdvo->base.base;
2085         struct drm_connector *connector;
2086         struct intel_connector *intel_connector;
2087         struct intel_sdvo_connector *intel_sdvo_connector;
2088
2089         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2090         if (!intel_sdvo_connector)
2091                 return false;
2092
2093         if (device == 0) {
2094                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2095                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2096         } else if (device == 1) {
2097                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2098                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2099         }
2100
2101         intel_connector = &intel_sdvo_connector->base;
2102         connector = &intel_connector->base;
2103         connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2104         encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2105         connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2106
2107         if (intel_sdvo_get_supp_encode(intel_sdvo, &intel_sdvo->encode)
2108                 && intel_sdvo_get_digital_encoding_mode(intel_sdvo, device)
2109                 && intel_sdvo->is_hdmi) {
2110                 /* enable hdmi encoding mode if supported */
2111                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
2112                 intel_sdvo_set_colorimetry(intel_sdvo,
2113                                            SDVO_COLORIMETRY_RGB256);
2114                 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2115         }
2116         intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2117                                        (1 << INTEL_ANALOG_CLONE_BIT));
2118
2119         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2120
2121         return true;
2122 }
2123
2124 static bool
2125 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2126 {
2127         struct drm_encoder *encoder = &intel_sdvo->base.base;
2128         struct drm_connector *connector;
2129         struct intel_connector *intel_connector;
2130         struct intel_sdvo_connector *intel_sdvo_connector;
2131
2132         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2133         if (!intel_sdvo_connector)
2134                 return false;
2135
2136         intel_connector = &intel_sdvo_connector->base;
2137         connector = &intel_connector->base;
2138         encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2139         connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2140
2141         intel_sdvo->controlled_output |= type;
2142         intel_sdvo_connector->output_flag = type;
2143
2144         intel_sdvo->is_tv = true;
2145         intel_sdvo->base.needs_tv_clock = true;
2146         intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
2147
2148         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2149
2150         if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2151                 goto err;
2152
2153         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2154                 goto err;
2155
2156         return true;
2157
2158 err:
2159         intel_sdvo_destroy(connector);
2160         return false;
2161 }
2162
2163 static bool
2164 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2165 {
2166         struct drm_encoder *encoder = &intel_sdvo->base.base;
2167         struct drm_connector *connector;
2168         struct intel_connector *intel_connector;
2169         struct intel_sdvo_connector *intel_sdvo_connector;
2170
2171         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2172         if (!intel_sdvo_connector)
2173                 return false;
2174
2175         intel_connector = &intel_sdvo_connector->base;
2176         connector = &intel_connector->base;
2177         connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2178         encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2179         connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2180
2181         if (device == 0) {
2182                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2183                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2184         } else if (device == 1) {
2185                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2186                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2187         }
2188
2189         intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2190                                        (1 << INTEL_ANALOG_CLONE_BIT));
2191
2192         intel_sdvo_connector_init(intel_sdvo_connector,
2193                                   intel_sdvo);
2194         return true;
2195 }
2196
2197 static bool
2198 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2199 {
2200         struct drm_encoder *encoder = &intel_sdvo->base.base;
2201         struct drm_connector *connector;
2202         struct intel_connector *intel_connector;
2203         struct intel_sdvo_connector *intel_sdvo_connector;
2204
2205         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2206         if (!intel_sdvo_connector)
2207                 return false;
2208
2209         intel_connector = &intel_sdvo_connector->base;
2210         connector = &intel_connector->base;
2211         encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2212         connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2213
2214         if (device == 0) {
2215                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2216                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2217         } else if (device == 1) {
2218                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2219                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2220         }
2221
2222         intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
2223                                        (1 << INTEL_SDVO_LVDS_CLONE_BIT));
2224
2225         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2226         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2227                 goto err;
2228
2229         return true;
2230
2231 err:
2232         intel_sdvo_destroy(connector);
2233         return false;
2234 }
2235
2236 static bool
2237 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2238 {
2239         intel_sdvo->is_tv = false;
2240         intel_sdvo->base.needs_tv_clock = false;
2241         intel_sdvo->is_lvds = false;
2242
2243         /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2244
2245         if (flags & SDVO_OUTPUT_TMDS0)
2246                 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2247                         return false;
2248
2249         if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2250                 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2251                         return false;
2252
2253         /* TV has no XXX1 function block */
2254         if (flags & SDVO_OUTPUT_SVID0)
2255                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2256                         return false;
2257
2258         if (flags & SDVO_OUTPUT_CVBS0)
2259                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2260                         return false;
2261
2262         if (flags & SDVO_OUTPUT_RGB0)
2263                 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2264                         return false;
2265
2266         if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2267                 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2268                         return false;
2269
2270         if (flags & SDVO_OUTPUT_LVDS0)
2271                 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2272                         return false;
2273
2274         if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2275                 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2276                         return false;
2277
2278         if ((flags & SDVO_OUTPUT_MASK) == 0) {
2279                 unsigned char bytes[2];
2280
2281                 intel_sdvo->controlled_output = 0;
2282                 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2283                 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2284                               SDVO_NAME(intel_sdvo),
2285                               bytes[0], bytes[1]);
2286                 return false;
2287         }
2288         intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1);
2289
2290         return true;
2291 }
2292
2293 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2294                                           struct intel_sdvo_connector *intel_sdvo_connector,
2295                                           int type)
2296 {
2297         struct drm_device *dev = intel_sdvo->base.base.dev;
2298         struct intel_sdvo_tv_format format;
2299         uint32_t format_map, i;
2300
2301         if (!intel_sdvo_set_target_output(intel_sdvo, type))
2302                 return false;
2303
2304         if (!intel_sdvo_get_value(intel_sdvo,
2305                                   SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2306                                   &format, sizeof(format)))
2307                 return false;
2308
2309         memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2310
2311         if (format_map == 0)
2312                 return false;
2313
2314         intel_sdvo_connector->format_supported_num = 0;
2315         for (i = 0 ; i < TV_FORMAT_NUM; i++)
2316                 if (format_map & (1 << i))
2317                         intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2318
2319
2320         intel_sdvo_connector->tv_format =
2321                         drm_property_create(dev, DRM_MODE_PROP_ENUM,
2322                                             "mode", intel_sdvo_connector->format_supported_num);
2323         if (!intel_sdvo_connector->tv_format)
2324                 return false;
2325
2326         for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2327                 drm_property_add_enum(
2328                                 intel_sdvo_connector->tv_format, i,
2329                                 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2330
2331         intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2332         drm_connector_attach_property(&intel_sdvo_connector->base.base,
2333                                       intel_sdvo_connector->tv_format, 0);
2334         return true;
2335
2336 }
2337
2338 #define ENHANCEMENT(name, NAME) do { \
2339         if (enhancements.name) { \
2340                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2341                     !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2342                         return false; \
2343                 intel_sdvo_connector->max_##name = data_value[0]; \
2344                 intel_sdvo_connector->cur_##name = response; \
2345                 intel_sdvo_connector->name = \
2346                         drm_property_create(dev, DRM_MODE_PROP_RANGE, #name, 2); \
2347                 if (!intel_sdvo_connector->name) return false; \
2348                 intel_sdvo_connector->name->values[0] = 0; \
2349                 intel_sdvo_connector->name->values[1] = data_value[0]; \
2350                 drm_connector_attach_property(connector, \
2351                                               intel_sdvo_connector->name, \
2352                                               intel_sdvo_connector->cur_##name); \
2353                 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2354                               data_value[0], data_value[1], response); \
2355         } \
2356 } while(0)
2357
2358 static bool
2359 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2360                                       struct intel_sdvo_connector *intel_sdvo_connector,
2361                                       struct intel_sdvo_enhancements_reply enhancements)
2362 {
2363         struct drm_device *dev = intel_sdvo->base.base.dev;
2364         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2365         uint16_t response, data_value[2];
2366
2367         /* when horizontal overscan is supported, Add the left/right  property */
2368         if (enhancements.overscan_h) {
2369                 if (!intel_sdvo_get_value(intel_sdvo,
2370                                           SDVO_CMD_GET_MAX_OVERSCAN_H,
2371                                           &data_value, 4))
2372                         return false;
2373
2374                 if (!intel_sdvo_get_value(intel_sdvo,
2375                                           SDVO_CMD_GET_OVERSCAN_H,
2376                                           &response, 2))
2377                         return false;
2378
2379                 intel_sdvo_connector->max_hscan = data_value[0];
2380                 intel_sdvo_connector->left_margin = data_value[0] - response;
2381                 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2382                 intel_sdvo_connector->left =
2383                         drm_property_create(dev, DRM_MODE_PROP_RANGE,
2384                                             "left_margin", 2);
2385                 if (!intel_sdvo_connector->left)
2386                         return false;
2387
2388                 intel_sdvo_connector->left->values[0] = 0;
2389                 intel_sdvo_connector->left->values[1] = data_value[0];
2390                 drm_connector_attach_property(connector,
2391                                               intel_sdvo_connector->left,
2392                                               intel_sdvo_connector->left_margin);
2393
2394                 intel_sdvo_connector->right =
2395                         drm_property_create(dev, DRM_MODE_PROP_RANGE,
2396                                             "right_margin", 2);
2397                 if (!intel_sdvo_connector->right)
2398                         return false;
2399
2400                 intel_sdvo_connector->right->values[0] = 0;
2401                 intel_sdvo_connector->right->values[1] = data_value[0];
2402                 drm_connector_attach_property(connector,
2403                                               intel_sdvo_connector->right,
2404                                               intel_sdvo_connector->right_margin);
2405                 DRM_DEBUG_KMS("h_overscan: max %d, "
2406                               "default %d, current %d\n",
2407                               data_value[0], data_value[1], response);
2408         }
2409
2410         if (enhancements.overscan_v) {
2411                 if (!intel_sdvo_get_value(intel_sdvo,
2412                                           SDVO_CMD_GET_MAX_OVERSCAN_V,
2413                                           &data_value, 4))
2414                         return false;
2415
2416                 if (!intel_sdvo_get_value(intel_sdvo,
2417                                           SDVO_CMD_GET_OVERSCAN_V,
2418                                           &response, 2))
2419                         return false;
2420
2421                 intel_sdvo_connector->max_vscan = data_value[0];
2422                 intel_sdvo_connector->top_margin = data_value[0] - response;
2423                 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2424                 intel_sdvo_connector->top =
2425                         drm_property_create(dev, DRM_MODE_PROP_RANGE,
2426                                             "top_margin", 2);
2427                 if (!intel_sdvo_connector->top)
2428                         return false;
2429
2430                 intel_sdvo_connector->top->values[0] = 0;
2431                 intel_sdvo_connector->top->values[1] = data_value[0];
2432                 drm_connector_attach_property(connector,
2433                                               intel_sdvo_connector->top,
2434                                               intel_sdvo_connector->top_margin);
2435
2436                 intel_sdvo_connector->bottom =
2437                         drm_property_create(dev, DRM_MODE_PROP_RANGE,
2438                                             "bottom_margin", 2);
2439                 if (!intel_sdvo_connector->bottom)
2440                         return false;
2441
2442                 intel_sdvo_connector->bottom->values[0] = 0;
2443                 intel_sdvo_connector->bottom->values[1] = data_value[0];
2444                 drm_connector_attach_property(connector,
2445                                               intel_sdvo_connector->bottom,
2446                                               intel_sdvo_connector->bottom_margin);
2447                 DRM_DEBUG_KMS("v_overscan: max %d, "
2448                               "default %d, current %d\n",
2449                               data_value[0], data_value[1], response);
2450         }
2451
2452         ENHANCEMENT(hpos, HPOS);
2453         ENHANCEMENT(vpos, VPOS);
2454         ENHANCEMENT(saturation, SATURATION);
2455         ENHANCEMENT(contrast, CONTRAST);
2456         ENHANCEMENT(hue, HUE);
2457         ENHANCEMENT(sharpness, SHARPNESS);
2458         ENHANCEMENT(brightness, BRIGHTNESS);
2459         ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2460         ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2461         ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2462         ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2463         ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2464
2465         if (enhancements.dot_crawl) {
2466                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2467                         return false;
2468
2469                 intel_sdvo_connector->max_dot_crawl = 1;
2470                 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2471                 intel_sdvo_connector->dot_crawl =
2472                         drm_property_create(dev, DRM_MODE_PROP_RANGE, "dot_crawl", 2);
2473                 if (!intel_sdvo_connector->dot_crawl)
2474                         return false;
2475
2476                 intel_sdvo_connector->dot_crawl->values[0] = 0;
2477                 intel_sdvo_connector->dot_crawl->values[1] = 1;
2478                 drm_connector_attach_property(connector,
2479                                               intel_sdvo_connector->dot_crawl,
2480                                               intel_sdvo_connector->cur_dot_crawl);
2481                 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2482         }
2483
2484         return true;
2485 }
2486
2487 static bool
2488 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2489                                         struct intel_sdvo_connector *intel_sdvo_connector,
2490                                         struct intel_sdvo_enhancements_reply enhancements)
2491 {
2492         struct drm_device *dev = intel_sdvo->base.base.dev;
2493         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2494         uint16_t response, data_value[2];
2495
2496         ENHANCEMENT(brightness, BRIGHTNESS);
2497
2498         return true;
2499 }
2500 #undef ENHANCEMENT
2501
2502 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2503                                                struct intel_sdvo_connector *intel_sdvo_connector)
2504 {
2505         union {
2506                 struct intel_sdvo_enhancements_reply reply;
2507                 uint16_t response;
2508         } enhancements;
2509
2510         enhancements.response = 0;
2511         intel_sdvo_get_value(intel_sdvo,
2512                              SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2513                              &enhancements, sizeof(enhancements));
2514         if (enhancements.response == 0) {
2515                 DRM_DEBUG_KMS("No enhancement is supported\n");
2516                 return true;
2517         }
2518
2519         if (IS_TV(intel_sdvo_connector))
2520                 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2521         else if(IS_LVDS(intel_sdvo_connector))
2522                 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2523         else
2524                 return true;
2525 }
2526
2527 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2528                                      struct i2c_msg *msgs,
2529                                      int num)
2530 {
2531         struct intel_sdvo *sdvo = adapter->algo_data;
2532
2533         if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2534                 return -EIO;
2535
2536         return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2537 }
2538
2539 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2540 {
2541         struct intel_sdvo *sdvo = adapter->algo_data;
2542         return sdvo->i2c->algo->functionality(sdvo->i2c);
2543 }
2544
2545 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2546         .master_xfer    = intel_sdvo_ddc_proxy_xfer,
2547         .functionality  = intel_sdvo_ddc_proxy_func
2548 };
2549
2550 static bool
2551 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2552                           struct drm_device *dev)
2553 {
2554         sdvo->ddc.owner = THIS_MODULE;
2555         sdvo->ddc.class = I2C_CLASS_DDC;
2556         snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2557         sdvo->ddc.dev.parent = &dev->pdev->dev;
2558         sdvo->ddc.algo_data = sdvo;
2559         sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2560
2561         return i2c_add_adapter(&sdvo->ddc) == 0;
2562 }
2563
2564 bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
2565 {
2566         struct drm_i915_private *dev_priv = dev->dev_private;
2567         struct intel_encoder *intel_encoder;
2568         struct intel_sdvo *intel_sdvo;
2569         int i;
2570
2571         intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2572         if (!intel_sdvo)
2573                 return false;
2574
2575         if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
2576                 kfree(intel_sdvo);
2577                 return false;
2578         }
2579
2580         intel_sdvo->sdvo_reg = sdvo_reg;
2581
2582         intel_encoder = &intel_sdvo->base;
2583         intel_encoder->type = INTEL_OUTPUT_SDVO;
2584         /* encoder type will be decided later */
2585         drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2586
2587         intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg) >> 1;
2588         intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
2589
2590         /* Read the regs to test if we can talk to the device */
2591         for (i = 0; i < 0x40; i++) {
2592                 u8 byte;
2593
2594                 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2595                         DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
2596                                       IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2597                         goto err;
2598                 }
2599         }
2600
2601         if (IS_SDVOB(sdvo_reg))
2602                 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
2603         else
2604                 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
2605
2606         drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
2607
2608         /* In default case sdvo lvds is false */
2609         if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2610                 goto err;
2611
2612         if (intel_sdvo_output_setup(intel_sdvo,
2613                                     intel_sdvo->caps.output_flags) != true) {
2614                 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
2615                               IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2616                 goto err;
2617         }
2618
2619         intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2620
2621         /* Set the input timing to the screen. Assume always input 0. */
2622         if (!intel_sdvo_set_target_input(intel_sdvo))
2623                 goto err;
2624
2625         if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2626                                                     &intel_sdvo->pixel_clock_min,
2627                                                     &intel_sdvo->pixel_clock_max))
2628                 goto err;
2629
2630         DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2631                         "clock range %dMHz - %dMHz, "
2632                         "input 1: %c, input 2: %c, "
2633                         "output 1: %c, output 2: %c\n",
2634                         SDVO_NAME(intel_sdvo),
2635                         intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2636                         intel_sdvo->caps.device_rev_id,
2637                         intel_sdvo->pixel_clock_min / 1000,
2638                         intel_sdvo->pixel_clock_max / 1000,
2639                         (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2640                         (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2641                         /* check currently supported outputs */
2642                         intel_sdvo->caps.output_flags &
2643                         (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2644                         intel_sdvo->caps.output_flags &
2645                         (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2646         return true;
2647
2648 err:
2649         drm_encoder_cleanup(&intel_encoder->base);
2650         i2c_del_adapter(&intel_sdvo->ddc);
2651         kfree(intel_sdvo);
2652
2653         return false;
2654 }