2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
26 * Eric Anholt <eric@anholt.net>
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
35 #include "intel_drv.h"
38 #include "intel_sdvo_regs.h"
40 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
41 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
42 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
43 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0)
45 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
48 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
49 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
50 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
53 static const char *tv_format_names[] = {
54 "NTSC_M" , "NTSC_J" , "NTSC_443",
55 "PAL_B" , "PAL_D" , "PAL_G" ,
56 "PAL_H" , "PAL_I" , "PAL_M" ,
57 "PAL_N" , "PAL_NC" , "PAL_60" ,
58 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
59 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
63 #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
66 struct intel_encoder base;
68 struct i2c_adapter *i2c;
71 struct i2c_adapter ddc;
73 /* Register for the SDVO device: SDVOB or SDVOC */
76 /* Active outputs controlled by this SDVO output */
77 uint16_t controlled_output;
80 * Capabilities of the SDVO device returned by
81 * i830_sdvo_get_capabilities()
83 struct intel_sdvo_caps caps;
85 /* Pixel clock limitations reported by the SDVO device, in kHz */
86 int pixel_clock_min, pixel_clock_max;
89 * For multiple function SDVO device,
90 * this is for current attached outputs.
92 uint16_t attached_output;
95 * This is set if we're going to treat the device as TV-out.
97 * While we have these nice friendly flags for output types that ought
98 * to decide this for us, the S-Video output on our HDMI+S-Video card
99 * shows up as RGB1 (VGA).
103 /* This is for current tv format name */
107 * This is set if we treat the device as HDMI, instead of DVI.
113 * This is set if we detect output of sdvo device as LVDS and
114 * have a valid fixed mode to use with the panel.
119 * This is sdvo fixed pannel mode pointer
121 struct drm_display_mode *sdvo_lvds_fixed_mode;
123 /* DDC bus used by this SDVO encoder */
126 /* Input timings for adjusted_mode */
127 struct intel_sdvo_dtd input_dtd;
130 struct intel_sdvo_connector {
131 struct intel_connector base;
133 /* Mark the type of connector */
134 uint16_t output_flag;
138 /* This contains all current supported TV format */
139 u8 tv_format_supported[TV_FORMAT_NUM];
140 int format_supported_num;
141 struct drm_property *tv_format;
143 struct drm_property *force_audio_property;
145 /* add the property for the SDVO-TV */
146 struct drm_property *left;
147 struct drm_property *right;
148 struct drm_property *top;
149 struct drm_property *bottom;
150 struct drm_property *hpos;
151 struct drm_property *vpos;
152 struct drm_property *contrast;
153 struct drm_property *saturation;
154 struct drm_property *hue;
155 struct drm_property *sharpness;
156 struct drm_property *flicker_filter;
157 struct drm_property *flicker_filter_adaptive;
158 struct drm_property *flicker_filter_2d;
159 struct drm_property *tv_chroma_filter;
160 struct drm_property *tv_luma_filter;
161 struct drm_property *dot_crawl;
163 /* add the property for the SDVO-TV/LVDS */
164 struct drm_property *brightness;
166 /* Add variable to record current setting for the above property */
167 u32 left_margin, right_margin, top_margin, bottom_margin;
169 /* this is to get the range of margin.*/
170 u32 max_hscan, max_vscan;
171 u32 max_hpos, cur_hpos;
172 u32 max_vpos, cur_vpos;
173 u32 cur_brightness, max_brightness;
174 u32 cur_contrast, max_contrast;
175 u32 cur_saturation, max_saturation;
176 u32 cur_hue, max_hue;
177 u32 cur_sharpness, max_sharpness;
178 u32 cur_flicker_filter, max_flicker_filter;
179 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
180 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
181 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
182 u32 cur_tv_luma_filter, max_tv_luma_filter;
183 u32 cur_dot_crawl, max_dot_crawl;
186 static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
188 return container_of(encoder, struct intel_sdvo, base.base);
191 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
193 return container_of(intel_attached_encoder(connector),
194 struct intel_sdvo, base);
197 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
199 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
203 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
205 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
206 struct intel_sdvo_connector *intel_sdvo_connector,
209 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
210 struct intel_sdvo_connector *intel_sdvo_connector);
213 * Writes the SDVOB or SDVOC with the given value, but always writes both
214 * SDVOB and SDVOC to work around apparent hardware issues (according to
215 * comments in the BIOS).
217 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
219 struct drm_device *dev = intel_sdvo->base.base.dev;
220 struct drm_i915_private *dev_priv = dev->dev_private;
221 u32 bval = val, cval = val;
224 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
225 I915_WRITE(intel_sdvo->sdvo_reg, val);
226 I915_READ(intel_sdvo->sdvo_reg);
230 if (intel_sdvo->sdvo_reg == SDVOB) {
231 cval = I915_READ(SDVOC);
233 bval = I915_READ(SDVOB);
236 * Write the registers twice for luck. Sometimes,
237 * writing them only once doesn't appear to 'stick'.
238 * The BIOS does this too. Yay, magic
240 for (i = 0; i < 2; i++)
242 I915_WRITE(SDVOB, bval);
244 I915_WRITE(SDVOC, cval);
249 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
251 struct i2c_msg msgs[] = {
253 .addr = intel_sdvo->slave_addr,
259 .addr = intel_sdvo->slave_addr,
267 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
270 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
274 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
275 /** Mapping of command numbers to names, for debug output */
276 static const struct _sdvo_cmd_name {
279 } sdvo_cmd_names[] = {
280 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
281 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
282 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
283 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
284 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
285 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
286 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
287 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
288 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
289 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
290 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
291 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
292 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
293 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
294 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
295 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
324 /* Add the op code for SDVO enhancements */
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
393 #define IS_SDVOB(reg) (reg == SDVOB || reg == PCH_SDVOB)
394 #define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
396 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
397 const void *args, int args_len)
401 DRM_DEBUG_KMS("%s: W: %02X ",
402 SDVO_NAME(intel_sdvo), cmd);
403 for (i = 0; i < args_len; i++)
404 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
407 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
408 if (cmd == sdvo_cmd_names[i].cmd) {
409 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
413 if (i == ARRAY_SIZE(sdvo_cmd_names))
414 DRM_LOG_KMS("(%02X)", cmd);
418 static const char *cmd_status_names[] = {
424 "Target not specified",
425 "Scaling not supported"
428 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
429 const void *args, int args_len)
431 u8 buf[args_len*2 + 2], status;
432 struct i2c_msg msgs[args_len + 3];
435 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
437 for (i = 0; i < args_len; i++) {
438 msgs[i].addr = intel_sdvo->slave_addr;
441 msgs[i].buf = buf + 2 *i;
442 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
443 buf[2*i + 1] = ((u8*)args)[i];
445 msgs[i].addr = intel_sdvo->slave_addr;
448 msgs[i].buf = buf + 2*i;
449 buf[2*i + 0] = SDVO_I2C_OPCODE;
452 /* the following two are to read the response */
453 status = SDVO_I2C_CMD_STATUS;
454 msgs[i+1].addr = intel_sdvo->slave_addr;
457 msgs[i+1].buf = &status;
459 msgs[i+2].addr = intel_sdvo->slave_addr;
460 msgs[i+2].flags = I2C_M_RD;
462 msgs[i+2].buf = &status;
464 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
466 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
470 /* failure in I2C transfer */
471 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
476 while (status == SDVO_CMD_STATUS_PENDING && i--) {
477 if (!intel_sdvo_read_byte(intel_sdvo,
482 if (status != SDVO_CMD_STATUS_SUCCESS) {
483 DRM_DEBUG_KMS("command returns response %s [%d]\n",
484 status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP ? cmd_status_names[status] : "???",
492 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
493 void *response, int response_len)
500 * The documentation states that all commands will be
501 * processed within 15µs, and that we need only poll
502 * the status byte a maximum of 3 times in order for the
503 * command to be complete.
505 * Check 5 times in case the hardware failed to read the docs.
508 if (!intel_sdvo_read_byte(intel_sdvo,
512 } while (status == SDVO_CMD_STATUS_PENDING && --retry);
514 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
515 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
516 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
518 DRM_LOG_KMS("(??? %d)", status);
520 if (status != SDVO_CMD_STATUS_SUCCESS)
523 /* Read the command response */
524 for (i = 0; i < response_len; i++) {
525 if (!intel_sdvo_read_byte(intel_sdvo,
526 SDVO_I2C_RETURN_0 + i,
527 &((u8 *)response)[i]))
529 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
539 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
541 if (mode->clock >= 100000)
543 else if (mode->clock >= 50000)
549 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
552 return intel_sdvo_write_cmd(intel_sdvo,
553 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
557 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
559 return intel_sdvo_write_cmd(intel_sdvo, cmd, data, len);
563 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
565 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
568 return intel_sdvo_read_response(intel_sdvo, value, len);
571 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
573 struct intel_sdvo_set_target_input_args targets = {0};
574 return intel_sdvo_set_value(intel_sdvo,
575 SDVO_CMD_SET_TARGET_INPUT,
576 &targets, sizeof(targets));
580 * Return whether each input is trained.
582 * This function is making an assumption about the layout of the response,
583 * which should be checked against the docs.
585 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
587 struct intel_sdvo_get_trained_inputs_response response;
589 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
590 &response, sizeof(response)))
593 *input_1 = response.input0_trained;
594 *input_2 = response.input1_trained;
598 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
601 return intel_sdvo_set_value(intel_sdvo,
602 SDVO_CMD_SET_ACTIVE_OUTPUTS,
603 &outputs, sizeof(outputs));
606 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
609 u8 state = SDVO_ENCODER_STATE_ON;
612 case DRM_MODE_DPMS_ON:
613 state = SDVO_ENCODER_STATE_ON;
615 case DRM_MODE_DPMS_STANDBY:
616 state = SDVO_ENCODER_STATE_STANDBY;
618 case DRM_MODE_DPMS_SUSPEND:
619 state = SDVO_ENCODER_STATE_SUSPEND;
621 case DRM_MODE_DPMS_OFF:
622 state = SDVO_ENCODER_STATE_OFF;
626 return intel_sdvo_set_value(intel_sdvo,
627 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
630 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
634 struct intel_sdvo_pixel_clock_range clocks;
636 if (!intel_sdvo_get_value(intel_sdvo,
637 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
638 &clocks, sizeof(clocks)))
641 /* Convert the values from units of 10 kHz to kHz. */
642 *clock_min = clocks.min * 10;
643 *clock_max = clocks.max * 10;
647 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
650 return intel_sdvo_set_value(intel_sdvo,
651 SDVO_CMD_SET_TARGET_OUTPUT,
652 &outputs, sizeof(outputs));
655 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
656 struct intel_sdvo_dtd *dtd)
658 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
659 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
662 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
663 struct intel_sdvo_dtd *dtd)
665 return intel_sdvo_set_timing(intel_sdvo,
666 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
669 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
670 struct intel_sdvo_dtd *dtd)
672 return intel_sdvo_set_timing(intel_sdvo,
673 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
677 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
682 struct intel_sdvo_preferred_input_timing_args args;
684 memset(&args, 0, sizeof(args));
687 args.height = height;
690 if (intel_sdvo->is_lvds &&
691 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
692 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
695 return intel_sdvo_set_value(intel_sdvo,
696 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
697 &args, sizeof(args));
700 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
701 struct intel_sdvo_dtd *dtd)
703 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
704 &dtd->part1, sizeof(dtd->part1)) &&
705 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
706 &dtd->part2, sizeof(dtd->part2));
709 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
711 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
714 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
715 const struct drm_display_mode *mode)
717 uint16_t width, height;
718 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
719 uint16_t h_sync_offset, v_sync_offset;
721 width = mode->crtc_hdisplay;
722 height = mode->crtc_vdisplay;
724 /* do some mode translations */
725 h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
726 h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
728 v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
729 v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
731 h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
732 v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
734 dtd->part1.clock = mode->clock / 10;
735 dtd->part1.h_active = width & 0xff;
736 dtd->part1.h_blank = h_blank_len & 0xff;
737 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
738 ((h_blank_len >> 8) & 0xf);
739 dtd->part1.v_active = height & 0xff;
740 dtd->part1.v_blank = v_blank_len & 0xff;
741 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
742 ((v_blank_len >> 8) & 0xf);
744 dtd->part2.h_sync_off = h_sync_offset & 0xff;
745 dtd->part2.h_sync_width = h_sync_len & 0xff;
746 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
748 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
749 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
750 ((v_sync_len & 0x30) >> 4);
752 dtd->part2.dtd_flags = 0x18;
753 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
754 dtd->part2.dtd_flags |= 0x2;
755 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
756 dtd->part2.dtd_flags |= 0x4;
758 dtd->part2.sdvo_flags = 0;
759 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
760 dtd->part2.reserved = 0;
763 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
764 const struct intel_sdvo_dtd *dtd)
766 mode->hdisplay = dtd->part1.h_active;
767 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
768 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
769 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
770 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
771 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
772 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
773 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
775 mode->vdisplay = dtd->part1.v_active;
776 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
777 mode->vsync_start = mode->vdisplay;
778 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
779 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
780 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
781 mode->vsync_end = mode->vsync_start +
782 (dtd->part2.v_sync_off_width & 0xf);
783 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
784 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
785 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
787 mode->clock = dtd->part1.clock * 10;
789 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
790 if (dtd->part2.dtd_flags & 0x2)
791 mode->flags |= DRM_MODE_FLAG_PHSYNC;
792 if (dtd->part2.dtd_flags & 0x4)
793 mode->flags |= DRM_MODE_FLAG_PVSYNC;
796 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
798 struct intel_sdvo_encode encode;
800 return intel_sdvo_get_value(intel_sdvo,
801 SDVO_CMD_GET_SUPP_ENCODE,
802 &encode, sizeof(encode));
805 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
808 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
811 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
814 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
818 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
821 uint8_t set_buf_index[2];
827 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
829 for (i = 0; i <= av_split; i++) {
830 set_buf_index[0] = i; set_buf_index[1] = 0;
831 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
833 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
834 intel_sdvo_read_response(encoder, &buf_size, 1);
837 for (j = 0; j <= buf_size; j += 8) {
838 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
840 intel_sdvo_read_response(encoder, pos, 8);
847 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
849 struct dip_infoframe avi_if = {
850 .type = DIP_TYPE_AVI,
851 .ver = DIP_VERSION_AVI,
854 uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
855 uint8_t set_buf_index[2] = { 1, 0 };
856 uint64_t *data = (uint64_t *)&avi_if;
859 intel_dip_infoframe_csum(&avi_if);
861 if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_INDEX,
865 for (i = 0; i < sizeof(avi_if); i += 8) {
866 if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_DATA,
872 return intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_TXRATE,
876 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
878 struct intel_sdvo_tv_format format;
881 format_map = 1 << intel_sdvo->tv_format_index;
882 memset(&format, 0, sizeof(format));
883 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
885 BUILD_BUG_ON(sizeof(format) != 6);
886 return intel_sdvo_set_value(intel_sdvo,
887 SDVO_CMD_SET_TV_FORMAT,
888 &format, sizeof(format));
892 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
893 struct drm_display_mode *mode)
895 struct intel_sdvo_dtd output_dtd;
897 if (!intel_sdvo_set_target_output(intel_sdvo,
898 intel_sdvo->attached_output))
901 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
902 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
909 intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
910 struct drm_display_mode *mode,
911 struct drm_display_mode *adjusted_mode)
913 /* Reset the input timing to the screen. Assume always input 0. */
914 if (!intel_sdvo_set_target_input(intel_sdvo))
917 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
923 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
924 &intel_sdvo->input_dtd))
927 intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd);
929 drm_mode_set_crtcinfo(adjusted_mode, 0);
933 static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
934 struct drm_display_mode *mode,
935 struct drm_display_mode *adjusted_mode)
937 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
940 /* We need to construct preferred input timings based on our
941 * output timings. To do that, we have to set the output
942 * timings, even though this isn't really the right place in
943 * the sequence to do it. Oh well.
945 if (intel_sdvo->is_tv) {
946 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
949 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
952 } else if (intel_sdvo->is_lvds) {
953 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
954 intel_sdvo->sdvo_lvds_fixed_mode))
957 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
962 /* Make the CRTC code factor in the SDVO pixel multiplier. The
963 * SDVO device will factor out the multiplier during mode_set.
965 multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
966 intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
971 static void intel_sdvo_mode_set(struct drm_encoder *encoder,
972 struct drm_display_mode *mode,
973 struct drm_display_mode *adjusted_mode)
975 struct drm_device *dev = encoder->dev;
976 struct drm_i915_private *dev_priv = dev->dev_private;
977 struct drm_crtc *crtc = encoder->crtc;
978 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
979 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
981 struct intel_sdvo_in_out_map in_out;
982 struct intel_sdvo_dtd input_dtd;
983 int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
989 /* First, set the input mapping for the first input to our controlled
990 * output. This is only correct if we're a single-input device, in
991 * which case the first input is the output from the appropriate SDVO
992 * channel on the motherboard. In a two-input device, the first input
993 * will be SDVOB and the second SDVOC.
995 in_out.in0 = intel_sdvo->attached_output;
998 intel_sdvo_set_value(intel_sdvo,
999 SDVO_CMD_SET_IN_OUT_MAP,
1000 &in_out, sizeof(in_out));
1002 /* Set the output timings to the screen */
1003 if (!intel_sdvo_set_target_output(intel_sdvo,
1004 intel_sdvo->attached_output))
1007 /* We have tried to get input timing in mode_fixup, and filled into
1010 if (intel_sdvo->is_tv || intel_sdvo->is_lvds) {
1011 input_dtd = intel_sdvo->input_dtd;
1013 /* Set the output timing to the screen */
1014 if (!intel_sdvo_set_target_output(intel_sdvo,
1015 intel_sdvo->attached_output))
1018 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1019 (void) intel_sdvo_set_output_timing(intel_sdvo, &input_dtd);
1022 /* Set the input timing to the screen. Assume always input 0. */
1023 if (!intel_sdvo_set_target_input(intel_sdvo))
1026 if (intel_sdvo->is_hdmi &&
1027 !intel_sdvo_set_avi_infoframe(intel_sdvo))
1030 if (intel_sdvo->is_tv &&
1031 !intel_sdvo_set_tv_format(intel_sdvo))
1034 (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
1036 switch (pixel_multiplier) {
1038 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1039 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1040 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1042 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1045 /* Set the SDVO control regs. */
1046 if (INTEL_INFO(dev)->gen >= 4) {
1047 sdvox = SDVO_BORDER_ENABLE;
1048 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
1049 sdvox |= SDVO_VSYNC_ACTIVE_HIGH;
1050 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
1051 sdvox |= SDVO_HSYNC_ACTIVE_HIGH;
1053 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1054 switch (intel_sdvo->sdvo_reg) {
1056 sdvox &= SDVOB_PRESERVE_MASK;
1059 sdvox &= SDVOC_PRESERVE_MASK;
1062 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1064 if (intel_crtc->pipe == 1)
1065 sdvox |= SDVO_PIPE_B_SELECT;
1066 if (intel_sdvo->has_audio)
1067 sdvox |= SDVO_AUDIO_ENABLE;
1069 if (INTEL_INFO(dev)->gen >= 4) {
1070 /* done in crtc_mode_set as the dpll_md reg must be written early */
1071 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1072 /* done in crtc_mode_set as it lives inside the dpll register */
1074 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1077 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL)
1078 sdvox |= SDVO_STALL_SELECT;
1079 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1082 static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1084 struct drm_device *dev = encoder->dev;
1085 struct drm_i915_private *dev_priv = dev->dev_private;
1086 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1087 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
1090 if (mode != DRM_MODE_DPMS_ON) {
1091 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1093 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1095 if (mode == DRM_MODE_DPMS_OFF) {
1096 temp = I915_READ(intel_sdvo->sdvo_reg);
1097 if ((temp & SDVO_ENABLE) != 0) {
1098 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1102 bool input1, input2;
1106 temp = I915_READ(intel_sdvo->sdvo_reg);
1107 if ((temp & SDVO_ENABLE) == 0)
1108 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1109 for (i = 0; i < 2; i++)
1110 intel_wait_for_vblank(dev, intel_crtc->pipe);
1112 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1113 /* Warn if the device reported failure to sync.
1114 * A lot of SDVO devices fail to notify of sync, but it's
1115 * a given it the status is a success, we succeeded.
1117 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1118 DRM_DEBUG_KMS("First %s output reported failure to "
1119 "sync\n", SDVO_NAME(intel_sdvo));
1123 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1124 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1129 static int intel_sdvo_mode_valid(struct drm_connector *connector,
1130 struct drm_display_mode *mode)
1132 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1134 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1135 return MODE_NO_DBLESCAN;
1137 if (intel_sdvo->pixel_clock_min > mode->clock)
1138 return MODE_CLOCK_LOW;
1140 if (intel_sdvo->pixel_clock_max < mode->clock)
1141 return MODE_CLOCK_HIGH;
1143 if (intel_sdvo->is_lvds) {
1144 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1147 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1154 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1156 if (!intel_sdvo_get_value(intel_sdvo,
1157 SDVO_CMD_GET_DEVICE_CAPS,
1158 caps, sizeof(*caps)))
1161 DRM_DEBUG_KMS("SDVO capabilities:\n"
1164 " device_rev_id: %d\n"
1165 " sdvo_version_major: %d\n"
1166 " sdvo_version_minor: %d\n"
1167 " sdvo_inputs_mask: %d\n"
1168 " smooth_scaling: %d\n"
1169 " sharp_scaling: %d\n"
1171 " down_scaling: %d\n"
1172 " stall_support: %d\n"
1173 " output_flags: %d\n",
1176 caps->device_rev_id,
1177 caps->sdvo_version_major,
1178 caps->sdvo_version_minor,
1179 caps->sdvo_inputs_mask,
1180 caps->smooth_scaling,
1181 caps->sharp_scaling,
1184 caps->stall_support,
1185 caps->output_flags);
1192 struct drm_connector* intel_sdvo_find(struct drm_device *dev, int sdvoB)
1194 struct drm_connector *connector = NULL;
1195 struct intel_sdvo *iout = NULL;
1196 struct intel_sdvo *sdvo;
1198 /* find the sdvo connector */
1199 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1200 iout = to_intel_sdvo(connector);
1202 if (iout->type != INTEL_OUTPUT_SDVO)
1205 sdvo = iout->dev_priv;
1207 if (sdvo->sdvo_reg == SDVOB && sdvoB)
1210 if (sdvo->sdvo_reg == SDVOC && !sdvoB)
1218 int intel_sdvo_supports_hotplug(struct drm_connector *connector)
1222 struct intel_sdvo *intel_sdvo;
1223 DRM_DEBUG_KMS("\n");
1228 intel_sdvo = to_intel_sdvo(connector);
1230 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1231 &response, 2) && response[0];
1234 void intel_sdvo_set_hotplug(struct drm_connector *connector, int on)
1238 struct intel_sdvo *intel_sdvo = to_intel_sdvo(connector);
1240 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1241 intel_sdvo_read_response(intel_sdvo, &response, 2);
1244 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL, 0);
1245 status = intel_sdvo_read_response(intel_sdvo, &response, 2);
1247 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
1251 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
1254 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1255 intel_sdvo_read_response(intel_sdvo, &response, 2);
1260 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1264 if (intel_sdvo->caps.output_flags &
1265 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1))
1267 if (intel_sdvo->caps.output_flags &
1268 (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1))
1270 if (intel_sdvo->caps.output_flags &
1271 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_SVID1))
1273 if (intel_sdvo->caps.output_flags &
1274 (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_CVBS1))
1276 if (intel_sdvo->caps.output_flags &
1277 (SDVO_OUTPUT_YPRPB0 | SDVO_OUTPUT_YPRPB1))
1280 if (intel_sdvo->caps.output_flags &
1281 (SDVO_OUTPUT_SCART0 | SDVO_OUTPUT_SCART1))
1284 if (intel_sdvo->caps.output_flags &
1285 (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1))
1291 static struct edid *
1292 intel_sdvo_get_edid(struct drm_connector *connector)
1294 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1295 return drm_get_edid(connector, &sdvo->ddc);
1298 static struct drm_connector *
1299 intel_find_analog_connector(struct drm_device *dev)
1301 struct drm_connector *connector;
1302 struct intel_sdvo *encoder;
1304 list_for_each_entry(encoder,
1305 &dev->mode_config.encoder_list,
1307 if (encoder->base.type == INTEL_OUTPUT_ANALOG) {
1308 list_for_each_entry(connector,
1309 &dev->mode_config.connector_list,
1311 if (&encoder->base ==
1312 intel_attached_encoder(connector))
1322 intel_analog_is_connected(struct drm_device *dev)
1324 struct drm_connector *analog_connector;
1326 analog_connector = intel_find_analog_connector(dev);
1327 if (!analog_connector)
1330 if (analog_connector->funcs->detect(analog_connector, false) ==
1331 connector_status_disconnected)
1337 /* Mac mini hack -- use the same DDC as the analog connector */
1338 static struct edid *
1339 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1341 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1343 if (!intel_analog_is_connected(connector->dev))
1346 return drm_get_edid(connector, &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
1349 enum drm_connector_status
1350 intel_sdvo_hdmi_sink_detect(struct drm_connector *connector)
1352 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1353 enum drm_connector_status status;
1356 edid = intel_sdvo_get_edid(connector);
1358 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1359 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1362 * Don't use the 1 as the argument of DDC bus switch to get
1363 * the EDID. It is used for SDVO SPD ROM.
1365 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1366 intel_sdvo->ddc_bus = ddc;
1367 edid = intel_sdvo_get_edid(connector);
1372 * If we found the EDID on the other bus,
1373 * assume that is the correct DDC bus.
1376 intel_sdvo->ddc_bus = saved_ddc;
1380 * When there is no edid and no monitor is connected with VGA
1381 * port, try to use the CRT ddc to read the EDID for DVI-connector.
1384 edid = intel_sdvo_get_analog_edid(connector);
1386 status = connector_status_unknown;
1388 /* DDC bus is shared, match EDID to connector type */
1389 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1390 status = connector_status_connected;
1391 intel_sdvo->is_hdmi = drm_detect_hdmi_monitor(edid);
1392 intel_sdvo->has_audio = drm_detect_monitor_audio(edid);
1394 connector->display_info.raw_edid = NULL;
1398 if (status == connector_status_connected) {
1399 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1400 if (intel_sdvo_connector->force_audio)
1401 intel_sdvo->has_audio = intel_sdvo_connector->force_audio > 0;
1407 static enum drm_connector_status
1408 intel_sdvo_detect(struct drm_connector *connector, bool force)
1411 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1412 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1413 enum drm_connector_status ret;
1415 if (!intel_sdvo_write_cmd(intel_sdvo,
1416 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
1417 return connector_status_unknown;
1418 if (intel_sdvo->is_tv) {
1419 /* add 30ms delay when the output type is SDVO-TV */
1422 if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1423 return connector_status_unknown;
1425 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1426 response & 0xff, response >> 8,
1427 intel_sdvo_connector->output_flag);
1430 return connector_status_disconnected;
1432 intel_sdvo->attached_output = response;
1434 if ((intel_sdvo_connector->output_flag & response) == 0)
1435 ret = connector_status_disconnected;
1436 else if (response & SDVO_TMDS_MASK)
1437 ret = intel_sdvo_hdmi_sink_detect(connector);
1439 ret = connector_status_connected;
1441 /* May update encoder flag for like clock for SDVO TV, etc.*/
1442 if (ret == connector_status_connected) {
1443 intel_sdvo->is_tv = false;
1444 intel_sdvo->is_lvds = false;
1445 intel_sdvo->base.needs_tv_clock = false;
1447 if (response & SDVO_TV_MASK) {
1448 intel_sdvo->is_tv = true;
1449 intel_sdvo->base.needs_tv_clock = true;
1451 if (response & SDVO_LVDS_MASK)
1452 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1458 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1462 /* set the bus switch and get the modes */
1463 edid = intel_sdvo_get_edid(connector);
1466 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1467 * link between analog and digital outputs. So, if the regular SDVO
1468 * DDC fails, check to see if the analog output is disconnected, in
1469 * which case we'll look there for the digital DDC data.
1472 edid = intel_sdvo_get_analog_edid(connector);
1475 drm_mode_connector_update_edid_property(connector, edid);
1476 drm_add_edid_modes(connector, edid);
1477 connector->display_info.raw_edid = NULL;
1483 * Set of SDVO TV modes.
1484 * Note! This is in reply order (see loop in get_tv_modes).
1485 * XXX: all 60Hz refresh?
1487 struct drm_display_mode sdvo_tv_modes[] = {
1488 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1489 416, 0, 200, 201, 232, 233, 0,
1490 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1491 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1492 416, 0, 240, 241, 272, 273, 0,
1493 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1494 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1495 496, 0, 300, 301, 332, 333, 0,
1496 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1497 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1498 736, 0, 350, 351, 382, 383, 0,
1499 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1500 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1501 736, 0, 400, 401, 432, 433, 0,
1502 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1503 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1504 736, 0, 480, 481, 512, 513, 0,
1505 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1506 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1507 800, 0, 480, 481, 512, 513, 0,
1508 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1509 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1510 800, 0, 576, 577, 608, 609, 0,
1511 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1512 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1513 816, 0, 350, 351, 382, 383, 0,
1514 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1515 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1516 816, 0, 400, 401, 432, 433, 0,
1517 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1518 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1519 816, 0, 480, 481, 512, 513, 0,
1520 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1521 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1522 816, 0, 540, 541, 572, 573, 0,
1523 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1524 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1525 816, 0, 576, 577, 608, 609, 0,
1526 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1527 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1528 864, 0, 576, 577, 608, 609, 0,
1529 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1530 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1531 896, 0, 600, 601, 632, 633, 0,
1532 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1533 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1534 928, 0, 624, 625, 656, 657, 0,
1535 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1536 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1537 1016, 0, 766, 767, 798, 799, 0,
1538 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1539 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1540 1120, 0, 768, 769, 800, 801, 0,
1541 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1542 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1543 1376, 0, 1024, 1025, 1056, 1057, 0,
1544 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1547 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1549 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1550 struct intel_sdvo_sdtv_resolution_request tv_res;
1551 uint32_t reply = 0, format_map = 0;
1554 /* Read the list of supported input resolutions for the selected TV
1557 format_map = 1 << intel_sdvo->tv_format_index;
1558 memcpy(&tv_res, &format_map,
1559 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1561 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1564 BUILD_BUG_ON(sizeof(tv_res) != 3);
1565 if (!intel_sdvo_write_cmd(intel_sdvo,
1566 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1567 &tv_res, sizeof(tv_res)))
1569 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1572 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1573 if (reply & (1 << i)) {
1574 struct drm_display_mode *nmode;
1575 nmode = drm_mode_duplicate(connector->dev,
1578 drm_mode_probed_add(connector, nmode);
1582 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1584 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1585 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1586 struct drm_display_mode *newmode;
1589 * Attempt to get the mode list from DDC.
1590 * Assume that the preferred modes are
1591 * arranged in priority order.
1593 intel_ddc_get_modes(connector, intel_sdvo->i2c);
1594 if (list_empty(&connector->probed_modes) == false)
1597 /* Fetch modes from VBT */
1598 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1599 newmode = drm_mode_duplicate(connector->dev,
1600 dev_priv->sdvo_lvds_vbt_mode);
1601 if (newmode != NULL) {
1602 /* Guarantee the mode is preferred */
1603 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1604 DRM_MODE_TYPE_DRIVER);
1605 drm_mode_probed_add(connector, newmode);
1610 list_for_each_entry(newmode, &connector->probed_modes, head) {
1611 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1612 intel_sdvo->sdvo_lvds_fixed_mode =
1613 drm_mode_duplicate(connector->dev, newmode);
1615 drm_mode_set_crtcinfo(intel_sdvo->sdvo_lvds_fixed_mode,
1618 intel_sdvo->is_lvds = true;
1625 static int intel_sdvo_get_modes(struct drm_connector *connector)
1627 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1629 if (IS_TV(intel_sdvo_connector))
1630 intel_sdvo_get_tv_modes(connector);
1631 else if (IS_LVDS(intel_sdvo_connector))
1632 intel_sdvo_get_lvds_modes(connector);
1634 intel_sdvo_get_ddc_modes(connector);
1636 return !list_empty(&connector->probed_modes);
1640 intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1642 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1643 struct drm_device *dev = connector->dev;
1645 if (intel_sdvo_connector->left)
1646 drm_property_destroy(dev, intel_sdvo_connector->left);
1647 if (intel_sdvo_connector->right)
1648 drm_property_destroy(dev, intel_sdvo_connector->right);
1649 if (intel_sdvo_connector->top)
1650 drm_property_destroy(dev, intel_sdvo_connector->top);
1651 if (intel_sdvo_connector->bottom)
1652 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1653 if (intel_sdvo_connector->hpos)
1654 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1655 if (intel_sdvo_connector->vpos)
1656 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1657 if (intel_sdvo_connector->saturation)
1658 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1659 if (intel_sdvo_connector->contrast)
1660 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1661 if (intel_sdvo_connector->hue)
1662 drm_property_destroy(dev, intel_sdvo_connector->hue);
1663 if (intel_sdvo_connector->sharpness)
1664 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1665 if (intel_sdvo_connector->flicker_filter)
1666 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1667 if (intel_sdvo_connector->flicker_filter_2d)
1668 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1669 if (intel_sdvo_connector->flicker_filter_adaptive)
1670 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1671 if (intel_sdvo_connector->tv_luma_filter)
1672 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1673 if (intel_sdvo_connector->tv_chroma_filter)
1674 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
1675 if (intel_sdvo_connector->dot_crawl)
1676 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
1677 if (intel_sdvo_connector->brightness)
1678 drm_property_destroy(dev, intel_sdvo_connector->brightness);
1681 static void intel_sdvo_destroy(struct drm_connector *connector)
1683 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1685 if (intel_sdvo_connector->tv_format)
1686 drm_property_destroy(connector->dev,
1687 intel_sdvo_connector->tv_format);
1689 intel_sdvo_destroy_enhance_property(connector);
1690 drm_sysfs_connector_remove(connector);
1691 drm_connector_cleanup(connector);
1696 intel_sdvo_set_property(struct drm_connector *connector,
1697 struct drm_property *property,
1700 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1701 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1702 uint16_t temp_value;
1706 ret = drm_connector_property_set_value(connector, property, val);
1710 if (property == intel_sdvo_connector->force_audio_property) {
1711 if (val == intel_sdvo_connector->force_audio)
1714 intel_sdvo_connector->force_audio = val;
1716 if (val > 0 && intel_sdvo->has_audio)
1718 if (val < 0 && !intel_sdvo->has_audio)
1721 intel_sdvo->has_audio = val > 0;
1725 #define CHECK_PROPERTY(name, NAME) \
1726 if (intel_sdvo_connector->name == property) { \
1727 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1728 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1729 cmd = SDVO_CMD_SET_##NAME; \
1730 intel_sdvo_connector->cur_##name = temp_value; \
1734 if (property == intel_sdvo_connector->tv_format) {
1735 if (val >= TV_FORMAT_NUM)
1738 if (intel_sdvo->tv_format_index ==
1739 intel_sdvo_connector->tv_format_supported[val])
1742 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
1744 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
1746 if (intel_sdvo_connector->left == property) {
1747 drm_connector_property_set_value(connector,
1748 intel_sdvo_connector->right, val);
1749 if (intel_sdvo_connector->left_margin == temp_value)
1752 intel_sdvo_connector->left_margin = temp_value;
1753 intel_sdvo_connector->right_margin = temp_value;
1754 temp_value = intel_sdvo_connector->max_hscan -
1755 intel_sdvo_connector->left_margin;
1756 cmd = SDVO_CMD_SET_OVERSCAN_H;
1758 } else if (intel_sdvo_connector->right == property) {
1759 drm_connector_property_set_value(connector,
1760 intel_sdvo_connector->left, val);
1761 if (intel_sdvo_connector->right_margin == temp_value)
1764 intel_sdvo_connector->left_margin = temp_value;
1765 intel_sdvo_connector->right_margin = temp_value;
1766 temp_value = intel_sdvo_connector->max_hscan -
1767 intel_sdvo_connector->left_margin;
1768 cmd = SDVO_CMD_SET_OVERSCAN_H;
1770 } else if (intel_sdvo_connector->top == property) {
1771 drm_connector_property_set_value(connector,
1772 intel_sdvo_connector->bottom, val);
1773 if (intel_sdvo_connector->top_margin == temp_value)
1776 intel_sdvo_connector->top_margin = temp_value;
1777 intel_sdvo_connector->bottom_margin = temp_value;
1778 temp_value = intel_sdvo_connector->max_vscan -
1779 intel_sdvo_connector->top_margin;
1780 cmd = SDVO_CMD_SET_OVERSCAN_V;
1782 } else if (intel_sdvo_connector->bottom == property) {
1783 drm_connector_property_set_value(connector,
1784 intel_sdvo_connector->top, val);
1785 if (intel_sdvo_connector->bottom_margin == temp_value)
1788 intel_sdvo_connector->top_margin = temp_value;
1789 intel_sdvo_connector->bottom_margin = temp_value;
1790 temp_value = intel_sdvo_connector->max_vscan -
1791 intel_sdvo_connector->top_margin;
1792 cmd = SDVO_CMD_SET_OVERSCAN_V;
1795 CHECK_PROPERTY(hpos, HPOS)
1796 CHECK_PROPERTY(vpos, VPOS)
1797 CHECK_PROPERTY(saturation, SATURATION)
1798 CHECK_PROPERTY(contrast, CONTRAST)
1799 CHECK_PROPERTY(hue, HUE)
1800 CHECK_PROPERTY(brightness, BRIGHTNESS)
1801 CHECK_PROPERTY(sharpness, SHARPNESS)
1802 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1803 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1804 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1805 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1806 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
1807 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
1810 return -EINVAL; /* unknown property */
1813 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1818 if (intel_sdvo->base.base.crtc) {
1819 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
1820 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
1825 #undef CHECK_PROPERTY
1828 static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1829 .dpms = intel_sdvo_dpms,
1830 .mode_fixup = intel_sdvo_mode_fixup,
1831 .prepare = intel_encoder_prepare,
1832 .mode_set = intel_sdvo_mode_set,
1833 .commit = intel_encoder_commit,
1836 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
1837 .dpms = drm_helper_connector_dpms,
1838 .detect = intel_sdvo_detect,
1839 .fill_modes = drm_helper_probe_single_connector_modes,
1840 .set_property = intel_sdvo_set_property,
1841 .destroy = intel_sdvo_destroy,
1844 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1845 .get_modes = intel_sdvo_get_modes,
1846 .mode_valid = intel_sdvo_mode_valid,
1847 .best_encoder = intel_best_encoder,
1850 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
1852 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1854 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
1855 drm_mode_destroy(encoder->dev,
1856 intel_sdvo->sdvo_lvds_fixed_mode);
1858 i2c_del_adapter(&intel_sdvo->ddc);
1859 intel_encoder_destroy(encoder);
1862 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1863 .destroy = intel_sdvo_enc_destroy,
1867 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1870 unsigned int num_bits;
1872 /* Make a mask of outputs less than or equal to our own priority in the
1875 switch (sdvo->controlled_output) {
1876 case SDVO_OUTPUT_LVDS1:
1877 mask |= SDVO_OUTPUT_LVDS1;
1878 case SDVO_OUTPUT_LVDS0:
1879 mask |= SDVO_OUTPUT_LVDS0;
1880 case SDVO_OUTPUT_TMDS1:
1881 mask |= SDVO_OUTPUT_TMDS1;
1882 case SDVO_OUTPUT_TMDS0:
1883 mask |= SDVO_OUTPUT_TMDS0;
1884 case SDVO_OUTPUT_RGB1:
1885 mask |= SDVO_OUTPUT_RGB1;
1886 case SDVO_OUTPUT_RGB0:
1887 mask |= SDVO_OUTPUT_RGB0;
1891 /* Count bits to find what number we are in the priority list. */
1892 mask &= sdvo->caps.output_flags;
1893 num_bits = hweight16(mask);
1894 /* If more than 3 outputs, default to DDC bus 3 for now. */
1898 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1899 sdvo->ddc_bus = 1 << num_bits;
1903 * Choose the appropriate DDC bus for control bus switch command for this
1904 * SDVO output based on the controlled output.
1906 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1907 * outputs, then LVDS outputs.
1910 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
1911 struct intel_sdvo *sdvo, u32 reg)
1913 struct sdvo_device_mapping *mapping;
1916 mapping = &(dev_priv->sdvo_mappings[0]);
1918 mapping = &(dev_priv->sdvo_mappings[1]);
1920 if (mapping->initialized)
1921 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1923 intel_sdvo_guess_ddc_bus(sdvo);
1927 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
1928 struct intel_sdvo *sdvo, u32 reg)
1930 struct sdvo_device_mapping *mapping;
1934 mapping = &dev_priv->sdvo_mappings[0];
1936 mapping = &dev_priv->sdvo_mappings[1];
1938 pin = GMBUS_PORT_DPB;
1939 speed = GMBUS_RATE_1MHZ >> 8;
1940 if (mapping->initialized) {
1941 pin = mapping->i2c_pin;
1942 speed = mapping->i2c_speed;
1945 sdvo->i2c = &dev_priv->gmbus[pin].adapter;
1946 intel_gmbus_set_speed(sdvo->i2c, speed);
1947 intel_gmbus_force_bit(sdvo->i2c, true);
1951 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
1955 if (!intel_sdvo_check_supp_encode(intel_sdvo))
1958 if (!intel_sdvo_set_target_output(intel_sdvo,
1959 device == 0 ? SDVO_OUTPUT_TMDS0 : SDVO_OUTPUT_TMDS1))
1963 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE, &is_hdmi, 1))
1970 intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg)
1972 struct drm_i915_private *dev_priv = dev->dev_private;
1973 struct sdvo_device_mapping *my_mapping, *other_mapping;
1975 if (IS_SDVOB(sdvo_reg)) {
1976 my_mapping = &dev_priv->sdvo_mappings[0];
1977 other_mapping = &dev_priv->sdvo_mappings[1];
1979 my_mapping = &dev_priv->sdvo_mappings[1];
1980 other_mapping = &dev_priv->sdvo_mappings[0];
1983 /* If the BIOS described our SDVO device, take advantage of it. */
1984 if (my_mapping->slave_addr)
1985 return my_mapping->slave_addr;
1987 /* If the BIOS only described a different SDVO device, use the
1988 * address that it isn't using.
1990 if (other_mapping->slave_addr) {
1991 if (other_mapping->slave_addr == 0x70)
1997 /* No SDVO device info is found for another DVO port,
1998 * so use mapping assumption we had before BIOS parsing.
2000 if (IS_SDVOB(sdvo_reg))
2007 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2008 struct intel_sdvo *encoder)
2010 drm_connector_init(encoder->base.base.dev,
2011 &connector->base.base,
2012 &intel_sdvo_connector_funcs,
2013 connector->base.base.connector_type);
2015 drm_connector_helper_add(&connector->base.base,
2016 &intel_sdvo_connector_helper_funcs);
2018 connector->base.base.interlace_allowed = 0;
2019 connector->base.base.doublescan_allowed = 0;
2020 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2022 intel_connector_attach_encoder(&connector->base, &encoder->base);
2023 drm_sysfs_connector_add(&connector->base.base);
2027 intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
2029 struct drm_device *dev = connector->base.base.dev;
2031 connector->force_audio_property =
2032 drm_property_create(dev, DRM_MODE_PROP_RANGE, "force_audio", 2);
2033 if (connector->force_audio_property) {
2034 connector->force_audio_property->values[0] = -1;
2035 connector->force_audio_property->values[1] = 1;
2036 drm_connector_attach_property(&connector->base.base,
2037 connector->force_audio_property, 0);
2042 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2044 struct drm_encoder *encoder = &intel_sdvo->base.base;
2045 struct drm_connector *connector;
2046 struct intel_connector *intel_connector;
2047 struct intel_sdvo_connector *intel_sdvo_connector;
2049 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2050 if (!intel_sdvo_connector)
2054 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2055 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2056 } else if (device == 1) {
2057 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2058 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2061 intel_connector = &intel_sdvo_connector->base;
2062 connector = &intel_connector->base;
2063 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2064 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2065 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2067 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2068 /* enable hdmi encoding mode if supported */
2069 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
2070 intel_sdvo_set_colorimetry(intel_sdvo,
2071 SDVO_COLORIMETRY_RGB256);
2072 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2073 intel_sdvo->is_hdmi = true;
2075 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2076 (1 << INTEL_ANALOG_CLONE_BIT));
2078 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2080 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
2086 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2088 struct drm_encoder *encoder = &intel_sdvo->base.base;
2089 struct drm_connector *connector;
2090 struct intel_connector *intel_connector;
2091 struct intel_sdvo_connector *intel_sdvo_connector;
2093 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2094 if (!intel_sdvo_connector)
2097 intel_connector = &intel_sdvo_connector->base;
2098 connector = &intel_connector->base;
2099 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2100 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2102 intel_sdvo->controlled_output |= type;
2103 intel_sdvo_connector->output_flag = type;
2105 intel_sdvo->is_tv = true;
2106 intel_sdvo->base.needs_tv_clock = true;
2107 intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
2109 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2111 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2114 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2120 intel_sdvo_destroy(connector);
2125 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2127 struct drm_encoder *encoder = &intel_sdvo->base.base;
2128 struct drm_connector *connector;
2129 struct intel_connector *intel_connector;
2130 struct intel_sdvo_connector *intel_sdvo_connector;
2132 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2133 if (!intel_sdvo_connector)
2136 intel_connector = &intel_sdvo_connector->base;
2137 connector = &intel_connector->base;
2138 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2139 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2140 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2143 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2144 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2145 } else if (device == 1) {
2146 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2147 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2150 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2151 (1 << INTEL_ANALOG_CLONE_BIT));
2153 intel_sdvo_connector_init(intel_sdvo_connector,
2159 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2161 struct drm_encoder *encoder = &intel_sdvo->base.base;
2162 struct drm_connector *connector;
2163 struct intel_connector *intel_connector;
2164 struct intel_sdvo_connector *intel_sdvo_connector;
2166 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2167 if (!intel_sdvo_connector)
2170 intel_connector = &intel_sdvo_connector->base;
2171 connector = &intel_connector->base;
2172 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2173 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2176 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2177 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2178 } else if (device == 1) {
2179 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2180 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2183 intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
2184 (1 << INTEL_SDVO_LVDS_CLONE_BIT));
2186 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2187 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2193 intel_sdvo_destroy(connector);
2198 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2200 intel_sdvo->is_tv = false;
2201 intel_sdvo->base.needs_tv_clock = false;
2202 intel_sdvo->is_lvds = false;
2204 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2206 if (flags & SDVO_OUTPUT_TMDS0)
2207 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2210 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2211 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2214 /* TV has no XXX1 function block */
2215 if (flags & SDVO_OUTPUT_SVID0)
2216 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2219 if (flags & SDVO_OUTPUT_CVBS0)
2220 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2223 if (flags & SDVO_OUTPUT_RGB0)
2224 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2227 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2228 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2231 if (flags & SDVO_OUTPUT_LVDS0)
2232 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2235 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2236 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2239 if ((flags & SDVO_OUTPUT_MASK) == 0) {
2240 unsigned char bytes[2];
2242 intel_sdvo->controlled_output = 0;
2243 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2244 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2245 SDVO_NAME(intel_sdvo),
2246 bytes[0], bytes[1]);
2249 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1);
2254 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2255 struct intel_sdvo_connector *intel_sdvo_connector,
2258 struct drm_device *dev = intel_sdvo->base.base.dev;
2259 struct intel_sdvo_tv_format format;
2260 uint32_t format_map, i;
2262 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2265 if (!intel_sdvo_get_value(intel_sdvo,
2266 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2267 &format, sizeof(format)))
2270 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2272 if (format_map == 0)
2275 intel_sdvo_connector->format_supported_num = 0;
2276 for (i = 0 ; i < TV_FORMAT_NUM; i++)
2277 if (format_map & (1 << i))
2278 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2281 intel_sdvo_connector->tv_format =
2282 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2283 "mode", intel_sdvo_connector->format_supported_num);
2284 if (!intel_sdvo_connector->tv_format)
2287 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2288 drm_property_add_enum(
2289 intel_sdvo_connector->tv_format, i,
2290 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2292 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2293 drm_connector_attach_property(&intel_sdvo_connector->base.base,
2294 intel_sdvo_connector->tv_format, 0);
2299 #define ENHANCEMENT(name, NAME) do { \
2300 if (enhancements.name) { \
2301 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2302 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2304 intel_sdvo_connector->max_##name = data_value[0]; \
2305 intel_sdvo_connector->cur_##name = response; \
2306 intel_sdvo_connector->name = \
2307 drm_property_create(dev, DRM_MODE_PROP_RANGE, #name, 2); \
2308 if (!intel_sdvo_connector->name) return false; \
2309 intel_sdvo_connector->name->values[0] = 0; \
2310 intel_sdvo_connector->name->values[1] = data_value[0]; \
2311 drm_connector_attach_property(connector, \
2312 intel_sdvo_connector->name, \
2313 intel_sdvo_connector->cur_##name); \
2314 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2315 data_value[0], data_value[1], response); \
2320 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2321 struct intel_sdvo_connector *intel_sdvo_connector,
2322 struct intel_sdvo_enhancements_reply enhancements)
2324 struct drm_device *dev = intel_sdvo->base.base.dev;
2325 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2326 uint16_t response, data_value[2];
2328 /* when horizontal overscan is supported, Add the left/right property */
2329 if (enhancements.overscan_h) {
2330 if (!intel_sdvo_get_value(intel_sdvo,
2331 SDVO_CMD_GET_MAX_OVERSCAN_H,
2335 if (!intel_sdvo_get_value(intel_sdvo,
2336 SDVO_CMD_GET_OVERSCAN_H,
2340 intel_sdvo_connector->max_hscan = data_value[0];
2341 intel_sdvo_connector->left_margin = data_value[0] - response;
2342 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2343 intel_sdvo_connector->left =
2344 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2346 if (!intel_sdvo_connector->left)
2349 intel_sdvo_connector->left->values[0] = 0;
2350 intel_sdvo_connector->left->values[1] = data_value[0];
2351 drm_connector_attach_property(connector,
2352 intel_sdvo_connector->left,
2353 intel_sdvo_connector->left_margin);
2355 intel_sdvo_connector->right =
2356 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2358 if (!intel_sdvo_connector->right)
2361 intel_sdvo_connector->right->values[0] = 0;
2362 intel_sdvo_connector->right->values[1] = data_value[0];
2363 drm_connector_attach_property(connector,
2364 intel_sdvo_connector->right,
2365 intel_sdvo_connector->right_margin);
2366 DRM_DEBUG_KMS("h_overscan: max %d, "
2367 "default %d, current %d\n",
2368 data_value[0], data_value[1], response);
2371 if (enhancements.overscan_v) {
2372 if (!intel_sdvo_get_value(intel_sdvo,
2373 SDVO_CMD_GET_MAX_OVERSCAN_V,
2377 if (!intel_sdvo_get_value(intel_sdvo,
2378 SDVO_CMD_GET_OVERSCAN_V,
2382 intel_sdvo_connector->max_vscan = data_value[0];
2383 intel_sdvo_connector->top_margin = data_value[0] - response;
2384 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2385 intel_sdvo_connector->top =
2386 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2388 if (!intel_sdvo_connector->top)
2391 intel_sdvo_connector->top->values[0] = 0;
2392 intel_sdvo_connector->top->values[1] = data_value[0];
2393 drm_connector_attach_property(connector,
2394 intel_sdvo_connector->top,
2395 intel_sdvo_connector->top_margin);
2397 intel_sdvo_connector->bottom =
2398 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2399 "bottom_margin", 2);
2400 if (!intel_sdvo_connector->bottom)
2403 intel_sdvo_connector->bottom->values[0] = 0;
2404 intel_sdvo_connector->bottom->values[1] = data_value[0];
2405 drm_connector_attach_property(connector,
2406 intel_sdvo_connector->bottom,
2407 intel_sdvo_connector->bottom_margin);
2408 DRM_DEBUG_KMS("v_overscan: max %d, "
2409 "default %d, current %d\n",
2410 data_value[0], data_value[1], response);
2413 ENHANCEMENT(hpos, HPOS);
2414 ENHANCEMENT(vpos, VPOS);
2415 ENHANCEMENT(saturation, SATURATION);
2416 ENHANCEMENT(contrast, CONTRAST);
2417 ENHANCEMENT(hue, HUE);
2418 ENHANCEMENT(sharpness, SHARPNESS);
2419 ENHANCEMENT(brightness, BRIGHTNESS);
2420 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2421 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2422 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2423 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2424 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2426 if (enhancements.dot_crawl) {
2427 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2430 intel_sdvo_connector->max_dot_crawl = 1;
2431 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2432 intel_sdvo_connector->dot_crawl =
2433 drm_property_create(dev, DRM_MODE_PROP_RANGE, "dot_crawl", 2);
2434 if (!intel_sdvo_connector->dot_crawl)
2437 intel_sdvo_connector->dot_crawl->values[0] = 0;
2438 intel_sdvo_connector->dot_crawl->values[1] = 1;
2439 drm_connector_attach_property(connector,
2440 intel_sdvo_connector->dot_crawl,
2441 intel_sdvo_connector->cur_dot_crawl);
2442 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2449 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2450 struct intel_sdvo_connector *intel_sdvo_connector,
2451 struct intel_sdvo_enhancements_reply enhancements)
2453 struct drm_device *dev = intel_sdvo->base.base.dev;
2454 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2455 uint16_t response, data_value[2];
2457 ENHANCEMENT(brightness, BRIGHTNESS);
2463 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2464 struct intel_sdvo_connector *intel_sdvo_connector)
2467 struct intel_sdvo_enhancements_reply reply;
2471 enhancements.response = 0;
2472 intel_sdvo_get_value(intel_sdvo,
2473 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2474 &enhancements, sizeof(enhancements));
2475 if (enhancements.response == 0) {
2476 DRM_DEBUG_KMS("No enhancement is supported\n");
2480 if (IS_TV(intel_sdvo_connector))
2481 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2482 else if(IS_LVDS(intel_sdvo_connector))
2483 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2488 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2489 struct i2c_msg *msgs,
2492 struct intel_sdvo *sdvo = adapter->algo_data;
2494 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2497 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2500 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2502 struct intel_sdvo *sdvo = adapter->algo_data;
2503 return sdvo->i2c->algo->functionality(sdvo->i2c);
2506 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2507 .master_xfer = intel_sdvo_ddc_proxy_xfer,
2508 .functionality = intel_sdvo_ddc_proxy_func
2512 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2513 struct drm_device *dev)
2515 sdvo->ddc.owner = THIS_MODULE;
2516 sdvo->ddc.class = I2C_CLASS_DDC;
2517 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2518 sdvo->ddc.dev.parent = &dev->pdev->dev;
2519 sdvo->ddc.algo_data = sdvo;
2520 sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2522 return i2c_add_adapter(&sdvo->ddc) == 0;
2525 bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
2527 struct drm_i915_private *dev_priv = dev->dev_private;
2528 struct intel_encoder *intel_encoder;
2529 struct intel_sdvo *intel_sdvo;
2532 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2536 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
2541 intel_sdvo->sdvo_reg = sdvo_reg;
2543 intel_encoder = &intel_sdvo->base;
2544 intel_encoder->type = INTEL_OUTPUT_SDVO;
2545 /* encoder type will be decided later */
2546 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2548 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg) >> 1;
2549 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
2551 /* Read the regs to test if we can talk to the device */
2552 for (i = 0; i < 0x40; i++) {
2555 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2556 DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
2557 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2562 if (IS_SDVOB(sdvo_reg))
2563 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
2565 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
2567 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
2569 /* In default case sdvo lvds is false */
2570 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2573 if (intel_sdvo_output_setup(intel_sdvo,
2574 intel_sdvo->caps.output_flags) != true) {
2575 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
2576 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2580 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2582 /* Set the input timing to the screen. Assume always input 0. */
2583 if (!intel_sdvo_set_target_input(intel_sdvo))
2586 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2587 &intel_sdvo->pixel_clock_min,
2588 &intel_sdvo->pixel_clock_max))
2591 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2592 "clock range %dMHz - %dMHz, "
2593 "input 1: %c, input 2: %c, "
2594 "output 1: %c, output 2: %c\n",
2595 SDVO_NAME(intel_sdvo),
2596 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2597 intel_sdvo->caps.device_rev_id,
2598 intel_sdvo->pixel_clock_min / 1000,
2599 intel_sdvo->pixel_clock_max / 1000,
2600 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2601 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2602 /* check currently supported outputs */
2603 intel_sdvo->caps.output_flags &
2604 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2605 intel_sdvo->caps.output_flags &
2606 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2610 drm_encoder_cleanup(&intel_encoder->base);
2611 i2c_del_adapter(&intel_sdvo->ddc);