drivers/gpu/drm/i915/intel_sdvo.c

   1 /*
   2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
   3  * Copyright © 2006-2007 Intel Corporation
   4  *   Jesse Barnes <jesse.barnes@intel.com>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23  * DEALINGS IN THE SOFTWARE.
  24  *
  25  * Authors:
  26  *      Eric Anholt <eric@anholt.net>
  27  */
  28 #include <linux/i2c.h>
  29 #include <linux/slab.h>
  30 #include <linux/delay.h>
  31 #include <linux/export.h>
  32 #include <drm/drmP.h>
  33 #include <drm/drm_crtc.h>
  34 #include <drm/drm_edid.h>
  35 #include "intel_drv.h"
  36 #include <drm/i915_drm.h>
  37 #include "i915_drv.h"
  38 #include "intel_sdvo_regs.h"
  39
  40 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
  41 #define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
  42 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
  43 #define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
  44
  45 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
  46                         SDVO_TV_MASK)
  47
  48 #define IS_TV(c)        (c->output_flag & SDVO_TV_MASK)
  49 #define IS_TMDS(c)      (c->output_flag & SDVO_TMDS_MASK)
  50 #define IS_LVDS(c)      (c->output_flag & SDVO_LVDS_MASK)
  51 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
  52 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
  53
  54
  55 static const char *tv_format_names[] = {
  56         "NTSC_M"   , "NTSC_J"  , "NTSC_443",
  57         "PAL_B"    , "PAL_D"   , "PAL_G"   ,
  58         "PAL_H"    , "PAL_I"   , "PAL_M"   ,
  59         "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
  60         "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
  61         "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
  62         "SECAM_60"
  63 };
  64
  65 #define TV_FORMAT_NUM  (sizeof(tv_format_names) / sizeof(*tv_format_names))
  66
  67 struct intel_sdvo {
  68         struct intel_encoder base;
  69
  70         struct i2c_adapter *i2c;
  71         u8 slave_addr;
  72
  73         struct i2c_adapter ddc;
  74
  75         /* Register for the SDVO device: SDVOB or SDVOC */
  76         uint32_t sdvo_reg;
  77
  78         /* Active outputs controlled by this SDVO output */
  79         uint16_t controlled_output;
  80
  81         /*
  82          * Capabilities of the SDVO device returned by
  83          * intel_sdvo_get_capabilities()
  84          */
  85         struct intel_sdvo_caps caps;
  86
  87         /* Pixel clock limitations reported by the SDVO device, in kHz */
  88         int pixel_clock_min, pixel_clock_max;
  89
  90         /*
  91         * For multiple function SDVO device,
  92         * this is for current attached outputs.
  93         */
  94         uint16_t attached_output;
  95
  96         /*
  97          * Hotplug activation bits for this device
  98          */
  99         uint16_t hotplug_active;
 100
 101         /**
 102          * This is used to select the color range of RBG outputs in HDMI mode.
 103          * It is only valid when using TMDS encoding and 8 bit per color mode.
 104          */
 105         uint32_t color_range;
 106         bool color_range_auto;
 107
 108         /**
 109          * This is set if we're going to treat the device as TV-out.
 110          *
 111          * While we have these nice friendly flags for output types that ought
 112          * to decide this for us, the S-Video output on our HDMI+S-Video card
 113          * shows up as RGB1 (VGA).
 114          */
 115         bool is_tv;
 116
 117         /* On different gens SDVOB is at different places. */
 118         bool is_sdvob;
 119
 120         /* This is for current tv format name */
 121         int tv_format_index;
 122
 123         /**
 124          * This is set if we treat the device as HDMI, instead of DVI.
 125          */
 126         bool is_hdmi;
 127         bool has_hdmi_monitor;
 128         bool has_hdmi_audio;
 129         bool rgb_quant_range_selectable;
 130
 131         /**
 132          * This is set if we detect output of sdvo device as LVDS and
 133          * have a valid fixed mode to use with the panel.
 134          */
 135         bool is_lvds;
 136
 137         /**
 138          * This is sdvo fixed pannel mode pointer
 139          */
 140         struct drm_display_mode *sdvo_lvds_fixed_mode;
 141
 142         /* DDC bus used by this SDVO encoder */
 143         uint8_t ddc_bus;
 144
 145         /*
 146          * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
 147          */
 148         uint8_t dtd_sdvo_flags;
 149 };
 150
 151 struct intel_sdvo_connector {
 152         struct intel_connector base;
 153
 154         /* Mark the type of connector */
 155         uint16_t output_flag;
 156
 157         enum hdmi_force_audio force_audio;
 158
 159         /* This contains all current supported TV format */
 160         u8 tv_format_supported[TV_FORMAT_NUM];
 161         int   format_supported_num;
 162         struct drm_property *tv_format;
 163
 164         /* add the property for the SDVO-TV */
 165         struct drm_property *left;
 166         struct drm_property *right;
 167         struct drm_property *top;
 168         struct drm_property *bottom;
 169         struct drm_property *hpos;
 170         struct drm_property *vpos;
 171         struct drm_property *contrast;
 172         struct drm_property *saturation;
 173         struct drm_property *hue;
 174         struct drm_property *sharpness;
 175         struct drm_property *flicker_filter;
 176         struct drm_property *flicker_filter_adaptive;
 177         struct drm_property *flicker_filter_2d;
 178         struct drm_property *tv_chroma_filter;
 179         struct drm_property *tv_luma_filter;
 180         struct drm_property *dot_crawl;
 181
 182         /* add the property for the SDVO-TV/LVDS */
 183         struct drm_property *brightness;
 184
 185         /* Add variable to record current setting for the above property */
 186         u32     left_margin, right_margin, top_margin, bottom_margin;
 187
 188         /* this is to get the range of margin.*/
 189         u32     max_hscan,  max_vscan;
 190         u32     max_hpos, cur_hpos;
 191         u32     max_vpos, cur_vpos;
 192         u32     cur_brightness, max_brightness;
 193         u32     cur_contrast,   max_contrast;
 194         u32     cur_saturation, max_saturation;
 195         u32     cur_hue,        max_hue;
 196         u32     cur_sharpness,  max_sharpness;
 197         u32     cur_flicker_filter,             max_flicker_filter;
 198         u32     cur_flicker_filter_adaptive,    max_flicker_filter_adaptive;
 199         u32     cur_flicker_filter_2d,          max_flicker_filter_2d;
 200         u32     cur_tv_chroma_filter,   max_tv_chroma_filter;
 201         u32     cur_tv_luma_filter,     max_tv_luma_filter;
 202         u32     cur_dot_crawl,  max_dot_crawl;
 203 };
 204
 205 static struct intel_sdvo *to_sdvo(struct intel_encoder *encoder)
 206 {
 207         return container_of(encoder, struct intel_sdvo, base);
 208 }
 209
 210 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
 211 {
 212         return to_sdvo(intel_attached_encoder(connector));
 213 }
 214
 215 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
 216 {
 217         return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
 218 }
 219
 220 static bool
 221 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
 222 static bool
 223 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
 224                               struct intel_sdvo_connector *intel_sdvo_connector,
 225                               int type);
 226 static bool
 227 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
 228                                    struct intel_sdvo_connector *intel_sdvo_connector);
 229
 230 /**
 231  * Writes the SDVOB or SDVOC with the given value, but always writes both
 232  * SDVOB and SDVOC to work around apparent hardware issues (according to
 233  * comments in the BIOS).
 234  */
 235 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
 236 {
 237         struct drm_device *dev = intel_sdvo->base.base.dev;
 238         struct drm_i915_private *dev_priv = dev->dev_private;
 239         u32 bval = val, cval = val;
 240         int i;
 241
 242         if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
 243                 I915_WRITE(intel_sdvo->sdvo_reg, val);
 244                 I915_READ(intel_sdvo->sdvo_reg);
 245                 return;
 246         }
 247
 248         if (intel_sdvo->sdvo_reg == GEN3_SDVOB)
 249                 cval = I915_READ(GEN3_SDVOC);
 250         else
 251                 bval = I915_READ(GEN3_SDVOB);
 252
 253         /*
 254          * Write the registers twice for luck. Sometimes,
 255          * writing them only once doesn't appear to 'stick'.
 256          * The BIOS does this too. Yay, magic
 257          */
 258         for (i = 0; i < 2; i++)
 259         {
 260                 I915_WRITE(GEN3_SDVOB, bval);
 261                 I915_READ(GEN3_SDVOB);
 262                 I915_WRITE(GEN3_SDVOC, cval);
 263                 I915_READ(GEN3_SDVOC);
 264         }
 265 }
 266
 267 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
 268 {
 269         struct i2c_msg msgs[] = {
 270                 {
 271                         .addr = intel_sdvo->slave_addr,
 272                         .flags = 0,
 273                         .len = 1,
 274                         .buf = &addr,
 275                 },
 276                 {
 277                         .addr = intel_sdvo->slave_addr,
 278                         .flags = I2C_M_RD,
 279                         .len = 1,
 280                         .buf = ch,
 281                 }
 282         };
 283         int ret;
 284
 285         if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
 286                 return true;
 287
 288         DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
 289         return false;
 290 }
 291
 292 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
 293 /** Mapping of command numbers to names, for debug output */
 294 static const struct _sdvo_cmd_name {
 295         u8 cmd;
 296         const char *name;
 297 } sdvo_cmd_names[] = {
 298         SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
 299         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
 300         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
 301         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
 302         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
 303         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
 304         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
 305         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
 306         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
 307         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
 308         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
 309         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
 310         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
 311         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
 312         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
 313         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
 314         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
 315         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 316         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
 317         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 318         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
 319         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
 320         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
 321         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
 322         SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
 323         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
 324         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
 325         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
 326         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
 327         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
 328         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
 329         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
 330         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
 331         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
 332         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
 333         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
 334         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
 335         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
 336         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
 337         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
 338         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
 339         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
 340         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
 341
 342         /* Add the op code for SDVO enhancements */
 343         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
 344         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
 345         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
 346         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
 347         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
 348         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
 349         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
 350         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
 351         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
 352         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
 353         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
 354         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
 355         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
 356         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
 357         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
 358         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
 359         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
 360         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
 361         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
 362         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
 363         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
 364         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
 365         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
 366         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
 367         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
 368         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
 369         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
 370         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
 371         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
 372         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
 373         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
 374         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
 375         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
 376         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
 377         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
 378         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
 379         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
 380         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
 381         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
 382         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
 383         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
 384         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
 385         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
 386         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
 387
 388         /* HDMI op code */
 389         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
 390         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
 391         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
 392         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
 393         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
 394         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
 395         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
 396         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
 397         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
 398         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
 399         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
 400         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
 401         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
 402         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
 403         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
 404         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
 405         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
 406         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
 407         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
 408         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
 409 };
 410
 411 #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
 412
 413 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
 414                                    const void *args, int args_len)
 415 {
 416         int i, pos = 0;
 417 #define BUF_LEN 256
 418         char buffer[BUF_LEN];
 419
 420 #define BUF_PRINT(args...) \
 421         pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
 422
 423
 424         for (i = 0; i < args_len; i++) {
 425                 BUF_PRINT("%02X ", ((u8 *)args)[i]);
 426         }
 427         for (; i < 8; i++) {
 428                 BUF_PRINT("   ");
 429         }
 430         for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
 431                 if (cmd == sdvo_cmd_names[i].cmd) {
 432                         BUF_PRINT("(%s)", sdvo_cmd_names[i].name);
 433                         break;
 434                 }
 435         }
 436         if (i == ARRAY_SIZE(sdvo_cmd_names)) {
 437                 BUF_PRINT("(%02X)", cmd);
 438         }
 439         BUG_ON(pos >= BUF_LEN - 1);
 440 #undef BUF_PRINT
 441 #undef BUF_LEN
 442
 443         DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(intel_sdvo), cmd, buffer);
 444 }
 445
 446 static const char *cmd_status_names[] = {
 447         "Power on",
 448         "Success",
 449         "Not supported",
 450         "Invalid arg",
 451         "Pending",
 452         "Target not specified",
 453         "Scaling not supported"
 454 };
 455
 456 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
 457                                  const void *args, int args_len)
 458 {
 459         u8 *buf, status;
 460         struct i2c_msg *msgs;
 461         int i, ret = true;
 462
 463         /* Would be simpler to allocate both in one go ? */
 464         buf = kzalloc(args_len * 2 + 2, GFP_KERNEL);
 465         if (!buf)
 466                 return false;
 467
 468         msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
 469         if (!msgs) {
 470                 kfree(buf);
 471                 return false;
 472         }
 473
 474         intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
 475
 476         for (i = 0; i < args_len; i++) {
 477                 msgs[i].addr = intel_sdvo->slave_addr;
 478                 msgs[i].flags = 0;
 479                 msgs[i].len = 2;
 480                 msgs[i].buf = buf + 2 *i;
 481                 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
 482                 buf[2*i + 1] = ((u8*)args)[i];
 483         }
 484         msgs[i].addr = intel_sdvo->slave_addr;
 485         msgs[i].flags = 0;
 486         msgs[i].len = 2;
 487         msgs[i].buf = buf + 2*i;
 488         buf[2*i + 0] = SDVO_I2C_OPCODE;
 489         buf[2*i + 1] = cmd;
 490
 491         /* the following two are to read the response */
 492         status = SDVO_I2C_CMD_STATUS;
 493         msgs[i+1].addr = intel_sdvo->slave_addr;
 494         msgs[i+1].flags = 0;
 495         msgs[i+1].len = 1;
 496         msgs[i+1].buf = &status;
 497
 498         msgs[i+2].addr = intel_sdvo->slave_addr;
 499         msgs[i+2].flags = I2C_M_RD;
 500         msgs[i+2].len = 1;
 501         msgs[i+2].buf = &status;
 502
 503         ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
 504         if (ret < 0) {
 505                 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
 506                 ret = false;
 507                 goto out;
 508         }
 509         if (ret != i+3) {
 510                 /* failure in I2C transfer */
 511                 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
 512                 ret = false;
 513         }
 514
 515 out:
 516         kfree(msgs);
 517         kfree(buf);
 518         return ret;
 519 }
 520
 521 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
 522                                      void *response, int response_len)
 523 {
 524         u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
 525         u8 status;
 526         int i, pos = 0;
 527 #define BUF_LEN 256
 528         char buffer[BUF_LEN];
 529
 530
 531         /*
 532          * The documentation states that all commands will be
 533          * processed within 15µs, and that we need only poll
 534          * the status byte a maximum of 3 times in order for the
 535          * command to be complete.
 536          *
 537          * Check 5 times in case the hardware failed to read the docs.
 538          *
 539          * Also beware that the first response by many devices is to
 540          * reply PENDING and stall for time. TVs are notorious for
 541          * requiring longer than specified to complete their replies.
 542          * Originally (in the DDX long ago), the delay was only ever 15ms
 543          * with an additional delay of 30ms applied for TVs added later after
 544          * many experiments. To accommodate both sets of delays, we do a
 545          * sequence of slow checks if the device is falling behind and fails
 546          * to reply within 5*15µs.
 547          */
 548         if (!intel_sdvo_read_byte(intel_sdvo,
 549                                   SDVO_I2C_CMD_STATUS,
 550                                   &status))
 551                 goto log_fail;
 552
 553         while ((status == SDVO_CMD_STATUS_PENDING ||
 554                 status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && --retry) {
 555                 if (retry < 10)
 556                         msleep(15);
 557                 else
 558                         udelay(15);
 559
 560                 if (!intel_sdvo_read_byte(intel_sdvo,
 561                                           SDVO_I2C_CMD_STATUS,
 562                                           &status))
 563                         goto log_fail;
 564         }
 565
 566 #define BUF_PRINT(args...) \
 567         pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
 568
 569         if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
 570                 BUF_PRINT("(%s)", cmd_status_names[status]);
 571         else
 572                 BUF_PRINT("(??? %d)", status);
 573
 574         if (status != SDVO_CMD_STATUS_SUCCESS)
 575                 goto log_fail;
 576
 577         /* Read the command response */
 578         for (i = 0; i < response_len; i++) {
 579                 if (!intel_sdvo_read_byte(intel_sdvo,
 580                                           SDVO_I2C_RETURN_0 + i,
 581                                           &((u8 *)response)[i]))
 582                         goto log_fail;
 583                 BUF_PRINT(" %02X", ((u8 *)response)[i]);
 584         }
 585         BUG_ON(pos >= BUF_LEN - 1);
 586 #undef BUF_PRINT
 587 #undef BUF_LEN
 588
 589         DRM_DEBUG_KMS("%s: R: %s\n", SDVO_NAME(intel_sdvo), buffer);
 590         return true;
 591
 592 log_fail:
 593         DRM_DEBUG_KMS("%s: R: ... failed\n", SDVO_NAME(intel_sdvo));
 594         return false;
 595 }
 596
 597 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
 598 {
 599         if (mode->clock >= 100000)
 600                 return 1;
 601         else if (mode->clock >= 50000)
 602                 return 2;
 603         else
 604                 return 4;
 605 }
 606
 607 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
 608                                               u8 ddc_bus)
 609 {
 610         /* This must be the immediately preceding write before the i2c xfer */
 611         return intel_sdvo_write_cmd(intel_sdvo,
 612                                     SDVO_CMD_SET_CONTROL_BUS_SWITCH,
 613                                     &ddc_bus, 1);
 614 }
 615
 616 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
 617 {
 618         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
 619                 return false;
 620
 621         return intel_sdvo_read_response(intel_sdvo, NULL, 0);
 622 }
 623
 624 static bool
 625 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
 626 {
 627         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
 628                 return false;
 629
 630         return intel_sdvo_read_response(intel_sdvo, value, len);
 631 }
 632
 633 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
 634 {
 635         struct intel_sdvo_set_target_input_args targets = {0};
 636         return intel_sdvo_set_value(intel_sdvo,
 637                                     SDVO_CMD_SET_TARGET_INPUT,
 638                                     &targets, sizeof(targets));
 639 }
 640
 641 /**
 642  * Return whether each input is trained.
 643  *
 644  * This function is making an assumption about the layout of the response,
 645  * which should be checked against the docs.
 646  */
 647 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
 648 {
 649         struct intel_sdvo_get_trained_inputs_response response;
 650
 651         BUILD_BUG_ON(sizeof(response) != 1);
 652         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
 653                                   &response, sizeof(response)))
 654                 return false;
 655
 656         *input_1 = response.input0_trained;
 657         *input_2 = response.input1_trained;
 658         return true;
 659 }
 660
 661 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
 662                                           u16 outputs)
 663 {
 664         return intel_sdvo_set_value(intel_sdvo,
 665                                     SDVO_CMD_SET_ACTIVE_OUTPUTS,
 666                                     &outputs, sizeof(outputs));
 667 }
 668
 669 static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
 670                                           u16 *outputs)
 671 {
 672         return intel_sdvo_get_value(intel_sdvo,
 673                                     SDVO_CMD_GET_ACTIVE_OUTPUTS,
 674                                     outputs, sizeof(*outputs));
 675 }
 676
 677 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
 678                                                int mode)
 679 {
 680         u8 state = SDVO_ENCODER_STATE_ON;
 681
 682         switch (mode) {
 683         case DRM_MODE_DPMS_ON:
 684                 state = SDVO_ENCODER_STATE_ON;
 685                 break;
 686         case DRM_MODE_DPMS_STANDBY:
 687                 state = SDVO_ENCODER_STATE_STANDBY;
 688                 break;
 689         case DRM_MODE_DPMS_SUSPEND:
 690                 state = SDVO_ENCODER_STATE_SUSPEND;
 691                 break;
 692         case DRM_MODE_DPMS_OFF:
 693                 state = SDVO_ENCODER_STATE_OFF;
 694                 break;
 695         }
 696
 697         return intel_sdvo_set_value(intel_sdvo,
 698                                     SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
 699 }
 700
 701 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
 702                                                    int *clock_min,
 703                                                    int *clock_max)
 704 {
 705         struct intel_sdvo_pixel_clock_range clocks;
 706
 707         BUILD_BUG_ON(sizeof(clocks) != 4);
 708         if (!intel_sdvo_get_value(intel_sdvo,
 709                                   SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
 710                                   &clocks, sizeof(clocks)))
 711                 return false;
 712
 713         /* Convert the values from units of 10 kHz to kHz. */
 714         *clock_min = clocks.min * 10;
 715         *clock_max = clocks.max * 10;
 716         return true;
 717 }
 718
 719 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
 720                                          u16 outputs)
 721 {
 722         return intel_sdvo_set_value(intel_sdvo,
 723                                     SDVO_CMD_SET_TARGET_OUTPUT,
 724                                     &outputs, sizeof(outputs));
 725 }
 726
 727 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 728                                   struct intel_sdvo_dtd *dtd)
 729 {
 730         return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 731                 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 732 }
 733
 734 static bool intel_sdvo_get_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 735                                   struct intel_sdvo_dtd *dtd)
 736 {
 737         return intel_sdvo_get_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 738                 intel_sdvo_get_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 739 }
 740
 741 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
 742                                          struct intel_sdvo_dtd *dtd)
 743 {
 744         return intel_sdvo_set_timing(intel_sdvo,
 745                                      SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
 746 }
 747
 748 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
 749                                          struct intel_sdvo_dtd *dtd)
 750 {
 751         return intel_sdvo_set_timing(intel_sdvo,
 752                                      SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
 753 }
 754
 755 static bool intel_sdvo_get_input_timing(struct intel_sdvo *intel_sdvo,
 756                                         struct intel_sdvo_dtd *dtd)
 757 {
 758         return intel_sdvo_get_timing(intel_sdvo,
 759                                      SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd);
 760 }
 761
 762 static bool
 763 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 764                                          uint16_t clock,
 765                                          uint16_t width,
 766                                          uint16_t height)
 767 {
 768         struct intel_sdvo_preferred_input_timing_args args;
 769
 770         memset(&args, 0, sizeof(args));
 771         args.clock = clock;
 772         args.width = width;
 773         args.height = height;
 774         args.interlace = 0;
 775
 776         if (intel_sdvo->is_lvds &&
 777            (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
 778             intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
 779                 args.scaled = 1;
 780
 781         return intel_sdvo_set_value(intel_sdvo,
 782                                     SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
 783                                     &args, sizeof(args));
 784 }
 785
 786 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 787                                                   struct intel_sdvo_dtd *dtd)
 788 {
 789         BUILD_BUG_ON(sizeof(dtd->part1) != 8);
 790         BUILD_BUG_ON(sizeof(dtd->part2) != 8);
 791         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
 792                                     &dtd->part1, sizeof(dtd->part1)) &&
 793                 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
 794                                      &dtd->part2, sizeof(dtd->part2));
 795 }
 796
 797 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
 798 {
 799         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
 800 }
 801
 802 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
 803                                          const struct drm_display_mode *mode)
 804 {
 805         uint16_t width, height;
 806         uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
 807         uint16_t h_sync_offset, v_sync_offset;
 808         int mode_clock;
 809
 810         memset(dtd, 0, sizeof(*dtd));
 811
 812         width = mode->hdisplay;
 813         height = mode->vdisplay;
 814
 815         /* do some mode translations */
 816         h_blank_len = mode->htotal - mode->hdisplay;
 817         h_sync_len = mode->hsync_end - mode->hsync_start;
 818
 819         v_blank_len = mode->vtotal - mode->vdisplay;
 820         v_sync_len = mode->vsync_end - mode->vsync_start;
 821
 822         h_sync_offset = mode->hsync_start - mode->hdisplay;
 823         v_sync_offset = mode->vsync_start - mode->vdisplay;
 824
 825         mode_clock = mode->clock;
 826         mode_clock /= 10;
 827         dtd->part1.clock = mode_clock;
 828
 829         dtd->part1.h_active = width & 0xff;
 830         dtd->part1.h_blank = h_blank_len & 0xff;
 831         dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
 832                 ((h_blank_len >> 8) & 0xf);
 833         dtd->part1.v_active = height & 0xff;
 834         dtd->part1.v_blank = v_blank_len & 0xff;
 835         dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
 836                 ((v_blank_len >> 8) & 0xf);
 837
 838         dtd->part2.h_sync_off = h_sync_offset & 0xff;
 839         dtd->part2.h_sync_width = h_sync_len & 0xff;
 840         dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
 841                 (v_sync_len & 0xf);
 842         dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
 843                 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
 844                 ((v_sync_len & 0x30) >> 4);
 845
 846         dtd->part2.dtd_flags = 0x18;
 847         if (mode->flags & DRM_MODE_FLAG_INTERLACE)
 848                 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
 849         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
 850                 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
 851         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 852                 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
 853
 854         dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
 855 }
 856
 857 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode *pmode,
 858                                          const struct intel_sdvo_dtd *dtd)
 859 {
 860         struct drm_display_mode mode = {};
 861
 862         mode.hdisplay = dtd->part1.h_active;
 863         mode.hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
 864         mode.hsync_start = mode.hdisplay + dtd->part2.h_sync_off;
 865         mode.hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
 866         mode.hsync_end = mode.hsync_start + dtd->part2.h_sync_width;
 867         mode.hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
 868         mode.htotal = mode.hdisplay + dtd->part1.h_blank;
 869         mode.htotal += (dtd->part1.h_high & 0xf) << 8;
 870
 871         mode.vdisplay = dtd->part1.v_active;
 872         mode.vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
 873         mode.vsync_start = mode.vdisplay;
 874         mode.vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
 875         mode.vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
 876         mode.vsync_start += dtd->part2.v_sync_off_high & 0xc0;
 877         mode.vsync_end = mode.vsync_start +
 878                 (dtd->part2.v_sync_off_width & 0xf);
 879         mode.vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
 880         mode.vtotal = mode.vdisplay + dtd->part1.v_blank;
 881         mode.vtotal += (dtd->part1.v_high & 0xf) << 8;
 882
 883         mode.clock = dtd->part1.clock * 10;
 884
 885         if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
 886                 mode.flags |= DRM_MODE_FLAG_INTERLACE;
 887         if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
 888                 mode.flags |= DRM_MODE_FLAG_PHSYNC;
 889         else
 890                 mode.flags |= DRM_MODE_FLAG_NHSYNC;
 891         if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
 892                 mode.flags |= DRM_MODE_FLAG_PVSYNC;
 893         else
 894                 mode.flags |= DRM_MODE_FLAG_NVSYNC;
 895
 896         drm_mode_set_crtcinfo(&mode, 0);
 897
 898         drm_mode_copy(pmode, &mode);
 899 }
 900
 901 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
 902 {
 903         struct intel_sdvo_encode encode;
 904
 905         BUILD_BUG_ON(sizeof(encode) != 2);
 906         return intel_sdvo_get_value(intel_sdvo,
 907                                   SDVO_CMD_GET_SUPP_ENCODE,
 908                                   &encode, sizeof(encode));
 909 }
 910
 911 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
 912                                   uint8_t mode)
 913 {
 914         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
 915 }
 916
 917 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
 918                                        uint8_t mode)
 919 {
 920         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
 921 }
 922
 923 #if 0
 924 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
 925 {
 926         int i, j;
 927         uint8_t set_buf_index[2];
 928         uint8_t av_split;
 929         uint8_t buf_size;
 930         uint8_t buf[48];
 931         uint8_t *pos;
 932
 933         intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
 934
 935         for (i = 0; i <= av_split; i++) {
 936                 set_buf_index[0] = i; set_buf_index[1] = 0;
 937                 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
 938                                      set_buf_index, 2);
 939                 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
 940                 intel_sdvo_read_response(encoder, &buf_size, 1);
 941
 942                 pos = buf;
 943                 for (j = 0; j <= buf_size; j += 8) {
 944                         intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
 945                                              NULL, 0);
 946                         intel_sdvo_read_response(encoder, pos, 8);
 947                         pos += 8;
 948                 }
 949         }
 950 }
 951 #endif
 952
 953 static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
 954                                        unsigned if_index, uint8_t tx_rate,
 955                                        uint8_t *data, unsigned length)
 956 {
 957         uint8_t set_buf_index[2] = { if_index, 0 };
 958         uint8_t hbuf_size, tmp[8];
 959         int i;
 960
 961         if (!intel_sdvo_set_value(intel_sdvo,
 962                                   SDVO_CMD_SET_HBUF_INDEX,
 963                                   set_buf_index, 2))
 964                 return false;
 965
 966         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
 967                                   &hbuf_size, 1))
 968                 return false;
 969
 970         /* Buffer size is 0 based, hooray! */
 971         hbuf_size++;
 972
 973         DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
 974                       if_index, length, hbuf_size);
 975
 976         for (i = 0; i < hbuf_size; i += 8) {
 977                 memset(tmp, 0, 8);
 978                 if (i < length)
 979                         memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
 980
 981                 if (!intel_sdvo_set_value(intel_sdvo,
 982                                           SDVO_CMD_SET_HBUF_DATA,
 983                                           tmp, 8))
 984                         return false;
 985         }
 986
 987         return intel_sdvo_set_value(intel_sdvo,
 988                                     SDVO_CMD_SET_HBUF_TXRATE,
 989                                     &tx_rate, 1);
 990 }
 991
 992 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
 993                                          const struct drm_display_mode *adjusted_mode)
 994 {
 995         uint8_t sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
 996         struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
 997         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 998         union hdmi_infoframe frame;
 999         int ret;
1000         ssize_t len;
1001
1002         ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi,
1003                                                        adjusted_mode);
1004         if (ret < 0) {
1005                 DRM_ERROR("couldn't fill AVI infoframe\n");
1006                 return false;
1007         }
1008
1009         if (intel_sdvo->rgb_quant_range_selectable) {
1010                 if (intel_crtc->config.limited_color_range)
1011                         frame.avi.quantization_range =
1012                                 HDMI_QUANTIZATION_RANGE_LIMITED;
1013                 else
1014                         frame.avi.quantization_range =
1015                                 HDMI_QUANTIZATION_RANGE_FULL;
1016         }
1017
1018         len = hdmi_infoframe_pack(&frame, sdvo_data, sizeof(sdvo_data));
1019         if (len < 0)
1020                 return false;
1021
1022         return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
1023                                           SDVO_HBUF_TX_VSYNC,
1024                                           sdvo_data, sizeof(sdvo_data));
1025 }
1026
1027 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
1028 {
1029         struct intel_sdvo_tv_format format;
1030         uint32_t format_map;
1031
1032         format_map = 1 << intel_sdvo->tv_format_index;
1033         memset(&format, 0, sizeof(format));
1034         memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
1035
1036         BUILD_BUG_ON(sizeof(format) != 6);
1037         return intel_sdvo_set_value(intel_sdvo,
1038                                     SDVO_CMD_SET_TV_FORMAT,
1039                                     &format, sizeof(format));
1040 }
1041
1042 static bool
1043 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
1044                                         const struct drm_display_mode *mode)
1045 {
1046         struct intel_sdvo_dtd output_dtd;
1047
1048         if (!intel_sdvo_set_target_output(intel_sdvo,
1049                                           intel_sdvo->attached_output))
1050                 return false;
1051
1052         intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1053         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1054                 return false;
1055
1056         return true;
1057 }
1058
1059 /* Asks the sdvo controller for the preferred input mode given the output mode.
1060  * Unfortunately we have to set up the full output mode to do that. */
1061 static bool
1062 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
1063                                     const struct drm_display_mode *mode,
1064                                     struct drm_display_mode *adjusted_mode)
1065 {
1066         struct intel_sdvo_dtd input_dtd;
1067
1068         /* Reset the input timing to the screen. Assume always input 0. */
1069         if (!intel_sdvo_set_target_input(intel_sdvo))
1070                 return false;
1071
1072         if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1073                                                       mode->clock / 10,
1074                                                       mode->hdisplay,
1075                                                       mode->vdisplay))
1076                 return false;
1077
1078         if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
1079                                                    &input_dtd))
1080                 return false;
1081
1082         intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
1083         intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
1084
1085         return true;
1086 }
1087
1088 static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_config *pipe_config)
1089 {
1090         unsigned dotclock = pipe_config->port_clock;
1091         struct dpll *clock = &pipe_config->dpll;
1092
1093         /* SDVO TV has fixed PLL values depend on its clock range,
1094            this mirrors vbios setting. */
1095         if (dotclock >= 100000 && dotclock < 140500) {
1096                 clock->p1 = 2;
1097                 clock->p2 = 10;
1098                 clock->n = 3;
1099                 clock->m1 = 16;
1100                 clock->m2 = 8;
1101         } else if (dotclock >= 140500 && dotclock <= 200000) {
1102                 clock->p1 = 1;
1103                 clock->p2 = 10;
1104                 clock->n = 6;
1105                 clock->m1 = 12;
1106                 clock->m2 = 8;
1107         } else {
1108                 WARN(1, "SDVO TV clock out of range: %i\n", dotclock);
1109         }
1110
1111         pipe_config->clock_set = true;
1112 }
1113
1114 static bool intel_sdvo_compute_config(struct intel_encoder *encoder,
1115                                       struct intel_crtc_config *pipe_config)
1116 {
1117         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1118         struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
1119         struct drm_display_mode *mode = &pipe_config->requested_mode;
1120
1121         DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n");
1122         pipe_config->pipe_bpp = 8*3;
1123
1124         if (HAS_PCH_SPLIT(encoder->base.dev))
1125                 pipe_config->has_pch_encoder = true;
1126
1127         /* We need to construct preferred input timings based on our
1128          * output timings.  To do that, we have to set the output
1129          * timings, even though this isn't really the right place in
1130          * the sequence to do it. Oh well.
1131          */
1132         if (intel_sdvo->is_tv) {
1133                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
1134                         return false;
1135
1136                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1137                                                            mode,
1138                                                            adjusted_mode);
1139                 pipe_config->sdvo_tv_clock = true;
1140         } else if (intel_sdvo->is_lvds) {
1141                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1142                                                              intel_sdvo->sdvo_lvds_fixed_mode))
1143                         return false;
1144
1145                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1146                                                            mode,
1147                                                            adjusted_mode);
1148         }
1149
1150         /* Make the CRTC code factor in the SDVO pixel multiplier.  The
1151          * SDVO device will factor out the multiplier during mode_set.
1152          */
1153         pipe_config->pixel_multiplier =
1154                 intel_sdvo_get_pixel_multiplier(adjusted_mode);
1155
1156         if (intel_sdvo->color_range_auto) {
1157                 /* See CEA-861-E - 5.1 Default Encoding Parameters */
1158                 /* FIXME: This bit is only valid when using TMDS encoding and 8
1159                  * bit per color mode. */
1160                 if (intel_sdvo->has_hdmi_monitor &&
1161                     drm_match_cea_mode(adjusted_mode) > 1)
1162                         intel_sdvo->color_range = HDMI_COLOR_RANGE_16_235;
1163                 else
1164                         intel_sdvo->color_range = 0;
1165         }
1166
1167         if (intel_sdvo->color_range)
1168                 pipe_config->limited_color_range = true;
1169
1170         /* Clock computation needs to happen after pixel multiplier. */
1171         if (intel_sdvo->is_tv)
1172                 i9xx_adjust_sdvo_tv_clock(pipe_config);
1173
1174         return true;
1175 }
1176
1177 static void intel_sdvo_mode_set(struct intel_encoder *intel_encoder)
1178 {
1179         struct drm_device *dev = intel_encoder->base.dev;
1180         struct drm_i915_private *dev_priv = dev->dev_private;
1181         struct intel_crtc *crtc = to_intel_crtc(intel_encoder->base.crtc);
1182         struct drm_display_mode *adjusted_mode =
1183                 &crtc->config.adjusted_mode;
1184         struct drm_display_mode *mode = &crtc->config.requested_mode;
1185         struct intel_sdvo *intel_sdvo = to_sdvo(intel_encoder);
1186         u32 sdvox;
1187         struct intel_sdvo_in_out_map in_out;
1188         struct intel_sdvo_dtd input_dtd, output_dtd;
1189         int rate;
1190
1191         if (!mode)
1192                 return;
1193
1194         /* First, set the input mapping for the first input to our controlled
1195          * output. This is only correct if we're a single-input device, in
1196          * which case the first input is the output from the appropriate SDVO
1197          * channel on the motherboard.  In a two-input device, the first input
1198          * will be SDVOB and the second SDVOC.
1199          */
1200         in_out.in0 = intel_sdvo->attached_output;
1201         in_out.in1 = 0;
1202
1203         intel_sdvo_set_value(intel_sdvo,
1204                              SDVO_CMD_SET_IN_OUT_MAP,
1205                              &in_out, sizeof(in_out));
1206
1207         /* Set the output timings to the screen */
1208         if (!intel_sdvo_set_target_output(intel_sdvo,
1209                                           intel_sdvo->attached_output))
1210                 return;
1211
1212         /* lvds has a special fixed output timing. */
1213         if (intel_sdvo->is_lvds)
1214                 intel_sdvo_get_dtd_from_mode(&output_dtd,
1215                                              intel_sdvo->sdvo_lvds_fixed_mode);
1216         else
1217                 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1218         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1219                 DRM_INFO("Setting output timings on %s failed\n",
1220                          SDVO_NAME(intel_sdvo));
1221
1222         /* Set the input timing to the screen. Assume always input 0. */
1223         if (!intel_sdvo_set_target_input(intel_sdvo))
1224                 return;
1225
1226         if (intel_sdvo->has_hdmi_monitor) {
1227                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1228                 intel_sdvo_set_colorimetry(intel_sdvo,
1229                                            SDVO_COLORIMETRY_RGB256);
1230                 intel_sdvo_set_avi_infoframe(intel_sdvo, adjusted_mode);
1231         } else
1232                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1233
1234         if (intel_sdvo->is_tv &&
1235             !intel_sdvo_set_tv_format(intel_sdvo))
1236                 return;
1237
1238         intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1239
1240         if (intel_sdvo->is_tv || intel_sdvo->is_lvds)
1241                 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
1242         if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1243                 DRM_INFO("Setting input timings on %s failed\n",
1244                          SDVO_NAME(intel_sdvo));
1245
1246         switch (crtc->config.pixel_multiplier) {
1247         default:
1248                 WARN(1, "unknown pixel mutlipler specified\n");
1249         case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1250         case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1251         case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1252         }
1253         if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1254                 return;
1255
1256         /* Set the SDVO control regs. */
1257         if (INTEL_INFO(dev)->gen >= 4) {
1258                 /* The real mode polarity is set by the SDVO commands, using
1259                  * struct intel_sdvo_dtd. */
1260                 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1261                 if (!HAS_PCH_SPLIT(dev) && intel_sdvo->is_hdmi)
1262                         sdvox |= intel_sdvo->color_range;
1263                 if (INTEL_INFO(dev)->gen < 5)
1264                         sdvox |= SDVO_BORDER_ENABLE;
1265         } else {
1266                 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1267                 switch (intel_sdvo->sdvo_reg) {
1268                 case GEN3_SDVOB:
1269                         sdvox &= SDVOB_PRESERVE_MASK;
1270                         break;
1271                 case GEN3_SDVOC:
1272                         sdvox &= SDVOC_PRESERVE_MASK;
1273                         break;
1274                 }
1275                 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1276         }
1277
1278         if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
1279                 sdvox |= SDVO_PIPE_SEL_CPT(crtc->pipe);
1280         else
1281                 sdvox |= SDVO_PIPE_SEL(crtc->pipe);
1282
1283         if (intel_sdvo->has_hdmi_audio)
1284                 sdvox |= SDVO_AUDIO_ENABLE;
1285
1286         if (INTEL_INFO(dev)->gen >= 4) {
1287                 /* done in crtc_mode_set as the dpll_md reg must be written early */
1288         } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1289                 /* done in crtc_mode_set as it lives inside the dpll register */
1290         } else {
1291                 sdvox |= (crtc->config.pixel_multiplier - 1)
1292                         << SDVO_PORT_MULTIPLY_SHIFT;
1293         }
1294
1295         if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1296             INTEL_INFO(dev)->gen < 5)
1297                 sdvox |= SDVO_STALL_SELECT;
1298         intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1299 }
1300
1301 static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
1302 {
1303         struct intel_sdvo_connector *intel_sdvo_connector =
1304                 to_intel_sdvo_connector(&connector->base);
1305         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
1306         u16 active_outputs = 0;
1307
1308         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1309
1310         if (active_outputs & intel_sdvo_connector->output_flag)
1311                 return true;
1312         else
1313                 return false;
1314 }
1315
1316 static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
1317                                     enum pipe *pipe)
1318 {
1319         struct drm_device *dev = encoder->base.dev;
1320         struct drm_i915_private *dev_priv = dev->dev_private;
1321         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1322         u16 active_outputs = 0;
1323         u32 tmp;
1324
1325         tmp = I915_READ(intel_sdvo->sdvo_reg);
1326         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1327
1328         if (!(tmp & SDVO_ENABLE) && (active_outputs == 0))
1329                 return false;
1330
1331         if (HAS_PCH_CPT(dev))
1332                 *pipe = PORT_TO_PIPE_CPT(tmp);
1333         else
1334                 *pipe = PORT_TO_PIPE(tmp);
1335
1336         return true;
1337 }
1338
1339 static void intel_sdvo_get_config(struct intel_encoder *encoder,
1340                                   struct intel_crtc_config *pipe_config)
1341 {
1342         struct drm_device *dev = encoder->base.dev;
1343         struct drm_i915_private *dev_priv = dev->dev_private;
1344         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1345         struct intel_sdvo_dtd dtd;
1346         int encoder_pixel_multiplier = 0;
1347         int dotclock;
1348         u32 flags = 0, sdvox;
1349         u8 val;
1350         bool ret;
1351
1352         ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd);
1353         if (!ret) {
1354                 /* Some sdvo encoders are not spec compliant and don't
1355                  * implement the mandatory get_timings function. */
1356                 DRM_DEBUG_DRIVER("failed to retrieve SDVO DTD\n");
1357                 pipe_config->quirks |= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS;
1358         } else {
1359                 if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
1360                         flags |= DRM_MODE_FLAG_PHSYNC;
1361                 else
1362                         flags |= DRM_MODE_FLAG_NHSYNC;
1363
1364                 if (dtd.part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
1365                         flags |= DRM_MODE_FLAG_PVSYNC;
1366                 else
1367                         flags |= DRM_MODE_FLAG_NVSYNC;
1368         }
1369
1370         pipe_config->adjusted_mode.flags |= flags;
1371
1372         /*
1373          * pixel multiplier readout is tricky: Only on i915g/gm it is stored in
1374          * the sdvo port register, on all other platforms it is part of the dpll
1375          * state. Since the general pipe state readout happens before the
1376          * encoder->get_config we so already have a valid pixel multplier on all
1377          * other platfroms.
1378          */
1379         if (IS_I915G(dev) || IS_I915GM(dev)) {
1380                 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1381                 pipe_config->pixel_multiplier =
1382                         ((sdvox & SDVO_PORT_MULTIPLY_MASK)
1383                          >> SDVO_PORT_MULTIPLY_SHIFT) + 1;
1384         }
1385
1386         dotclock = pipe_config->port_clock / pipe_config->pixel_multiplier;
1387
1388         if (HAS_PCH_SPLIT(dev))
1389                 ironlake_check_encoder_dotclock(pipe_config, dotclock);
1390
1391         pipe_config->adjusted_mode.crtc_clock = dotclock;
1392
1393         /* Cross check the port pixel multiplier with the sdvo encoder state. */
1394         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_CLOCK_RATE_MULT,
1395                                  &val, 1)) {
1396                 switch (val) {
1397                 case SDVO_CLOCK_RATE_MULT_1X:
1398                         encoder_pixel_multiplier = 1;
1399                         break;
1400                 case SDVO_CLOCK_RATE_MULT_2X:
1401                         encoder_pixel_multiplier = 2;
1402                         break;
1403                 case SDVO_CLOCK_RATE_MULT_4X:
1404                         encoder_pixel_multiplier = 4;
1405                         break;
1406                 }
1407         }
1408
1409         WARN(encoder_pixel_multiplier != pipe_config->pixel_multiplier,
1410              "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
1411              pipe_config->pixel_multiplier, encoder_pixel_multiplier);
1412 }
1413
1414 static void intel_disable_sdvo(struct intel_encoder *encoder)
1415 {
1416         struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
1417         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1418         u32 temp;
1419
1420         intel_sdvo_set_active_outputs(intel_sdvo, 0);
1421         if (0)
1422                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1423                                                    DRM_MODE_DPMS_OFF);
1424
1425         temp = I915_READ(intel_sdvo->sdvo_reg);
1426         if ((temp & SDVO_ENABLE) != 0) {
1427                 /* HW workaround for IBX, we need to move the port to
1428                  * transcoder A before disabling it. */
1429                 if (HAS_PCH_IBX(encoder->base.dev)) {
1430                         struct drm_crtc *crtc = encoder->base.crtc;
1431                         int pipe = crtc ? to_intel_crtc(crtc)->pipe : -1;
1432
1433                         if (temp & SDVO_PIPE_B_SELECT) {
1434                                 temp &= ~SDVO_PIPE_B_SELECT;
1435                                 I915_WRITE(intel_sdvo->sdvo_reg, temp);
1436                                 POSTING_READ(intel_sdvo->sdvo_reg);
1437
1438                                 /* Again we need to write this twice. */
1439                                 I915_WRITE(intel_sdvo->sdvo_reg, temp);
1440                                 POSTING_READ(intel_sdvo->sdvo_reg);
1441
1442                                 /* Transcoder selection bits only update
1443                                  * effectively on vblank. */
1444                                 if (crtc)
1445                                         intel_wait_for_vblank(encoder->base.dev, pipe);
1446                                 else
1447                                         msleep(50);
1448                         }
1449                 }
1450
1451                 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1452         }
1453 }
1454
1455 static void intel_enable_sdvo(struct intel_encoder *encoder)
1456 {
1457         struct drm_device *dev = encoder->base.dev;
1458         struct drm_i915_private *dev_priv = dev->dev_private;
1459         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1460         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
1461         u32 temp;
1462         bool input1, input2;
1463         int i;
1464         u8 status;
1465
1466         temp = I915_READ(intel_sdvo->sdvo_reg);
1467         if ((temp & SDVO_ENABLE) == 0) {
1468                 /* HW workaround for IBX, we need to move the port
1469                  * to transcoder A before disabling it, so restore it here. */
1470                 if (HAS_PCH_IBX(dev))
1471                         temp |= SDVO_PIPE_SEL(intel_crtc->pipe);
1472
1473                 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1474         }
1475         for (i = 0; i < 2; i++)
1476                 intel_wait_for_vblank(dev, intel_crtc->pipe);
1477
1478         status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1479         /* Warn if the device reported failure to sync.
1480          * A lot of SDVO devices fail to notify of sync, but it's
1481          * a given it the status is a success, we succeeded.
1482          */
1483         if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1484                 DRM_DEBUG_KMS("First %s output reported failure to "
1485                                 "sync\n", SDVO_NAME(intel_sdvo));
1486         }
1487
1488         if (0)
1489                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1490                                                    DRM_MODE_DPMS_ON);
1491         intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1492 }
1493
1494 /* Special dpms function to support cloning between dvo/sdvo/crt. */
1495 static void intel_sdvo_dpms(struct drm_connector *connector, int mode)
1496 {
1497         struct drm_crtc *crtc;
1498         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1499
1500         /* dvo supports only 2 dpms states. */
1501         if (mode != DRM_MODE_DPMS_ON)
1502                 mode = DRM_MODE_DPMS_OFF;
1503
1504         if (mode == connector->dpms)
1505                 return;
1506
1507         connector->dpms = mode;
1508
1509         /* Only need to change hw state when actually enabled */
1510         crtc = intel_sdvo->base.base.crtc;
1511         if (!crtc) {
1512                 intel_sdvo->base.connectors_active = false;
1513                 return;
1514         }
1515
1516         /* We set active outputs manually below in case pipe dpms doesn't change
1517          * due to cloning. */
1518         if (mode != DRM_MODE_DPMS_ON) {
1519                 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1520                 if (0)
1521                         intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1522
1523                 intel_sdvo->base.connectors_active = false;
1524
1525                 intel_crtc_update_dpms(crtc);
1526         } else {
1527                 intel_sdvo->base.connectors_active = true;
1528
1529                 intel_crtc_update_dpms(crtc);
1530
1531                 if (0)
1532                         intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1533                 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1534         }
1535
1536         intel_modeset_check_state(connector->dev);
1537 }
1538
1539 static int intel_sdvo_mode_valid(struct drm_connector *connector,
1540                                  struct drm_display_mode *mode)
1541 {
1542         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1543
1544         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1545                 return MODE_NO_DBLESCAN;
1546
1547         if (intel_sdvo->pixel_clock_min > mode->clock)
1548                 return MODE_CLOCK_LOW;
1549
1550         if (intel_sdvo->pixel_clock_max < mode->clock)
1551                 return MODE_CLOCK_HIGH;
1552
1553         if (intel_sdvo->is_lvds) {
1554                 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1555                         return MODE_PANEL;
1556
1557                 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1558                         return MODE_PANEL;
1559         }
1560
1561         return MODE_OK;
1562 }
1563
1564 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1565 {
1566         BUILD_BUG_ON(sizeof(*caps) != 8);
1567         if (!intel_sdvo_get_value(intel_sdvo,
1568                                   SDVO_CMD_GET_DEVICE_CAPS,
1569                                   caps, sizeof(*caps)))
1570                 return false;
1571
1572         DRM_DEBUG_KMS("SDVO capabilities:\n"
1573                       "  vendor_id: %d\n"
1574                       "  device_id: %d\n"
1575                       "  device_rev_id: %d\n"
1576                       "  sdvo_version_major: %d\n"
1577                       "  sdvo_version_minor: %d\n"
1578                       "  sdvo_inputs_mask: %d\n"
1579                       "  smooth_scaling: %d\n"
1580                       "  sharp_scaling: %d\n"
1581                       "  up_scaling: %d\n"
1582                       "  down_scaling: %d\n"
1583                       "  stall_support: %d\n"
1584                       "  output_flags: %d\n",
1585                       caps->vendor_id,
1586                       caps->device_id,
1587                       caps->device_rev_id,
1588                       caps->sdvo_version_major,
1589                       caps->sdvo_version_minor,
1590                       caps->sdvo_inputs_mask,
1591                       caps->smooth_scaling,
1592                       caps->sharp_scaling,
1593                       caps->up_scaling,
1594                       caps->down_scaling,
1595                       caps->stall_support,
1596                       caps->output_flags);
1597
1598         return true;
1599 }
1600
1601 static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
1602 {
1603         struct drm_device *dev = intel_sdvo->base.base.dev;
1604         uint16_t hotplug;
1605
1606         /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1607          * on the line. */
1608         if (IS_I945G(dev) || IS_I945GM(dev))
1609                 return 0;
1610
1611         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1612                                         &hotplug, sizeof(hotplug)))
1613                 return 0;
1614
1615         return hotplug;
1616 }
1617
1618 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1619 {
1620         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1621
1622         intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1623                         &intel_sdvo->hotplug_active, 2);
1624 }
1625
1626 static bool
1627 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1628 {
1629         /* Is there more than one type of output? */
1630         return hweight16(intel_sdvo->caps.output_flags) > 1;
1631 }
1632
1633 static struct edid *
1634 intel_sdvo_get_edid(struct drm_connector *connector)
1635 {
1636         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1637         return drm_get_edid(connector, &sdvo->ddc);
1638 }
1639
1640 /* Mac mini hack -- use the same DDC as the analog connector */
1641 static struct edid *
1642 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1643 {
1644         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1645
1646         return drm_get_edid(connector,
1647                             intel_gmbus_get_adapter(dev_priv,
1648                                                     dev_priv->vbt.crt_ddc_pin));
1649 }
1650
1651 static enum drm_connector_status
1652 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1653 {
1654         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1655         enum drm_connector_status status;
1656         struct edid *edid;
1657
1658         edid = intel_sdvo_get_edid(connector);
1659
1660         if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1661                 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1662
1663                 /*
1664                  * Don't use the 1 as the argument of DDC bus switch to get
1665                  * the EDID. It is used for SDVO SPD ROM.
1666                  */
1667                 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1668                         intel_sdvo->ddc_bus = ddc;
1669                         edid = intel_sdvo_get_edid(connector);
1670                         if (edid)
1671                                 break;
1672                 }
1673                 /*
1674                  * If we found the EDID on the other bus,
1675                  * assume that is the correct DDC bus.
1676                  */
1677                 if (edid == NULL)
1678                         intel_sdvo->ddc_bus = saved_ddc;
1679         }
1680
1681         /*
1682          * When there is no edid and no monitor is connected with VGA
1683          * port, try to use the CRT ddc to read the EDID for DVI-connector.
1684          */
1685         if (edid == NULL)
1686                 edid = intel_sdvo_get_analog_edid(connector);
1687
1688         status = connector_status_unknown;
1689         if (edid != NULL) {
1690                 /* DDC bus is shared, match EDID to connector type */
1691                 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1692                         status = connector_status_connected;
1693                         if (intel_sdvo->is_hdmi) {
1694                                 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1695                                 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1696                                 intel_sdvo->rgb_quant_range_selectable =
1697                                         drm_rgb_quant_range_selectable(edid);
1698                         }
1699                 } else
1700                         status = connector_status_disconnected;
1701                 kfree(edid);
1702         }
1703
1704         if (status == connector_status_connected) {
1705                 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1706                 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
1707                         intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
1708         }
1709
1710         return status;
1711 }
1712
1713 static bool
1714 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1715                                   struct edid *edid)
1716 {
1717         bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1718         bool connector_is_digital = !!IS_DIGITAL(sdvo);
1719
1720         DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1721                       connector_is_digital, monitor_is_digital);
1722         return connector_is_digital == monitor_is_digital;
1723 }
1724
1725 static enum drm_connector_status
1726 intel_sdvo_detect(struct drm_connector *connector, bool force)
1727 {
1728         uint16_t response;
1729         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1730         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1731         enum drm_connector_status ret;
1732
1733         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1734                       connector->base.id, drm_get_connector_name(connector));
1735
1736         if (!intel_sdvo_get_value(intel_sdvo,
1737                                   SDVO_CMD_GET_ATTACHED_DISPLAYS,
1738                                   &response, 2))
1739                 return connector_status_unknown;
1740
1741         DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1742                       response & 0xff, response >> 8,
1743                       intel_sdvo_connector->output_flag);
1744
1745         if (response == 0)
1746                 return connector_status_disconnected;
1747
1748         intel_sdvo->attached_output = response;
1749
1750         intel_sdvo->has_hdmi_monitor = false;
1751         intel_sdvo->has_hdmi_audio = false;
1752         intel_sdvo->rgb_quant_range_selectable = false;
1753
1754         if ((intel_sdvo_connector->output_flag & response) == 0)
1755                 ret = connector_status_disconnected;
1756         else if (IS_TMDS(intel_sdvo_connector))
1757                 ret = intel_sdvo_tmds_sink_detect(connector);
1758         else {
1759                 struct edid *edid;
1760
1761                 /* if we have an edid check it matches the connection */
1762                 edid = intel_sdvo_get_edid(connector);
1763                 if (edid == NULL)
1764                         edid = intel_sdvo_get_analog_edid(connector);
1765                 if (edid != NULL) {
1766                         if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1767                                                               edid))
1768                                 ret = connector_status_connected;
1769                         else
1770                                 ret = connector_status_disconnected;
1771
1772                         kfree(edid);
1773                 } else
1774                         ret = connector_status_connected;
1775         }
1776
1777         /* May update encoder flag for like clock for SDVO TV, etc.*/
1778         if (ret == connector_status_connected) {
1779                 intel_sdvo->is_tv = false;
1780                 intel_sdvo->is_lvds = false;
1781
1782                 if (response & SDVO_TV_MASK)
1783                         intel_sdvo->is_tv = true;
1784                 if (response & SDVO_LVDS_MASK)
1785                         intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1786         }
1787
1788         return ret;
1789 }
1790
1791 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1792 {
1793         struct edid *edid;
1794
1795         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1796                       connector->base.id, drm_get_connector_name(connector));
1797
1798         /* set the bus switch and get the modes */
1799         edid = intel_sdvo_get_edid(connector);
1800
1801         /*
1802          * Mac mini hack.  On this device, the DVI-I connector shares one DDC
1803          * link between analog and digital outputs. So, if the regular SDVO
1804          * DDC fails, check to see if the analog output is disconnected, in
1805          * which case we'll look there for the digital DDC data.
1806          */
1807         if (edid == NULL)
1808                 edid = intel_sdvo_get_analog_edid(connector);
1809
1810         if (edid != NULL) {
1811                 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1812                                                       edid)) {
1813                         drm_mode_connector_update_edid_property(connector, edid);
1814                         drm_add_edid_modes(connector, edid);
1815                 }
1816
1817                 kfree(edid);
1818         }
1819 }
1820
1821 /*
1822  * Set of SDVO TV modes.
1823  * Note!  This is in reply order (see loop in get_tv_modes).
1824  * XXX: all 60Hz refresh?
1825  */
1826 static const struct drm_display_mode sdvo_tv_modes[] = {
1827         { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1828                    416, 0, 200, 201, 232, 233, 0,
1829                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1830         { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1831                    416, 0, 240, 241, 272, 273, 0,
1832                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1833         { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1834                    496, 0, 300, 301, 332, 333, 0,
1835                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1836         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1837                    736, 0, 350, 351, 382, 383, 0,
1838                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1839         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1840                    736, 0, 400, 401, 432, 433, 0,
1841                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1842         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1843                    736, 0, 480, 481, 512, 513, 0,
1844                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1845         { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1846                    800, 0, 480, 481, 512, 513, 0,
1847                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1848         { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1849                    800, 0, 576, 577, 608, 609, 0,
1850                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1851         { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1852                    816, 0, 350, 351, 382, 383, 0,
1853                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1854         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1855                    816, 0, 400, 401, 432, 433, 0,
1856                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1857         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1858                    816, 0, 480, 481, 512, 513, 0,
1859                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1860         { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1861                    816, 0, 540, 541, 572, 573, 0,
1862                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1863         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1864                    816, 0, 576, 577, 608, 609, 0,
1865                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1866         { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1867                    864, 0, 576, 577, 608, 609, 0,
1868                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1869         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1870                    896, 0, 600, 601, 632, 633, 0,
1871                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1872         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1873                    928, 0, 624, 625, 656, 657, 0,
1874                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1875         { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1876                    1016, 0, 766, 767, 798, 799, 0,
1877                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1878         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1879                    1120, 0, 768, 769, 800, 801, 0,
1880                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1881         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1882                    1376, 0, 1024, 1025, 1056, 1057, 0,
1883                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1884 };
1885
1886 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1887 {
1888         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1889         struct intel_sdvo_sdtv_resolution_request tv_res;
1890         uint32_t reply = 0, format_map = 0;
1891         int i;
1892
1893         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1894                       connector->base.id, drm_get_connector_name(connector));
1895
1896         /* Read the list of supported input resolutions for the selected TV
1897          * format.
1898          */
1899         format_map = 1 << intel_sdvo->tv_format_index;
1900         memcpy(&tv_res, &format_map,
1901                min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1902
1903         if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1904                 return;
1905
1906         BUILD_BUG_ON(sizeof(tv_res) != 3);
1907         if (!intel_sdvo_write_cmd(intel_sdvo,
1908                                   SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1909                                   &tv_res, sizeof(tv_res)))
1910                 return;
1911         if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1912                 return;
1913
1914         for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1915                 if (reply & (1 << i)) {
1916                         struct drm_display_mode *nmode;
1917                         nmode = drm_mode_duplicate(connector->dev,
1918                                                    &sdvo_tv_modes[i]);
1919                         if (nmode)
1920                                 drm_mode_probed_add(connector, nmode);
1921                 }
1922 }
1923
1924 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1925 {
1926         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1927         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1928         struct drm_display_mode *newmode;
1929
1930         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1931                       connector->base.id, drm_get_connector_name(connector));
1932
1933         /*
1934          * Fetch modes from VBT. For SDVO prefer the VBT mode since some
1935          * SDVO->LVDS transcoders can't cope with the EDID mode.
1936          */
1937         if (dev_priv->vbt.sdvo_lvds_vbt_mode != NULL) {
1938                 newmode = drm_mode_duplicate(connector->dev,
1939                                              dev_priv->vbt.sdvo_lvds_vbt_mode);
1940                 if (newmode != NULL) {
1941                         /* Guarantee the mode is preferred */
1942                         newmode->type = (DRM_MODE_TYPE_PREFERRED |
1943                                          DRM_MODE_TYPE_DRIVER);
1944                         drm_mode_probed_add(connector, newmode);
1945                 }
1946         }
1947
1948         /*
1949          * Attempt to get the mode list from DDC.
1950          * Assume that the preferred modes are
1951          * arranged in priority order.
1952          */
1953         intel_ddc_get_modes(connector, &intel_sdvo->ddc);
1954
1955         list_for_each_entry(newmode, &connector->probed_modes, head) {
1956                 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1957                         intel_sdvo->sdvo_lvds_fixed_mode =
1958                                 drm_mode_duplicate(connector->dev, newmode);
1959
1960                         intel_sdvo->is_lvds = true;
1961                         break;
1962                 }
1963         }
1964 }
1965
1966 static int intel_sdvo_get_modes(struct drm_connector *connector)
1967 {
1968         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1969
1970         if (IS_TV(intel_sdvo_connector))
1971                 intel_sdvo_get_tv_modes(connector);
1972         else if (IS_LVDS(intel_sdvo_connector))
1973                 intel_sdvo_get_lvds_modes(connector);
1974         else
1975                 intel_sdvo_get_ddc_modes(connector);
1976
1977         return !list_empty(&connector->probed_modes);
1978 }
1979
1980 static void
1981 intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1982 {
1983         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1984         struct drm_device *dev = connector->dev;
1985
1986         if (intel_sdvo_connector->left)
1987                 drm_property_destroy(dev, intel_sdvo_connector->left);
1988         if (intel_sdvo_connector->right)
1989                 drm_property_destroy(dev, intel_sdvo_connector->right);
1990         if (intel_sdvo_connector->top)
1991                 drm_property_destroy(dev, intel_sdvo_connector->top);
1992         if (intel_sdvo_connector->bottom)
1993                 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1994         if (intel_sdvo_connector->hpos)
1995                 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1996         if (intel_sdvo_connector->vpos)
1997                 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1998         if (intel_sdvo_connector->saturation)
1999                 drm_property_destroy(dev, intel_sdvo_connector->saturation);
2000         if (intel_sdvo_connector->contrast)
2001                 drm_property_destroy(dev, intel_sdvo_connector->contrast);
2002         if (intel_sdvo_connector->hue)
2003                 drm_property_destroy(dev, intel_sdvo_connector->hue);
2004         if (intel_sdvo_connector->sharpness)
2005                 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
2006         if (intel_sdvo_connector->flicker_filter)
2007                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
2008         if (intel_sdvo_connector->flicker_filter_2d)
2009                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
2010         if (intel_sdvo_connector->flicker_filter_adaptive)
2011                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
2012         if (intel_sdvo_connector->tv_luma_filter)
2013                 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
2014         if (intel_sdvo_connector->tv_chroma_filter)
2015                 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
2016         if (intel_sdvo_connector->dot_crawl)
2017                 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
2018         if (intel_sdvo_connector->brightness)
2019                 drm_property_destroy(dev, intel_sdvo_connector->brightness);
2020 }
2021
2022 static void intel_sdvo_destroy(struct drm_connector *connector)
2023 {
2024         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2025
2026         if (intel_sdvo_connector->tv_format)
2027                 drm_property_destroy(connector->dev,
2028                                      intel_sdvo_connector->tv_format);
2029
2030         intel_sdvo_destroy_enhance_property(connector);
2031         drm_connector_cleanup(connector);
2032         kfree(intel_sdvo_connector);
2033 }
2034
2035 static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
2036 {
2037         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
2038         struct edid *edid;
2039         bool has_audio = false;
2040
2041         if (!intel_sdvo->is_hdmi)
2042                 return false;
2043
2044         edid = intel_sdvo_get_edid(connector);
2045         if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
2046                 has_audio = drm_detect_monitor_audio(edid);
2047         kfree(edid);
2048
2049         return has_audio;
2050 }
2051
2052 static int
2053 intel_sdvo_set_property(struct drm_connector *connector,
2054                         struct drm_property *property,
2055                         uint64_t val)
2056 {
2057         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
2058         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2059         struct drm_i915_private *dev_priv = connector->dev->dev_private;
2060         uint16_t temp_value;
2061         uint8_t cmd;
2062         int ret;
2063
2064         ret = drm_object_property_set_value(&connector->base, property, val);
2065         if (ret)
2066                 return ret;
2067
2068         if (property == dev_priv->force_audio_property) {
2069                 int i = val;
2070                 bool has_audio;
2071
2072                 if (i == intel_sdvo_connector->force_audio)
2073                         return 0;
2074
2075                 intel_sdvo_connector->force_audio = i;
2076
2077                 if (i == HDMI_AUDIO_AUTO)
2078                         has_audio = intel_sdvo_detect_hdmi_audio(connector);
2079                 else
2080                         has_audio = (i == HDMI_AUDIO_ON);
2081
2082                 if (has_audio == intel_sdvo->has_hdmi_audio)
2083                         return 0;
2084
2085                 intel_sdvo->has_hdmi_audio = has_audio;
2086                 goto done;
2087         }
2088
2089         if (property == dev_priv->broadcast_rgb_property) {
2090                 bool old_auto = intel_sdvo->color_range_auto;
2091                 uint32_t old_range = intel_sdvo->color_range;
2092
2093                 switch (val) {
2094                 case INTEL_BROADCAST_RGB_AUTO:
2095                         intel_sdvo->color_range_auto = true;
2096                         break;
2097                 case INTEL_BROADCAST_RGB_FULL:
2098                         intel_sdvo->color_range_auto = false;
2099                         intel_sdvo->color_range = 0;
2100                         break;
2101                 case INTEL_BROADCAST_RGB_LIMITED:
2102                         intel_sdvo->color_range_auto = false;
2103                         /* FIXME: this bit is only valid when using TMDS
2104                          * encoding and 8 bit per color mode. */
2105                         intel_sdvo->color_range = HDMI_COLOR_RANGE_16_235;
2106                         break;
2107                 default:
2108                         return -EINVAL;
2109                 }
2110
2111                 if (old_auto == intel_sdvo->color_range_auto &&
2112                     old_range == intel_sdvo->color_range)
2113                         return 0;
2114
2115                 goto done;
2116         }
2117
2118 #define CHECK_PROPERTY(name, NAME) \
2119         if (intel_sdvo_connector->name == property) { \
2120                 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
2121                 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
2122                 cmd = SDVO_CMD_SET_##NAME; \
2123                 intel_sdvo_connector->cur_##name = temp_value; \
2124                 goto set_value; \
2125         }
2126
2127         if (property == intel_sdvo_connector->tv_format) {
2128                 if (val >= TV_FORMAT_NUM)
2129                         return -EINVAL;
2130
2131                 if (intel_sdvo->tv_format_index ==
2132                     intel_sdvo_connector->tv_format_supported[val])
2133                         return 0;
2134
2135                 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
2136                 goto done;
2137         } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
2138                 temp_value = val;
2139                 if (intel_sdvo_connector->left == property) {
2140                         drm_object_property_set_value(&connector->base,
2141                                                          intel_sdvo_connector->right, val);
2142                         if (intel_sdvo_connector->left_margin == temp_value)
2143                                 return 0;
2144
2145                         intel_sdvo_connector->left_margin = temp_value;
2146                         intel_sdvo_connector->right_margin = temp_value;
2147                         temp_value = intel_sdvo_connector->max_hscan -
2148                                 intel_sdvo_connector->left_margin;
2149                         cmd = SDVO_CMD_SET_OVERSCAN_H;
2150                         goto set_value;
2151                 } else if (intel_sdvo_connector->right == property) {
2152                         drm_object_property_set_value(&connector->base,
2153                                                          intel_sdvo_connector->left, val);
2154                         if (intel_sdvo_connector->right_margin == temp_value)
2155                                 return 0;
2156
2157                         intel_sdvo_connector->left_margin = temp_value;
2158                         intel_sdvo_connector->right_margin = temp_value;
2159                         temp_value = intel_sdvo_connector->max_hscan -
2160                                 intel_sdvo_connector->left_margin;
2161                         cmd = SDVO_CMD_SET_OVERSCAN_H;
2162                         goto set_value;
2163                 } else if (intel_sdvo_connector->top == property) {
2164                         drm_object_property_set_value(&connector->base,
2165                                                          intel_sdvo_connector->bottom, val);
2166                         if (intel_sdvo_connector->top_margin == temp_value)
2167                                 return 0;
2168
2169                         intel_sdvo_connector->top_margin = temp_value;
2170                         intel_sdvo_connector->bottom_margin = temp_value;
2171                         temp_value = intel_sdvo_connector->max_vscan -
2172                                 intel_sdvo_connector->top_margin;
2173                         cmd = SDVO_CMD_SET_OVERSCAN_V;
2174                         goto set_value;
2175                 } else if (intel_sdvo_connector->bottom == property) {
2176                         drm_object_property_set_value(&connector->base,
2177                                                          intel_sdvo_connector->top, val);
2178                         if (intel_sdvo_connector->bottom_margin == temp_value)
2179                                 return 0;
2180
2181                         intel_sdvo_connector->top_margin = temp_value;
2182                         intel_sdvo_connector->bottom_margin = temp_value;
2183                         temp_value = intel_sdvo_connector->max_vscan -
2184                                 intel_sdvo_connector->top_margin;
2185                         cmd = SDVO_CMD_SET_OVERSCAN_V;
2186                         goto set_value;
2187                 }
2188                 CHECK_PROPERTY(hpos, HPOS)
2189                 CHECK_PROPERTY(vpos, VPOS)
2190                 CHECK_PROPERTY(saturation, SATURATION)
2191                 CHECK_PROPERTY(contrast, CONTRAST)
2192                 CHECK_PROPERTY(hue, HUE)
2193                 CHECK_PROPERTY(brightness, BRIGHTNESS)
2194                 CHECK_PROPERTY(sharpness, SHARPNESS)
2195                 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
2196                 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
2197                 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
2198                 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
2199                 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
2200                 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
2201         }
2202
2203         return -EINVAL; /* unknown property */
2204
2205 set_value:
2206         if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
2207                 return -EIO;
2208
2209
2210 done:
2211         if (intel_sdvo->base.base.crtc)
2212                 intel_crtc_restore_mode(intel_sdvo->base.base.crtc);
2213
2214         return 0;
2215 #undef CHECK_PROPERTY
2216 }
2217
2218 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
2219         .dpms = intel_sdvo_dpms,
2220         .detect = intel_sdvo_detect,
2221         .fill_modes = drm_helper_probe_single_connector_modes,
2222         .set_property = intel_sdvo_set_property,
2223         .destroy = intel_sdvo_destroy,
2224 };
2225
2226 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
2227         .get_modes = intel_sdvo_get_modes,
2228         .mode_valid = intel_sdvo_mode_valid,
2229         .best_encoder = intel_best_encoder,
2230 };
2231
2232 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
2233 {
2234         struct intel_sdvo *intel_sdvo = to_sdvo(to_intel_encoder(encoder));
2235
2236         if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
2237                 drm_mode_destroy(encoder->dev,
2238                                  intel_sdvo->sdvo_lvds_fixed_mode);
2239
2240         i2c_del_adapter(&intel_sdvo->ddc);
2241         intel_encoder_destroy(encoder);
2242 }
2243
2244 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
2245         .destroy = intel_sdvo_enc_destroy,
2246 };
2247
2248 static void
2249 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
2250 {
2251         uint16_t mask = 0;
2252         unsigned int num_bits;
2253
2254         /* Make a mask of outputs less than or equal to our own priority in the
2255          * list.
2256          */
2257         switch (sdvo->controlled_output) {
2258         case SDVO_OUTPUT_LVDS1:
2259                 mask |= SDVO_OUTPUT_LVDS1;
2260         case SDVO_OUTPUT_LVDS0:
2261                 mask |= SDVO_OUTPUT_LVDS0;
2262         case SDVO_OUTPUT_TMDS1:
2263                 mask |= SDVO_OUTPUT_TMDS1;
2264         case SDVO_OUTPUT_TMDS0:
2265                 mask |= SDVO_OUTPUT_TMDS0;
2266         case SDVO_OUTPUT_RGB1:
2267                 mask |= SDVO_OUTPUT_RGB1;
2268         case SDVO_OUTPUT_RGB0:
2269                 mask |= SDVO_OUTPUT_RGB0;
2270                 break;
2271         }
2272
2273         /* Count bits to find what number we are in the priority list. */
2274         mask &= sdvo->caps.output_flags;
2275         num_bits = hweight16(mask);
2276         /* If more than 3 outputs, default to DDC bus 3 for now. */
2277         if (num_bits > 3)
2278                 num_bits = 3;
2279
2280         /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2281         sdvo->ddc_bus = 1 << num_bits;
2282 }
2283
2284 /**
2285  * Choose the appropriate DDC bus for control bus switch command for this
2286  * SDVO output based on the controlled output.
2287  *
2288  * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2289  * outputs, then LVDS outputs.
2290  */
2291 static void
2292 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
2293                           struct intel_sdvo *sdvo, u32 reg)
2294 {
2295         struct sdvo_device_mapping *mapping;
2296
2297         if (sdvo->is_sdvob)
2298                 mapping = &(dev_priv->sdvo_mappings[0]);
2299         else
2300                 mapping = &(dev_priv->sdvo_mappings[1]);
2301
2302         if (mapping->initialized)
2303                 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
2304         else
2305                 intel_sdvo_guess_ddc_bus(sdvo);
2306 }
2307
2308 static void
2309 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
2310                           struct intel_sdvo *sdvo, u32 reg)
2311 {
2312         struct sdvo_device_mapping *mapping;
2313         u8 pin;
2314
2315         if (sdvo->is_sdvob)
2316                 mapping = &dev_priv->sdvo_mappings[0];
2317         else
2318                 mapping = &dev_priv->sdvo_mappings[1];
2319
2320         if (mapping->initialized && intel_gmbus_is_port_valid(mapping->i2c_pin))
2321                 pin = mapping->i2c_pin;
2322         else
2323                 pin = GMBUS_PORT_DPB;
2324
2325         sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
2326
2327         /* With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2328          * our code totally fails once we start using gmbus. Hence fall back to
2329          * bit banging for now. */
2330         intel_gmbus_force_bit(sdvo->i2c, true);
2331 }
2332
2333 /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2334 static void
2335 intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo)
2336 {
2337         intel_gmbus_force_bit(sdvo->i2c, false);
2338 }
2339
2340 static bool
2341 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
2342 {
2343         return intel_sdvo_check_supp_encode(intel_sdvo);
2344 }
2345
2346 static u8
2347 intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
2348 {
2349         struct drm_i915_private *dev_priv = dev->dev_private;
2350         struct sdvo_device_mapping *my_mapping, *other_mapping;
2351
2352         if (sdvo->is_sdvob) {
2353                 my_mapping = &dev_priv->sdvo_mappings[0];
2354                 other_mapping = &dev_priv->sdvo_mappings[1];
2355         } else {
2356                 my_mapping = &dev_priv->sdvo_mappings[1];
2357                 other_mapping = &dev_priv->sdvo_mappings[0];
2358         }
2359
2360         /* If the BIOS described our SDVO device, take advantage of it. */
2361         if (my_mapping->slave_addr)
2362                 return my_mapping->slave_addr;
2363
2364         /* If the BIOS only described a different SDVO device, use the
2365          * address that it isn't using.
2366          */
2367         if (other_mapping->slave_addr) {
2368                 if (other_mapping->slave_addr == 0x70)
2369                         return 0x72;
2370                 else
2371                         return 0x70;
2372         }
2373
2374         /* No SDVO device info is found for another DVO port,
2375          * so use mapping assumption we had before BIOS parsing.
2376          */
2377         if (sdvo->is_sdvob)
2378                 return 0x70;
2379         else
2380                 return 0x72;
2381 }
2382
2383 static void
2384 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2385                           struct intel_sdvo *encoder)
2386 {
2387         drm_connector_init(encoder->base.base.dev,
2388                            &connector->base.base,
2389                            &intel_sdvo_connector_funcs,
2390                            connector->base.base.connector_type);
2391
2392         drm_connector_helper_add(&connector->base.base,
2393                                  &intel_sdvo_connector_helper_funcs);
2394
2395         connector->base.base.interlace_allowed = 1;
2396         connector->base.base.doublescan_allowed = 0;
2397         connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2398         connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
2399
2400         intel_connector_attach_encoder(&connector->base, &encoder->base);
2401         drm_sysfs_connector_add(&connector->base.base);
2402 }
2403
2404 static void
2405 intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo,
2406                                struct intel_sdvo_connector *connector)
2407 {
2408         struct drm_device *dev = connector->base.base.dev;
2409
2410         intel_attach_force_audio_property(&connector->base.base);
2411         if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev)) {
2412                 intel_attach_broadcast_rgb_property(&connector->base.base);
2413                 intel_sdvo->color_range_auto = true;
2414         }
2415 }
2416
2417 static bool
2418 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2419 {
2420         struct drm_encoder *encoder = &intel_sdvo->base.base;
2421         struct drm_connector *connector;
2422         struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2423         struct intel_connector *intel_connector;
2424         struct intel_sdvo_connector *intel_sdvo_connector;
2425
2426         DRM_DEBUG_KMS("initialising DVI device %d\n", device);
2427
2428         intel_sdvo_connector = kzalloc(sizeof(*intel_sdvo_connector), GFP_KERNEL);
2429         if (!intel_sdvo_connector)
2430                 return false;
2431
2432         if (device == 0) {
2433                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2434                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2435         } else if (device == 1) {
2436                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2437                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2438         }
2439
2440         intel_connector = &intel_sdvo_connector->base;
2441         connector = &intel_connector->base;
2442         if (intel_sdvo_get_hotplug_support(intel_sdvo) &
2443                 intel_sdvo_connector->output_flag) {
2444                 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
2445                 /* Some SDVO devices have one-shot hotplug interrupts.
2446                  * Ensure that they get re-enabled when an interrupt happens.
2447                  */
2448                 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2449                 intel_sdvo_enable_hotplug(intel_encoder);
2450         } else {
2451                 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2452         }
2453         encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2454         connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2455
2456         if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2457                 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2458                 intel_sdvo->is_hdmi = true;
2459         }
2460
2461         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2462         if (intel_sdvo->is_hdmi)
2463                 intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector);
2464
2465         return true;
2466 }
2467
2468 static bool
2469 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2470 {
2471         struct drm_encoder *encoder = &intel_sdvo->base.base;
2472         struct drm_connector *connector;
2473         struct intel_connector *intel_connector;
2474         struct intel_sdvo_connector *intel_sdvo_connector;
2475
2476         DRM_DEBUG_KMS("initialising TV type %d\n", type);
2477
2478         intel_sdvo_connector = kzalloc(sizeof(*intel_sdvo_connector), GFP_KERNEL);
2479         if (!intel_sdvo_connector)
2480                 return false;
2481
2482         intel_connector = &intel_sdvo_connector->base;
2483         connector = &intel_connector->base;
2484         encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2485         connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2486
2487         intel_sdvo->controlled_output |= type;
2488         intel_sdvo_connector->output_flag = type;
2489
2490         intel_sdvo->is_tv = true;
2491
2492         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2493
2494         if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2495                 goto err;
2496
2497         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2498                 goto err;
2499
2500         return true;
2501
2502 err:
2503         drm_sysfs_connector_remove(connector);
2504         intel_sdvo_destroy(connector);
2505         return false;
2506 }
2507
2508 static bool
2509 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2510 {
2511         struct drm_encoder *encoder = &intel_sdvo->base.base;
2512         struct drm_connector *connector;
2513         struct intel_connector *intel_connector;
2514         struct intel_sdvo_connector *intel_sdvo_connector;
2515
2516         DRM_DEBUG_KMS("initialising analog device %d\n", device);
2517
2518         intel_sdvo_connector = kzalloc(sizeof(*intel_sdvo_connector), GFP_KERNEL);
2519         if (!intel_sdvo_connector)
2520                 return false;
2521
2522         intel_connector = &intel_sdvo_connector->base;
2523         connector = &intel_connector->base;
2524         intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2525         encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2526         connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2527
2528         if (device == 0) {
2529                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2530                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2531         } else if (device == 1) {
2532                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2533                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2534         }
2535
2536         intel_sdvo_connector_init(intel_sdvo_connector,
2537                                   intel_sdvo);
2538         return true;
2539 }
2540
2541 static bool
2542 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2543 {
2544         struct drm_encoder *encoder = &intel_sdvo->base.base;
2545         struct drm_connector *connector;
2546         struct intel_connector *intel_connector;
2547         struct intel_sdvo_connector *intel_sdvo_connector;
2548
2549         DRM_DEBUG_KMS("initialising LVDS device %d\n", device);
2550
2551         intel_sdvo_connector = kzalloc(sizeof(*intel_sdvo_connector), GFP_KERNEL);
2552         if (!intel_sdvo_connector)
2553                 return false;
2554
2555         intel_connector = &intel_sdvo_connector->base;
2556         connector = &intel_connector->base;
2557         encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2558         connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2559
2560         if (device == 0) {
2561                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2562                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2563         } else if (device == 1) {
2564                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2565                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2566         }
2567
2568         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2569         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2570                 goto err;
2571
2572         return true;
2573
2574 err:
2575         drm_sysfs_connector_remove(connector);
2576         intel_sdvo_destroy(connector);
2577         return false;
2578 }
2579
2580 static bool
2581 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2582 {
2583         intel_sdvo->is_tv = false;
2584         intel_sdvo->is_lvds = false;
2585
2586         /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2587
2588         if (flags & SDVO_OUTPUT_TMDS0)
2589                 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2590                         return false;
2591
2592         if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2593                 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2594                         return false;
2595
2596         /* TV has no XXX1 function block */
2597         if (flags & SDVO_OUTPUT_SVID0)
2598                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2599                         return false;
2600
2601         if (flags & SDVO_OUTPUT_CVBS0)
2602                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2603                         return false;
2604
2605         if (flags & SDVO_OUTPUT_YPRPB0)
2606                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2607                         return false;
2608
2609         if (flags & SDVO_OUTPUT_RGB0)
2610                 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2611                         return false;
2612
2613         if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2614                 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2615                         return false;
2616
2617         if (flags & SDVO_OUTPUT_LVDS0)
2618                 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2619                         return false;
2620
2621         if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2622                 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2623                         return false;
2624
2625         if ((flags & SDVO_OUTPUT_MASK) == 0) {
2626                 unsigned char bytes[2];
2627
2628                 intel_sdvo->controlled_output = 0;
2629                 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2630                 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2631                               SDVO_NAME(intel_sdvo),
2632                               bytes[0], bytes[1]);
2633                 return false;
2634         }
2635         intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2636
2637         return true;
2638 }
2639
2640 static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
2641 {
2642         struct drm_device *dev = intel_sdvo->base.base.dev;
2643         struct drm_connector *connector, *tmp;
2644
2645         list_for_each_entry_safe(connector, tmp,
2646                                  &dev->mode_config.connector_list, head) {
2647                 if (intel_attached_encoder(connector) == &intel_sdvo->base) {
2648                         drm_sysfs_connector_remove(connector);
2649                         intel_sdvo_destroy(connector);
2650                 }
2651         }
2652 }
2653
2654 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2655                                           struct intel_sdvo_connector *intel_sdvo_connector,
2656                                           int type)
2657 {
2658         struct drm_device *dev = intel_sdvo->base.base.dev;
2659         struct intel_sdvo_tv_format format;
2660         uint32_t format_map, i;
2661
2662         if (!intel_sdvo_set_target_output(intel_sdvo, type))
2663                 return false;
2664
2665         BUILD_BUG_ON(sizeof(format) != 6);
2666         if (!intel_sdvo_get_value(intel_sdvo,
2667                                   SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2668                                   &format, sizeof(format)))
2669                 return false;
2670
2671         memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2672
2673         if (format_map == 0)
2674                 return false;
2675
2676         intel_sdvo_connector->format_supported_num = 0;
2677         for (i = 0 ; i < TV_FORMAT_NUM; i++)
2678                 if (format_map & (1 << i))
2679                         intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2680
2681
2682         intel_sdvo_connector->tv_format =
2683                         drm_property_create(dev, DRM_MODE_PROP_ENUM,
2684                                             "mode", intel_sdvo_connector->format_supported_num);
2685         if (!intel_sdvo_connector->tv_format)
2686                 return false;
2687
2688         for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2689                 drm_property_add_enum(
2690                                 intel_sdvo_connector->tv_format, i,
2691                                 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2692
2693         intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2694         drm_object_attach_property(&intel_sdvo_connector->base.base.base,
2695                                       intel_sdvo_connector->tv_format, 0);
2696         return true;
2697
2698 }
2699
2700 #define ENHANCEMENT(name, NAME) do { \
2701         if (enhancements.name) { \
2702                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2703                     !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2704                         return false; \
2705                 intel_sdvo_connector->max_##name = data_value[0]; \
2706                 intel_sdvo_connector->cur_##name = response; \
2707                 intel_sdvo_connector->name = \
2708                         drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2709                 if (!intel_sdvo_connector->name) return false; \
2710                 drm_object_attach_property(&connector->base, \
2711                                               intel_sdvo_connector->name, \
2712                                               intel_sdvo_connector->cur_##name); \
2713                 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2714                               data_value[0], data_value[1], response); \
2715         } \
2716 } while (0)
2717
2718 static bool
2719 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2720                                       struct intel_sdvo_connector *intel_sdvo_connector,
2721                                       struct intel_sdvo_enhancements_reply enhancements)
2722 {
2723         struct drm_device *dev = intel_sdvo->base.base.dev;
2724         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2725         uint16_t response, data_value[2];
2726
2727         /* when horizontal overscan is supported, Add the left/right  property */
2728         if (enhancements.overscan_h) {
2729                 if (!intel_sdvo_get_value(intel_sdvo,
2730                                           SDVO_CMD_GET_MAX_OVERSCAN_H,
2731                                           &data_value, 4))
2732                         return false;
2733
2734                 if (!intel_sdvo_get_value(intel_sdvo,
2735                                           SDVO_CMD_GET_OVERSCAN_H,
2736                                           &response, 2))
2737                         return false;
2738
2739                 intel_sdvo_connector->max_hscan = data_value[0];
2740                 intel_sdvo_connector->left_margin = data_value[0] - response;
2741                 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2742                 intel_sdvo_connector->left =
2743                         drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2744                 if (!intel_sdvo_connector->left)
2745                         return false;
2746
2747                 drm_object_attach_property(&connector->base,
2748                                               intel_sdvo_connector->left,
2749                                               intel_sdvo_connector->left_margin);
2750
2751                 intel_sdvo_connector->right =
2752                         drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2753                 if (!intel_sdvo_connector->right)
2754                         return false;
2755
2756                 drm_object_attach_property(&connector->base,
2757                                               intel_sdvo_connector->right,
2758                                               intel_sdvo_connector->right_margin);
2759                 DRM_DEBUG_KMS("h_overscan: max %d, "
2760                               "default %d, current %d\n",
2761                               data_value[0], data_value[1], response);
2762         }
2763
2764         if (enhancements.overscan_v) {
2765                 if (!intel_sdvo_get_value(intel_sdvo,
2766                                           SDVO_CMD_GET_MAX_OVERSCAN_V,
2767                                           &data_value, 4))
2768                         return false;
2769
2770                 if (!intel_sdvo_get_value(intel_sdvo,
2771                                           SDVO_CMD_GET_OVERSCAN_V,
2772                                           &response, 2))
2773                         return false;
2774
2775                 intel_sdvo_connector->max_vscan = data_value[0];
2776                 intel_sdvo_connector->top_margin = data_value[0] - response;
2777                 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2778                 intel_sdvo_connector->top =
2779                         drm_property_create_range(dev, 0,
2780                                             "top_margin", 0, data_value[0]);
2781                 if (!intel_sdvo_connector->top)
2782                         return false;
2783
2784                 drm_object_attach_property(&connector->base,
2785                                               intel_sdvo_connector->top,
2786                                               intel_sdvo_connector->top_margin);
2787
2788                 intel_sdvo_connector->bottom =
2789                         drm_property_create_range(dev, 0,
2790                                             "bottom_margin", 0, data_value[0]);
2791                 if (!intel_sdvo_connector->bottom)
2792                         return false;
2793
2794                 drm_object_attach_property(&connector->base,
2795                                               intel_sdvo_connector->bottom,
2796                                               intel_sdvo_connector->bottom_margin);
2797                 DRM_DEBUG_KMS("v_overscan: max %d, "
2798                               "default %d, current %d\n",
2799                               data_value[0], data_value[1], response);
2800         }
2801
2802         ENHANCEMENT(hpos, HPOS);
2803         ENHANCEMENT(vpos, VPOS);
2804         ENHANCEMENT(saturation, SATURATION);
2805         ENHANCEMENT(contrast, CONTRAST);
2806         ENHANCEMENT(hue, HUE);
2807         ENHANCEMENT(sharpness, SHARPNESS);
2808         ENHANCEMENT(brightness, BRIGHTNESS);
2809         ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2810         ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2811         ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2812         ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2813         ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2814
2815         if (enhancements.dot_crawl) {
2816                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2817                         return false;
2818
2819                 intel_sdvo_connector->max_dot_crawl = 1;
2820                 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2821                 intel_sdvo_connector->dot_crawl =
2822                         drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2823                 if (!intel_sdvo_connector->dot_crawl)
2824                         return false;
2825
2826                 drm_object_attach_property(&connector->base,
2827                                               intel_sdvo_connector->dot_crawl,
2828                                               intel_sdvo_connector->cur_dot_crawl);
2829                 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2830         }
2831
2832         return true;
2833 }
2834
2835 static bool
2836 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2837                                         struct intel_sdvo_connector *intel_sdvo_connector,
2838                                         struct intel_sdvo_enhancements_reply enhancements)
2839 {
2840         struct drm_device *dev = intel_sdvo->base.base.dev;
2841         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2842         uint16_t response, data_value[2];
2843
2844         ENHANCEMENT(brightness, BRIGHTNESS);
2845
2846         return true;
2847 }
2848 #undef ENHANCEMENT
2849
2850 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2851                                                struct intel_sdvo_connector *intel_sdvo_connector)
2852 {
2853         union {
2854                 struct intel_sdvo_enhancements_reply reply;
2855                 uint16_t response;
2856         } enhancements;
2857
2858         BUILD_BUG_ON(sizeof(enhancements) != 2);
2859
2860         enhancements.response = 0;
2861         intel_sdvo_get_value(intel_sdvo,
2862                              SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2863                              &enhancements, sizeof(enhancements));
2864         if (enhancements.response == 0) {
2865                 DRM_DEBUG_KMS("No enhancement is supported\n");
2866                 return true;
2867         }
2868
2869         if (IS_TV(intel_sdvo_connector))
2870                 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2871         else if (IS_LVDS(intel_sdvo_connector))
2872                 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2873         else
2874                 return true;
2875 }
2876
2877 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2878                                      struct i2c_msg *msgs,
2879                                      int num)
2880 {
2881         struct intel_sdvo *sdvo = adapter->algo_data;
2882
2883         if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2884                 return -EIO;
2885
2886         return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2887 }
2888
2889 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2890 {
2891         struct intel_sdvo *sdvo = adapter->algo_data;
2892         return sdvo->i2c->algo->functionality(sdvo->i2c);
2893 }
2894
2895 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2896         .master_xfer    = intel_sdvo_ddc_proxy_xfer,
2897         .functionality  = intel_sdvo_ddc_proxy_func
2898 };
2899
2900 static bool
2901 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2902                           struct drm_device *dev)
2903 {
2904         sdvo->ddc.owner = THIS_MODULE;
2905         sdvo->ddc.class = I2C_CLASS_DDC;
2906         snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2907         sdvo->ddc.dev.parent = &dev->pdev->dev;
2908         sdvo->ddc.algo_data = sdvo;
2909         sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2910
2911         return i2c_add_adapter(&sdvo->ddc) == 0;
2912 }
2913
2914 bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
2915 {
2916         struct drm_i915_private *dev_priv = dev->dev_private;
2917         struct intel_encoder *intel_encoder;
2918         struct intel_sdvo *intel_sdvo;
2919         int i;
2920         intel_sdvo = kzalloc(sizeof(*intel_sdvo), GFP_KERNEL);
2921         if (!intel_sdvo)
2922                 return false;
2923
2924         intel_sdvo->sdvo_reg = sdvo_reg;
2925         intel_sdvo->is_sdvob = is_sdvob;
2926         intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
2927         intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
2928         if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev))
2929                 goto err_i2c_bus;
2930
2931         /* encoder type will be decided later */
2932         intel_encoder = &intel_sdvo->base;
2933         intel_encoder->type = INTEL_OUTPUT_SDVO;
2934         drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2935
2936         /* Read the regs to test if we can talk to the device */
2937         for (i = 0; i < 0x40; i++) {
2938                 u8 byte;
2939
2940                 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2941                         DRM_DEBUG_KMS("No SDVO device found on %s\n",
2942                                       SDVO_NAME(intel_sdvo));
2943                         goto err;
2944                 }
2945         }
2946
2947         intel_encoder->compute_config = intel_sdvo_compute_config;
2948         intel_encoder->disable = intel_disable_sdvo;
2949         intel_encoder->mode_set = intel_sdvo_mode_set;
2950         intel_encoder->enable = intel_enable_sdvo;
2951         intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
2952         intel_encoder->get_config = intel_sdvo_get_config;
2953
2954         /* In default case sdvo lvds is false */
2955         if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2956                 goto err;
2957
2958         if (intel_sdvo_output_setup(intel_sdvo,
2959                                     intel_sdvo->caps.output_flags) != true) {
2960                 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
2961                               SDVO_NAME(intel_sdvo));
2962                 /* Output_setup can leave behind connectors! */
2963                 goto err_output;
2964         }
2965
2966         /* Only enable the hotplug irq if we need it, to work around noisy
2967          * hotplug lines.
2968          */
2969         if (intel_sdvo->hotplug_active) {
2970                 intel_encoder->hpd_pin =
2971                         intel_sdvo->is_sdvob ?  HPD_SDVO_B : HPD_SDVO_C;
2972         }
2973
2974         /*
2975          * Cloning SDVO with anything is often impossible, since the SDVO
2976          * encoder can request a special input timing mode. And even if that's
2977          * not the case we have evidence that cloning a plain unscaled mode with
2978          * VGA doesn't really work. Furthermore the cloning flags are way too
2979          * simplistic anyway to express such constraints, so just give up on
2980          * cloning for SDVO encoders.
2981          */
2982         intel_sdvo->base.cloneable = false;
2983
2984         intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2985
2986         /* Set the input timing to the screen. Assume always input 0. */
2987         if (!intel_sdvo_set_target_input(intel_sdvo))
2988                 goto err_output;
2989
2990         if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2991                                                     &intel_sdvo->pixel_clock_min,
2992                                                     &intel_sdvo->pixel_clock_max))
2993                 goto err_output;
2994
2995         DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2996                         "clock range %dMHz - %dMHz, "
2997                         "input 1: %c, input 2: %c, "
2998                         "output 1: %c, output 2: %c\n",
2999                         SDVO_NAME(intel_sdvo),
3000                         intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
3001                         intel_sdvo->caps.device_rev_id,
3002                         intel_sdvo->pixel_clock_min / 1000,
3003                         intel_sdvo->pixel_clock_max / 1000,
3004                         (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
3005                         (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
3006                         /* check currently supported outputs */
3007                         intel_sdvo->caps.output_flags &
3008                         (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
3009                         intel_sdvo->caps.output_flags &
3010                         (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
3011         return true;
3012
3013 err_output:
3014         intel_sdvo_output_cleanup(intel_sdvo);
3015
3016 err:
3017         drm_encoder_cleanup(&intel_encoder->base);
3018         i2c_del_adapter(&intel_sdvo->ddc);
3019 err_i2c_bus:
3020         intel_sdvo_unselect_i2c_bus(intel_sdvo);
3021         kfree(intel_sdvo);
3022
3023         return false;
3024 }