2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
26 * Eric Anholt <eric@anholt.net>
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
35 #include "intel_drv.h"
38 #include "intel_sdvo_regs.h"
40 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
41 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
42 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
43 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0)
45 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
48 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
49 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
50 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
53 static const char *tv_format_names[] = {
54 "NTSC_M" , "NTSC_J" , "NTSC_443",
55 "PAL_B" , "PAL_D" , "PAL_G" ,
56 "PAL_H" , "PAL_I" , "PAL_M" ,
57 "PAL_N" , "PAL_NC" , "PAL_60" ,
58 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
59 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
63 #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
66 struct intel_encoder base;
68 struct i2c_adapter *i2c;
71 struct i2c_adapter ddc;
73 /* Register for the SDVO device: SDVOB or SDVOC */
76 /* Active outputs controlled by this SDVO output */
77 uint16_t controlled_output;
80 * Capabilities of the SDVO device returned by
81 * i830_sdvo_get_capabilities()
83 struct intel_sdvo_caps caps;
85 /* Pixel clock limitations reported by the SDVO device, in kHz */
86 int pixel_clock_min, pixel_clock_max;
89 * For multiple function SDVO device,
90 * this is for current attached outputs.
92 uint16_t attached_output;
95 * This is set if we're going to treat the device as TV-out.
97 * While we have these nice friendly flags for output types that ought
98 * to decide this for us, the S-Video output on our HDMI+S-Video card
99 * shows up as RGB1 (VGA).
103 /* This is for current tv format name */
107 * This is set if we treat the device as HDMI, instead of DVI.
110 bool has_hdmi_monitor;
114 * This is set if we detect output of sdvo device as LVDS and
115 * have a valid fixed mode to use with the panel.
120 * This is sdvo fixed pannel mode pointer
122 struct drm_display_mode *sdvo_lvds_fixed_mode;
124 /* DDC bus used by this SDVO encoder */
127 /* Input timings for adjusted_mode */
128 struct intel_sdvo_dtd input_dtd;
131 struct intel_sdvo_connector {
132 struct intel_connector base;
134 /* Mark the type of connector */
135 uint16_t output_flag;
139 /* This contains all current supported TV format */
140 u8 tv_format_supported[TV_FORMAT_NUM];
141 int format_supported_num;
142 struct drm_property *tv_format;
144 struct drm_property *force_audio_property;
146 /* add the property for the SDVO-TV */
147 struct drm_property *left;
148 struct drm_property *right;
149 struct drm_property *top;
150 struct drm_property *bottom;
151 struct drm_property *hpos;
152 struct drm_property *vpos;
153 struct drm_property *contrast;
154 struct drm_property *saturation;
155 struct drm_property *hue;
156 struct drm_property *sharpness;
157 struct drm_property *flicker_filter;
158 struct drm_property *flicker_filter_adaptive;
159 struct drm_property *flicker_filter_2d;
160 struct drm_property *tv_chroma_filter;
161 struct drm_property *tv_luma_filter;
162 struct drm_property *dot_crawl;
164 /* add the property for the SDVO-TV/LVDS */
165 struct drm_property *brightness;
167 /* Add variable to record current setting for the above property */
168 u32 left_margin, right_margin, top_margin, bottom_margin;
170 /* this is to get the range of margin.*/
171 u32 max_hscan, max_vscan;
172 u32 max_hpos, cur_hpos;
173 u32 max_vpos, cur_vpos;
174 u32 cur_brightness, max_brightness;
175 u32 cur_contrast, max_contrast;
176 u32 cur_saturation, max_saturation;
177 u32 cur_hue, max_hue;
178 u32 cur_sharpness, max_sharpness;
179 u32 cur_flicker_filter, max_flicker_filter;
180 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
181 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
182 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
183 u32 cur_tv_luma_filter, max_tv_luma_filter;
184 u32 cur_dot_crawl, max_dot_crawl;
187 static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
189 return container_of(encoder, struct intel_sdvo, base.base);
192 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
194 return container_of(intel_attached_encoder(connector),
195 struct intel_sdvo, base);
198 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
200 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
204 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
206 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
207 struct intel_sdvo_connector *intel_sdvo_connector,
210 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
211 struct intel_sdvo_connector *intel_sdvo_connector);
214 * Writes the SDVOB or SDVOC with the given value, but always writes both
215 * SDVOB and SDVOC to work around apparent hardware issues (according to
216 * comments in the BIOS).
218 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
220 struct drm_device *dev = intel_sdvo->base.base.dev;
221 struct drm_i915_private *dev_priv = dev->dev_private;
222 u32 bval = val, cval = val;
225 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
226 I915_WRITE(intel_sdvo->sdvo_reg, val);
227 I915_READ(intel_sdvo->sdvo_reg);
231 if (intel_sdvo->sdvo_reg == SDVOB) {
232 cval = I915_READ(SDVOC);
234 bval = I915_READ(SDVOB);
237 * Write the registers twice for luck. Sometimes,
238 * writing them only once doesn't appear to 'stick'.
239 * The BIOS does this too. Yay, magic
241 for (i = 0; i < 2; i++)
243 I915_WRITE(SDVOB, bval);
245 I915_WRITE(SDVOC, cval);
250 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
252 struct i2c_msg msgs[] = {
254 .addr = intel_sdvo->slave_addr,
260 .addr = intel_sdvo->slave_addr,
268 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
271 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
275 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
276 /** Mapping of command numbers to names, for debug output */
277 static const struct _sdvo_cmd_name {
280 } sdvo_cmd_names[] = {
281 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
282 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
283 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
284 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
285 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
286 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
287 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
288 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
289 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
290 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
291 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
292 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
293 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
294 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
295 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
325 /* Add the op code for SDVO enhancements */
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
394 #define IS_SDVOB(reg) (reg == SDVOB || reg == PCH_SDVOB)
395 #define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
397 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
398 const void *args, int args_len)
402 DRM_DEBUG_KMS("%s: W: %02X ",
403 SDVO_NAME(intel_sdvo), cmd);
404 for (i = 0; i < args_len; i++)
405 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
408 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
409 if (cmd == sdvo_cmd_names[i].cmd) {
410 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
414 if (i == ARRAY_SIZE(sdvo_cmd_names))
415 DRM_LOG_KMS("(%02X)", cmd);
419 static const char *cmd_status_names[] = {
425 "Target not specified",
426 "Scaling not supported"
429 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
430 const void *args, int args_len)
432 u8 buf[args_len*2 + 2], status;
433 struct i2c_msg msgs[args_len + 3];
436 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
438 for (i = 0; i < args_len; i++) {
439 msgs[i].addr = intel_sdvo->slave_addr;
442 msgs[i].buf = buf + 2 *i;
443 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
444 buf[2*i + 1] = ((u8*)args)[i];
446 msgs[i].addr = intel_sdvo->slave_addr;
449 msgs[i].buf = buf + 2*i;
450 buf[2*i + 0] = SDVO_I2C_OPCODE;
453 /* the following two are to read the response */
454 status = SDVO_I2C_CMD_STATUS;
455 msgs[i+1].addr = intel_sdvo->slave_addr;
458 msgs[i+1].buf = &status;
460 msgs[i+2].addr = intel_sdvo->slave_addr;
461 msgs[i+2].flags = I2C_M_RD;
463 msgs[i+2].buf = &status;
465 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
467 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
471 /* failure in I2C transfer */
472 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
477 while (status == SDVO_CMD_STATUS_PENDING && i--) {
478 if (!intel_sdvo_read_byte(intel_sdvo,
483 if (status != SDVO_CMD_STATUS_SUCCESS) {
484 DRM_DEBUG_KMS("command returns response %s [%d]\n",
485 status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP ? cmd_status_names[status] : "???",
493 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
494 void *response, int response_len)
501 * The documentation states that all commands will be
502 * processed within 15µs, and that we need only poll
503 * the status byte a maximum of 3 times in order for the
504 * command to be complete.
506 * Check 5 times in case the hardware failed to read the docs.
509 if (!intel_sdvo_read_byte(intel_sdvo,
513 } while (status == SDVO_CMD_STATUS_PENDING && --retry);
515 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
516 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
517 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
519 DRM_LOG_KMS("(??? %d)", status);
521 if (status != SDVO_CMD_STATUS_SUCCESS)
524 /* Read the command response */
525 for (i = 0; i < response_len; i++) {
526 if (!intel_sdvo_read_byte(intel_sdvo,
527 SDVO_I2C_RETURN_0 + i,
528 &((u8 *)response)[i]))
530 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
540 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
542 if (mode->clock >= 100000)
544 else if (mode->clock >= 50000)
550 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
553 return intel_sdvo_write_cmd(intel_sdvo,
554 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
558 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
560 return intel_sdvo_write_cmd(intel_sdvo, cmd, data, len);
564 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
566 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
569 return intel_sdvo_read_response(intel_sdvo, value, len);
572 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
574 struct intel_sdvo_set_target_input_args targets = {0};
575 return intel_sdvo_set_value(intel_sdvo,
576 SDVO_CMD_SET_TARGET_INPUT,
577 &targets, sizeof(targets));
581 * Return whether each input is trained.
583 * This function is making an assumption about the layout of the response,
584 * which should be checked against the docs.
586 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
588 struct intel_sdvo_get_trained_inputs_response response;
590 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
591 &response, sizeof(response)))
594 *input_1 = response.input0_trained;
595 *input_2 = response.input1_trained;
599 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
602 return intel_sdvo_set_value(intel_sdvo,
603 SDVO_CMD_SET_ACTIVE_OUTPUTS,
604 &outputs, sizeof(outputs));
607 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
610 u8 state = SDVO_ENCODER_STATE_ON;
613 case DRM_MODE_DPMS_ON:
614 state = SDVO_ENCODER_STATE_ON;
616 case DRM_MODE_DPMS_STANDBY:
617 state = SDVO_ENCODER_STATE_STANDBY;
619 case DRM_MODE_DPMS_SUSPEND:
620 state = SDVO_ENCODER_STATE_SUSPEND;
622 case DRM_MODE_DPMS_OFF:
623 state = SDVO_ENCODER_STATE_OFF;
627 return intel_sdvo_set_value(intel_sdvo,
628 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
631 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
635 struct intel_sdvo_pixel_clock_range clocks;
637 if (!intel_sdvo_get_value(intel_sdvo,
638 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
639 &clocks, sizeof(clocks)))
642 /* Convert the values from units of 10 kHz to kHz. */
643 *clock_min = clocks.min * 10;
644 *clock_max = clocks.max * 10;
648 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
651 return intel_sdvo_set_value(intel_sdvo,
652 SDVO_CMD_SET_TARGET_OUTPUT,
653 &outputs, sizeof(outputs));
656 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
657 struct intel_sdvo_dtd *dtd)
659 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
660 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
663 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
664 struct intel_sdvo_dtd *dtd)
666 return intel_sdvo_set_timing(intel_sdvo,
667 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
670 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
671 struct intel_sdvo_dtd *dtd)
673 return intel_sdvo_set_timing(intel_sdvo,
674 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
678 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
683 struct intel_sdvo_preferred_input_timing_args args;
685 memset(&args, 0, sizeof(args));
688 args.height = height;
691 if (intel_sdvo->is_lvds &&
692 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
693 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
696 return intel_sdvo_set_value(intel_sdvo,
697 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
698 &args, sizeof(args));
701 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
702 struct intel_sdvo_dtd *dtd)
704 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
705 &dtd->part1, sizeof(dtd->part1)) &&
706 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
707 &dtd->part2, sizeof(dtd->part2));
710 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
712 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
715 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
716 const struct drm_display_mode *mode)
718 uint16_t width, height;
719 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
720 uint16_t h_sync_offset, v_sync_offset;
722 width = mode->crtc_hdisplay;
723 height = mode->crtc_vdisplay;
725 /* do some mode translations */
726 h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
727 h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
729 v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
730 v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
732 h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
733 v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
735 dtd->part1.clock = mode->clock / 10;
736 dtd->part1.h_active = width & 0xff;
737 dtd->part1.h_blank = h_blank_len & 0xff;
738 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
739 ((h_blank_len >> 8) & 0xf);
740 dtd->part1.v_active = height & 0xff;
741 dtd->part1.v_blank = v_blank_len & 0xff;
742 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
743 ((v_blank_len >> 8) & 0xf);
745 dtd->part2.h_sync_off = h_sync_offset & 0xff;
746 dtd->part2.h_sync_width = h_sync_len & 0xff;
747 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
749 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
750 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
751 ((v_sync_len & 0x30) >> 4);
753 dtd->part2.dtd_flags = 0x18;
754 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
755 dtd->part2.dtd_flags |= 0x2;
756 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
757 dtd->part2.dtd_flags |= 0x4;
759 dtd->part2.sdvo_flags = 0;
760 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
761 dtd->part2.reserved = 0;
764 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
765 const struct intel_sdvo_dtd *dtd)
767 mode->hdisplay = dtd->part1.h_active;
768 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
769 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
770 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
771 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
772 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
773 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
774 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
776 mode->vdisplay = dtd->part1.v_active;
777 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
778 mode->vsync_start = mode->vdisplay;
779 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
780 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
781 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
782 mode->vsync_end = mode->vsync_start +
783 (dtd->part2.v_sync_off_width & 0xf);
784 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
785 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
786 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
788 mode->clock = dtd->part1.clock * 10;
790 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
791 if (dtd->part2.dtd_flags & 0x2)
792 mode->flags |= DRM_MODE_FLAG_PHSYNC;
793 if (dtd->part2.dtd_flags & 0x4)
794 mode->flags |= DRM_MODE_FLAG_PVSYNC;
797 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
799 struct intel_sdvo_encode encode;
801 return intel_sdvo_get_value(intel_sdvo,
802 SDVO_CMD_GET_SUPP_ENCODE,
803 &encode, sizeof(encode));
806 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
809 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
812 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
815 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
819 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
822 uint8_t set_buf_index[2];
828 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
830 for (i = 0; i <= av_split; i++) {
831 set_buf_index[0] = i; set_buf_index[1] = 0;
832 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
834 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
835 intel_sdvo_read_response(encoder, &buf_size, 1);
838 for (j = 0; j <= buf_size; j += 8) {
839 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
841 intel_sdvo_read_response(encoder, pos, 8);
848 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
850 struct dip_infoframe avi_if = {
851 .type = DIP_TYPE_AVI,
852 .ver = DIP_VERSION_AVI,
855 uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
856 uint8_t set_buf_index[2] = { 1, 0 };
857 uint64_t *data = (uint64_t *)&avi_if;
860 intel_dip_infoframe_csum(&avi_if);
862 if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_INDEX,
866 for (i = 0; i < sizeof(avi_if); i += 8) {
867 if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_DATA,
873 return intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_TXRATE,
877 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
879 struct intel_sdvo_tv_format format;
882 format_map = 1 << intel_sdvo->tv_format_index;
883 memset(&format, 0, sizeof(format));
884 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
886 BUILD_BUG_ON(sizeof(format) != 6);
887 return intel_sdvo_set_value(intel_sdvo,
888 SDVO_CMD_SET_TV_FORMAT,
889 &format, sizeof(format));
893 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
894 struct drm_display_mode *mode)
896 struct intel_sdvo_dtd output_dtd;
898 if (!intel_sdvo_set_target_output(intel_sdvo,
899 intel_sdvo->attached_output))
902 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
903 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
910 intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
911 struct drm_display_mode *mode,
912 struct drm_display_mode *adjusted_mode)
914 /* Reset the input timing to the screen. Assume always input 0. */
915 if (!intel_sdvo_set_target_input(intel_sdvo))
918 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
924 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
925 &intel_sdvo->input_dtd))
928 intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd);
930 drm_mode_set_crtcinfo(adjusted_mode, 0);
934 static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
935 struct drm_display_mode *mode,
936 struct drm_display_mode *adjusted_mode)
938 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
941 /* We need to construct preferred input timings based on our
942 * output timings. To do that, we have to set the output
943 * timings, even though this isn't really the right place in
944 * the sequence to do it. Oh well.
946 if (intel_sdvo->is_tv) {
947 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
950 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
953 } else if (intel_sdvo->is_lvds) {
954 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
955 intel_sdvo->sdvo_lvds_fixed_mode))
958 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
963 /* Make the CRTC code factor in the SDVO pixel multiplier. The
964 * SDVO device will factor out the multiplier during mode_set.
966 multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
967 intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
972 static void intel_sdvo_mode_set(struct drm_encoder *encoder,
973 struct drm_display_mode *mode,
974 struct drm_display_mode *adjusted_mode)
976 struct drm_device *dev = encoder->dev;
977 struct drm_i915_private *dev_priv = dev->dev_private;
978 struct drm_crtc *crtc = encoder->crtc;
979 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
980 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
982 struct intel_sdvo_in_out_map in_out;
983 struct intel_sdvo_dtd input_dtd;
984 int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
990 /* First, set the input mapping for the first input to our controlled
991 * output. This is only correct if we're a single-input device, in
992 * which case the first input is the output from the appropriate SDVO
993 * channel on the motherboard. In a two-input device, the first input
994 * will be SDVOB and the second SDVOC.
996 in_out.in0 = intel_sdvo->attached_output;
999 intel_sdvo_set_value(intel_sdvo,
1000 SDVO_CMD_SET_IN_OUT_MAP,
1001 &in_out, sizeof(in_out));
1003 /* Set the output timings to the screen */
1004 if (!intel_sdvo_set_target_output(intel_sdvo,
1005 intel_sdvo->attached_output))
1008 /* We have tried to get input timing in mode_fixup, and filled into
1011 if (intel_sdvo->is_tv || intel_sdvo->is_lvds) {
1012 input_dtd = intel_sdvo->input_dtd;
1014 /* Set the output timing to the screen */
1015 if (!intel_sdvo_set_target_output(intel_sdvo,
1016 intel_sdvo->attached_output))
1019 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1020 (void) intel_sdvo_set_output_timing(intel_sdvo, &input_dtd);
1023 /* Set the input timing to the screen. Assume always input 0. */
1024 if (!intel_sdvo_set_target_input(intel_sdvo))
1027 if (intel_sdvo->has_hdmi_monitor &&
1028 !intel_sdvo_set_avi_infoframe(intel_sdvo))
1031 if (intel_sdvo->is_tv &&
1032 !intel_sdvo_set_tv_format(intel_sdvo))
1035 (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
1037 switch (pixel_multiplier) {
1039 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1040 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1041 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1043 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1046 /* Set the SDVO control regs. */
1047 if (INTEL_INFO(dev)->gen >= 4) {
1048 sdvox = SDVO_BORDER_ENABLE;
1049 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
1050 sdvox |= SDVO_VSYNC_ACTIVE_HIGH;
1051 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
1052 sdvox |= SDVO_HSYNC_ACTIVE_HIGH;
1054 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1055 switch (intel_sdvo->sdvo_reg) {
1057 sdvox &= SDVOB_PRESERVE_MASK;
1060 sdvox &= SDVOC_PRESERVE_MASK;
1063 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1065 if (intel_crtc->pipe == 1)
1066 sdvox |= SDVO_PIPE_B_SELECT;
1067 if (intel_sdvo->has_hdmi_audio)
1068 sdvox |= SDVO_AUDIO_ENABLE;
1070 if (INTEL_INFO(dev)->gen >= 4) {
1071 /* done in crtc_mode_set as the dpll_md reg must be written early */
1072 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1073 /* done in crtc_mode_set as it lives inside the dpll register */
1075 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1078 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL)
1079 sdvox |= SDVO_STALL_SELECT;
1080 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1083 static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1085 struct drm_device *dev = encoder->dev;
1086 struct drm_i915_private *dev_priv = dev->dev_private;
1087 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1088 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
1091 if (mode != DRM_MODE_DPMS_ON) {
1092 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1094 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1096 if (mode == DRM_MODE_DPMS_OFF) {
1097 temp = I915_READ(intel_sdvo->sdvo_reg);
1098 if ((temp & SDVO_ENABLE) != 0) {
1099 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1103 bool input1, input2;
1107 temp = I915_READ(intel_sdvo->sdvo_reg);
1108 if ((temp & SDVO_ENABLE) == 0)
1109 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1110 for (i = 0; i < 2; i++)
1111 intel_wait_for_vblank(dev, intel_crtc->pipe);
1113 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1114 /* Warn if the device reported failure to sync.
1115 * A lot of SDVO devices fail to notify of sync, but it's
1116 * a given it the status is a success, we succeeded.
1118 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1119 DRM_DEBUG_KMS("First %s output reported failure to "
1120 "sync\n", SDVO_NAME(intel_sdvo));
1124 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1125 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1130 static int intel_sdvo_mode_valid(struct drm_connector *connector,
1131 struct drm_display_mode *mode)
1133 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1135 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1136 return MODE_NO_DBLESCAN;
1138 if (intel_sdvo->pixel_clock_min > mode->clock)
1139 return MODE_CLOCK_LOW;
1141 if (intel_sdvo->pixel_clock_max < mode->clock)
1142 return MODE_CLOCK_HIGH;
1144 if (intel_sdvo->is_lvds) {
1145 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1148 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1155 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1157 if (!intel_sdvo_get_value(intel_sdvo,
1158 SDVO_CMD_GET_DEVICE_CAPS,
1159 caps, sizeof(*caps)))
1162 DRM_DEBUG_KMS("SDVO capabilities:\n"
1165 " device_rev_id: %d\n"
1166 " sdvo_version_major: %d\n"
1167 " sdvo_version_minor: %d\n"
1168 " sdvo_inputs_mask: %d\n"
1169 " smooth_scaling: %d\n"
1170 " sharp_scaling: %d\n"
1172 " down_scaling: %d\n"
1173 " stall_support: %d\n"
1174 " output_flags: %d\n",
1177 caps->device_rev_id,
1178 caps->sdvo_version_major,
1179 caps->sdvo_version_minor,
1180 caps->sdvo_inputs_mask,
1181 caps->smooth_scaling,
1182 caps->sharp_scaling,
1185 caps->stall_support,
1186 caps->output_flags);
1193 struct drm_connector* intel_sdvo_find(struct drm_device *dev, int sdvoB)
1195 struct drm_connector *connector = NULL;
1196 struct intel_sdvo *iout = NULL;
1197 struct intel_sdvo *sdvo;
1199 /* find the sdvo connector */
1200 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1201 iout = to_intel_sdvo(connector);
1203 if (iout->type != INTEL_OUTPUT_SDVO)
1206 sdvo = iout->dev_priv;
1208 if (sdvo->sdvo_reg == SDVOB && sdvoB)
1211 if (sdvo->sdvo_reg == SDVOC && !sdvoB)
1219 int intel_sdvo_supports_hotplug(struct drm_connector *connector)
1223 struct intel_sdvo *intel_sdvo;
1224 DRM_DEBUG_KMS("\n");
1229 intel_sdvo = to_intel_sdvo(connector);
1231 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1232 &response, 2) && response[0];
1235 void intel_sdvo_set_hotplug(struct drm_connector *connector, int on)
1239 struct intel_sdvo *intel_sdvo = to_intel_sdvo(connector);
1241 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1242 intel_sdvo_read_response(intel_sdvo, &response, 2);
1245 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL, 0);
1246 status = intel_sdvo_read_response(intel_sdvo, &response, 2);
1248 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
1252 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
1255 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1256 intel_sdvo_read_response(intel_sdvo, &response, 2);
1261 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1265 if (intel_sdvo->caps.output_flags &
1266 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1))
1268 if (intel_sdvo->caps.output_flags &
1269 (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1))
1271 if (intel_sdvo->caps.output_flags &
1272 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_SVID1))
1274 if (intel_sdvo->caps.output_flags &
1275 (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_CVBS1))
1277 if (intel_sdvo->caps.output_flags &
1278 (SDVO_OUTPUT_YPRPB0 | SDVO_OUTPUT_YPRPB1))
1281 if (intel_sdvo->caps.output_flags &
1282 (SDVO_OUTPUT_SCART0 | SDVO_OUTPUT_SCART1))
1285 if (intel_sdvo->caps.output_flags &
1286 (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1))
1292 static struct edid *
1293 intel_sdvo_get_edid(struct drm_connector *connector)
1295 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1296 return drm_get_edid(connector, &sdvo->ddc);
1299 /* Mac mini hack -- use the same DDC as the analog connector */
1300 static struct edid *
1301 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1303 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1305 return drm_get_edid(connector,
1306 &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
1309 enum drm_connector_status
1310 intel_sdvo_hdmi_sink_detect(struct drm_connector *connector)
1312 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1313 enum drm_connector_status status;
1316 edid = intel_sdvo_get_edid(connector);
1318 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1319 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1322 * Don't use the 1 as the argument of DDC bus switch to get
1323 * the EDID. It is used for SDVO SPD ROM.
1325 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1326 intel_sdvo->ddc_bus = ddc;
1327 edid = intel_sdvo_get_edid(connector);
1332 * If we found the EDID on the other bus,
1333 * assume that is the correct DDC bus.
1336 intel_sdvo->ddc_bus = saved_ddc;
1340 * When there is no edid and no monitor is connected with VGA
1341 * port, try to use the CRT ddc to read the EDID for DVI-connector.
1344 edid = intel_sdvo_get_analog_edid(connector);
1346 status = connector_status_unknown;
1348 /* DDC bus is shared, match EDID to connector type */
1349 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1350 status = connector_status_connected;
1351 if (intel_sdvo->is_hdmi) {
1352 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1353 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1356 connector->display_info.raw_edid = NULL;
1360 if (status == connector_status_connected) {
1361 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1362 if (intel_sdvo_connector->force_audio)
1363 intel_sdvo->has_hdmi_audio = intel_sdvo_connector->force_audio > 0;
1369 static enum drm_connector_status
1370 intel_sdvo_detect(struct drm_connector *connector, bool force)
1373 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1374 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1375 enum drm_connector_status ret;
1377 if (!intel_sdvo_write_cmd(intel_sdvo,
1378 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
1379 return connector_status_unknown;
1381 /* add 30ms delay when the output type might be TV */
1382 if (intel_sdvo->caps.output_flags &
1383 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_CVBS0))
1386 if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1387 return connector_status_unknown;
1389 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1390 response & 0xff, response >> 8,
1391 intel_sdvo_connector->output_flag);
1394 return connector_status_disconnected;
1396 intel_sdvo->attached_output = response;
1398 if ((intel_sdvo_connector->output_flag & response) == 0)
1399 ret = connector_status_disconnected;
1400 else if (response & SDVO_TMDS_MASK)
1401 ret = intel_sdvo_hdmi_sink_detect(connector);
1403 ret = connector_status_connected;
1405 /* May update encoder flag for like clock for SDVO TV, etc.*/
1406 if (ret == connector_status_connected) {
1407 intel_sdvo->is_tv = false;
1408 intel_sdvo->is_lvds = false;
1409 intel_sdvo->base.needs_tv_clock = false;
1411 if (response & SDVO_TV_MASK) {
1412 intel_sdvo->is_tv = true;
1413 intel_sdvo->base.needs_tv_clock = true;
1415 if (response & SDVO_LVDS_MASK)
1416 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1422 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1426 /* set the bus switch and get the modes */
1427 edid = intel_sdvo_get_edid(connector);
1430 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1431 * link between analog and digital outputs. So, if the regular SDVO
1432 * DDC fails, check to see if the analog output is disconnected, in
1433 * which case we'll look there for the digital DDC data.
1436 edid = intel_sdvo_get_analog_edid(connector);
1439 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1440 drm_mode_connector_update_edid_property(connector, edid);
1441 drm_add_edid_modes(connector, edid);
1443 connector->display_info.raw_edid = NULL;
1449 * Set of SDVO TV modes.
1450 * Note! This is in reply order (see loop in get_tv_modes).
1451 * XXX: all 60Hz refresh?
1453 struct drm_display_mode sdvo_tv_modes[] = {
1454 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1455 416, 0, 200, 201, 232, 233, 0,
1456 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1457 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1458 416, 0, 240, 241, 272, 273, 0,
1459 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1460 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1461 496, 0, 300, 301, 332, 333, 0,
1462 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1463 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1464 736, 0, 350, 351, 382, 383, 0,
1465 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1466 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1467 736, 0, 400, 401, 432, 433, 0,
1468 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1469 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1470 736, 0, 480, 481, 512, 513, 0,
1471 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1472 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1473 800, 0, 480, 481, 512, 513, 0,
1474 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1475 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1476 800, 0, 576, 577, 608, 609, 0,
1477 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1478 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1479 816, 0, 350, 351, 382, 383, 0,
1480 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1481 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1482 816, 0, 400, 401, 432, 433, 0,
1483 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1484 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1485 816, 0, 480, 481, 512, 513, 0,
1486 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1487 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1488 816, 0, 540, 541, 572, 573, 0,
1489 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1490 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1491 816, 0, 576, 577, 608, 609, 0,
1492 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1493 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1494 864, 0, 576, 577, 608, 609, 0,
1495 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1496 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1497 896, 0, 600, 601, 632, 633, 0,
1498 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1499 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1500 928, 0, 624, 625, 656, 657, 0,
1501 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1502 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1503 1016, 0, 766, 767, 798, 799, 0,
1504 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1505 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1506 1120, 0, 768, 769, 800, 801, 0,
1507 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1508 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1509 1376, 0, 1024, 1025, 1056, 1057, 0,
1510 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1513 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1515 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1516 struct intel_sdvo_sdtv_resolution_request tv_res;
1517 uint32_t reply = 0, format_map = 0;
1520 /* Read the list of supported input resolutions for the selected TV
1523 format_map = 1 << intel_sdvo->tv_format_index;
1524 memcpy(&tv_res, &format_map,
1525 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1527 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1530 BUILD_BUG_ON(sizeof(tv_res) != 3);
1531 if (!intel_sdvo_write_cmd(intel_sdvo,
1532 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1533 &tv_res, sizeof(tv_res)))
1535 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1538 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1539 if (reply & (1 << i)) {
1540 struct drm_display_mode *nmode;
1541 nmode = drm_mode_duplicate(connector->dev,
1544 drm_mode_probed_add(connector, nmode);
1548 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1550 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1551 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1552 struct drm_display_mode *newmode;
1555 * Attempt to get the mode list from DDC.
1556 * Assume that the preferred modes are
1557 * arranged in priority order.
1559 intel_ddc_get_modes(connector, intel_sdvo->i2c);
1560 if (list_empty(&connector->probed_modes) == false)
1563 /* Fetch modes from VBT */
1564 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1565 newmode = drm_mode_duplicate(connector->dev,
1566 dev_priv->sdvo_lvds_vbt_mode);
1567 if (newmode != NULL) {
1568 /* Guarantee the mode is preferred */
1569 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1570 DRM_MODE_TYPE_DRIVER);
1571 drm_mode_probed_add(connector, newmode);
1576 list_for_each_entry(newmode, &connector->probed_modes, head) {
1577 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1578 intel_sdvo->sdvo_lvds_fixed_mode =
1579 drm_mode_duplicate(connector->dev, newmode);
1581 drm_mode_set_crtcinfo(intel_sdvo->sdvo_lvds_fixed_mode,
1584 intel_sdvo->is_lvds = true;
1591 static int intel_sdvo_get_modes(struct drm_connector *connector)
1593 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1595 if (IS_TV(intel_sdvo_connector))
1596 intel_sdvo_get_tv_modes(connector);
1597 else if (IS_LVDS(intel_sdvo_connector))
1598 intel_sdvo_get_lvds_modes(connector);
1600 intel_sdvo_get_ddc_modes(connector);
1602 return !list_empty(&connector->probed_modes);
1606 intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1608 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1609 struct drm_device *dev = connector->dev;
1611 if (intel_sdvo_connector->left)
1612 drm_property_destroy(dev, intel_sdvo_connector->left);
1613 if (intel_sdvo_connector->right)
1614 drm_property_destroy(dev, intel_sdvo_connector->right);
1615 if (intel_sdvo_connector->top)
1616 drm_property_destroy(dev, intel_sdvo_connector->top);
1617 if (intel_sdvo_connector->bottom)
1618 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1619 if (intel_sdvo_connector->hpos)
1620 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1621 if (intel_sdvo_connector->vpos)
1622 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1623 if (intel_sdvo_connector->saturation)
1624 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1625 if (intel_sdvo_connector->contrast)
1626 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1627 if (intel_sdvo_connector->hue)
1628 drm_property_destroy(dev, intel_sdvo_connector->hue);
1629 if (intel_sdvo_connector->sharpness)
1630 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1631 if (intel_sdvo_connector->flicker_filter)
1632 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1633 if (intel_sdvo_connector->flicker_filter_2d)
1634 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1635 if (intel_sdvo_connector->flicker_filter_adaptive)
1636 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1637 if (intel_sdvo_connector->tv_luma_filter)
1638 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1639 if (intel_sdvo_connector->tv_chroma_filter)
1640 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
1641 if (intel_sdvo_connector->dot_crawl)
1642 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
1643 if (intel_sdvo_connector->brightness)
1644 drm_property_destroy(dev, intel_sdvo_connector->brightness);
1647 static void intel_sdvo_destroy(struct drm_connector *connector)
1649 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1651 if (intel_sdvo_connector->tv_format)
1652 drm_property_destroy(connector->dev,
1653 intel_sdvo_connector->tv_format);
1655 intel_sdvo_destroy_enhance_property(connector);
1656 drm_sysfs_connector_remove(connector);
1657 drm_connector_cleanup(connector);
1662 intel_sdvo_set_property(struct drm_connector *connector,
1663 struct drm_property *property,
1666 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1667 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1668 uint16_t temp_value;
1672 ret = drm_connector_property_set_value(connector, property, val);
1676 if (property == intel_sdvo_connector->force_audio_property) {
1677 if (val == intel_sdvo_connector->force_audio)
1680 intel_sdvo_connector->force_audio = val;
1682 if (val > 0 && intel_sdvo->has_hdmi_audio)
1684 if (val < 0 && !intel_sdvo->has_hdmi_audio)
1687 intel_sdvo->has_hdmi_audio = val > 0;
1691 #define CHECK_PROPERTY(name, NAME) \
1692 if (intel_sdvo_connector->name == property) { \
1693 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1694 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1695 cmd = SDVO_CMD_SET_##NAME; \
1696 intel_sdvo_connector->cur_##name = temp_value; \
1700 if (property == intel_sdvo_connector->tv_format) {
1701 if (val >= TV_FORMAT_NUM)
1704 if (intel_sdvo->tv_format_index ==
1705 intel_sdvo_connector->tv_format_supported[val])
1708 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
1710 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
1712 if (intel_sdvo_connector->left == property) {
1713 drm_connector_property_set_value(connector,
1714 intel_sdvo_connector->right, val);
1715 if (intel_sdvo_connector->left_margin == temp_value)
1718 intel_sdvo_connector->left_margin = temp_value;
1719 intel_sdvo_connector->right_margin = temp_value;
1720 temp_value = intel_sdvo_connector->max_hscan -
1721 intel_sdvo_connector->left_margin;
1722 cmd = SDVO_CMD_SET_OVERSCAN_H;
1724 } else if (intel_sdvo_connector->right == property) {
1725 drm_connector_property_set_value(connector,
1726 intel_sdvo_connector->left, val);
1727 if (intel_sdvo_connector->right_margin == temp_value)
1730 intel_sdvo_connector->left_margin = temp_value;
1731 intel_sdvo_connector->right_margin = temp_value;
1732 temp_value = intel_sdvo_connector->max_hscan -
1733 intel_sdvo_connector->left_margin;
1734 cmd = SDVO_CMD_SET_OVERSCAN_H;
1736 } else if (intel_sdvo_connector->top == property) {
1737 drm_connector_property_set_value(connector,
1738 intel_sdvo_connector->bottom, val);
1739 if (intel_sdvo_connector->top_margin == temp_value)
1742 intel_sdvo_connector->top_margin = temp_value;
1743 intel_sdvo_connector->bottom_margin = temp_value;
1744 temp_value = intel_sdvo_connector->max_vscan -
1745 intel_sdvo_connector->top_margin;
1746 cmd = SDVO_CMD_SET_OVERSCAN_V;
1748 } else if (intel_sdvo_connector->bottom == property) {
1749 drm_connector_property_set_value(connector,
1750 intel_sdvo_connector->top, val);
1751 if (intel_sdvo_connector->bottom_margin == temp_value)
1754 intel_sdvo_connector->top_margin = temp_value;
1755 intel_sdvo_connector->bottom_margin = temp_value;
1756 temp_value = intel_sdvo_connector->max_vscan -
1757 intel_sdvo_connector->top_margin;
1758 cmd = SDVO_CMD_SET_OVERSCAN_V;
1761 CHECK_PROPERTY(hpos, HPOS)
1762 CHECK_PROPERTY(vpos, VPOS)
1763 CHECK_PROPERTY(saturation, SATURATION)
1764 CHECK_PROPERTY(contrast, CONTRAST)
1765 CHECK_PROPERTY(hue, HUE)
1766 CHECK_PROPERTY(brightness, BRIGHTNESS)
1767 CHECK_PROPERTY(sharpness, SHARPNESS)
1768 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1769 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1770 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1771 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1772 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
1773 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
1776 return -EINVAL; /* unknown property */
1779 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1784 if (intel_sdvo->base.base.crtc) {
1785 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
1786 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
1791 #undef CHECK_PROPERTY
1794 static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1795 .dpms = intel_sdvo_dpms,
1796 .mode_fixup = intel_sdvo_mode_fixup,
1797 .prepare = intel_encoder_prepare,
1798 .mode_set = intel_sdvo_mode_set,
1799 .commit = intel_encoder_commit,
1802 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
1803 .dpms = drm_helper_connector_dpms,
1804 .detect = intel_sdvo_detect,
1805 .fill_modes = drm_helper_probe_single_connector_modes,
1806 .set_property = intel_sdvo_set_property,
1807 .destroy = intel_sdvo_destroy,
1810 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1811 .get_modes = intel_sdvo_get_modes,
1812 .mode_valid = intel_sdvo_mode_valid,
1813 .best_encoder = intel_best_encoder,
1816 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
1818 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1820 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
1821 drm_mode_destroy(encoder->dev,
1822 intel_sdvo->sdvo_lvds_fixed_mode);
1824 i2c_del_adapter(&intel_sdvo->ddc);
1825 intel_encoder_destroy(encoder);
1828 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1829 .destroy = intel_sdvo_enc_destroy,
1833 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1836 unsigned int num_bits;
1838 /* Make a mask of outputs less than or equal to our own priority in the
1841 switch (sdvo->controlled_output) {
1842 case SDVO_OUTPUT_LVDS1:
1843 mask |= SDVO_OUTPUT_LVDS1;
1844 case SDVO_OUTPUT_LVDS0:
1845 mask |= SDVO_OUTPUT_LVDS0;
1846 case SDVO_OUTPUT_TMDS1:
1847 mask |= SDVO_OUTPUT_TMDS1;
1848 case SDVO_OUTPUT_TMDS0:
1849 mask |= SDVO_OUTPUT_TMDS0;
1850 case SDVO_OUTPUT_RGB1:
1851 mask |= SDVO_OUTPUT_RGB1;
1852 case SDVO_OUTPUT_RGB0:
1853 mask |= SDVO_OUTPUT_RGB0;
1857 /* Count bits to find what number we are in the priority list. */
1858 mask &= sdvo->caps.output_flags;
1859 num_bits = hweight16(mask);
1860 /* If more than 3 outputs, default to DDC bus 3 for now. */
1864 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1865 sdvo->ddc_bus = 1 << num_bits;
1869 * Choose the appropriate DDC bus for control bus switch command for this
1870 * SDVO output based on the controlled output.
1872 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1873 * outputs, then LVDS outputs.
1876 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
1877 struct intel_sdvo *sdvo, u32 reg)
1879 struct sdvo_device_mapping *mapping;
1882 mapping = &(dev_priv->sdvo_mappings[0]);
1884 mapping = &(dev_priv->sdvo_mappings[1]);
1886 if (mapping->initialized)
1887 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1889 intel_sdvo_guess_ddc_bus(sdvo);
1893 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
1894 struct intel_sdvo *sdvo, u32 reg)
1896 struct sdvo_device_mapping *mapping;
1900 mapping = &dev_priv->sdvo_mappings[0];
1902 mapping = &dev_priv->sdvo_mappings[1];
1904 pin = GMBUS_PORT_DPB;
1905 speed = GMBUS_RATE_1MHZ >> 8;
1906 if (mapping->initialized) {
1907 pin = mapping->i2c_pin;
1908 speed = mapping->i2c_speed;
1911 sdvo->i2c = &dev_priv->gmbus[pin].adapter;
1912 intel_gmbus_set_speed(sdvo->i2c, speed);
1913 intel_gmbus_force_bit(sdvo->i2c, true);
1917 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
1921 if (!intel_sdvo_check_supp_encode(intel_sdvo))
1924 if (!intel_sdvo_set_target_output(intel_sdvo,
1925 device == 0 ? SDVO_OUTPUT_TMDS0 : SDVO_OUTPUT_TMDS1))
1929 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE, &is_hdmi, 1))
1936 intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg)
1938 struct drm_i915_private *dev_priv = dev->dev_private;
1939 struct sdvo_device_mapping *my_mapping, *other_mapping;
1941 if (IS_SDVOB(sdvo_reg)) {
1942 my_mapping = &dev_priv->sdvo_mappings[0];
1943 other_mapping = &dev_priv->sdvo_mappings[1];
1945 my_mapping = &dev_priv->sdvo_mappings[1];
1946 other_mapping = &dev_priv->sdvo_mappings[0];
1949 /* If the BIOS described our SDVO device, take advantage of it. */
1950 if (my_mapping->slave_addr)
1951 return my_mapping->slave_addr;
1953 /* If the BIOS only described a different SDVO device, use the
1954 * address that it isn't using.
1956 if (other_mapping->slave_addr) {
1957 if (other_mapping->slave_addr == 0x70)
1963 /* No SDVO device info is found for another DVO port,
1964 * so use mapping assumption we had before BIOS parsing.
1966 if (IS_SDVOB(sdvo_reg))
1973 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
1974 struct intel_sdvo *encoder)
1976 drm_connector_init(encoder->base.base.dev,
1977 &connector->base.base,
1978 &intel_sdvo_connector_funcs,
1979 connector->base.base.connector_type);
1981 drm_connector_helper_add(&connector->base.base,
1982 &intel_sdvo_connector_helper_funcs);
1984 connector->base.base.interlace_allowed = 0;
1985 connector->base.base.doublescan_allowed = 0;
1986 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
1988 intel_connector_attach_encoder(&connector->base, &encoder->base);
1989 drm_sysfs_connector_add(&connector->base.base);
1993 intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
1995 struct drm_device *dev = connector->base.base.dev;
1997 connector->force_audio_property =
1998 drm_property_create(dev, DRM_MODE_PROP_RANGE, "force_audio", 2);
1999 if (connector->force_audio_property) {
2000 connector->force_audio_property->values[0] = -1;
2001 connector->force_audio_property->values[1] = 1;
2002 drm_connector_attach_property(&connector->base.base,
2003 connector->force_audio_property, 0);
2008 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2010 struct drm_encoder *encoder = &intel_sdvo->base.base;
2011 struct drm_connector *connector;
2012 struct intel_connector *intel_connector;
2013 struct intel_sdvo_connector *intel_sdvo_connector;
2015 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2016 if (!intel_sdvo_connector)
2020 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2021 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2022 } else if (device == 1) {
2023 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2024 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2027 intel_connector = &intel_sdvo_connector->base;
2028 connector = &intel_connector->base;
2029 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2030 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2031 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2033 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2034 /* enable hdmi encoding mode if supported */
2035 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
2036 intel_sdvo_set_colorimetry(intel_sdvo,
2037 SDVO_COLORIMETRY_RGB256);
2038 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2040 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
2041 intel_sdvo->is_hdmi = true;
2043 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2044 (1 << INTEL_ANALOG_CLONE_BIT));
2046 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2052 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2054 struct drm_encoder *encoder = &intel_sdvo->base.base;
2055 struct drm_connector *connector;
2056 struct intel_connector *intel_connector;
2057 struct intel_sdvo_connector *intel_sdvo_connector;
2059 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2060 if (!intel_sdvo_connector)
2063 intel_connector = &intel_sdvo_connector->base;
2064 connector = &intel_connector->base;
2065 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2066 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2068 intel_sdvo->controlled_output |= type;
2069 intel_sdvo_connector->output_flag = type;
2071 intel_sdvo->is_tv = true;
2072 intel_sdvo->base.needs_tv_clock = true;
2073 intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
2075 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2077 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2080 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2086 intel_sdvo_destroy(connector);
2091 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2093 struct drm_encoder *encoder = &intel_sdvo->base.base;
2094 struct drm_connector *connector;
2095 struct intel_connector *intel_connector;
2096 struct intel_sdvo_connector *intel_sdvo_connector;
2098 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2099 if (!intel_sdvo_connector)
2102 intel_connector = &intel_sdvo_connector->base;
2103 connector = &intel_connector->base;
2104 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2105 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2106 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2109 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2110 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2111 } else if (device == 1) {
2112 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2113 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2116 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2117 (1 << INTEL_ANALOG_CLONE_BIT));
2119 intel_sdvo_connector_init(intel_sdvo_connector,
2125 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2127 struct drm_encoder *encoder = &intel_sdvo->base.base;
2128 struct drm_connector *connector;
2129 struct intel_connector *intel_connector;
2130 struct intel_sdvo_connector *intel_sdvo_connector;
2132 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2133 if (!intel_sdvo_connector)
2136 intel_connector = &intel_sdvo_connector->base;
2137 connector = &intel_connector->base;
2138 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2139 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2142 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2143 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2144 } else if (device == 1) {
2145 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2146 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2149 intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
2150 (1 << INTEL_SDVO_LVDS_CLONE_BIT));
2152 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2153 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2159 intel_sdvo_destroy(connector);
2164 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2166 intel_sdvo->is_tv = false;
2167 intel_sdvo->base.needs_tv_clock = false;
2168 intel_sdvo->is_lvds = false;
2170 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2172 if (flags & SDVO_OUTPUT_TMDS0)
2173 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2176 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2177 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2180 /* TV has no XXX1 function block */
2181 if (flags & SDVO_OUTPUT_SVID0)
2182 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2185 if (flags & SDVO_OUTPUT_CVBS0)
2186 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2189 if (flags & SDVO_OUTPUT_RGB0)
2190 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2193 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2194 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2197 if (flags & SDVO_OUTPUT_LVDS0)
2198 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2201 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2202 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2205 if ((flags & SDVO_OUTPUT_MASK) == 0) {
2206 unsigned char bytes[2];
2208 intel_sdvo->controlled_output = 0;
2209 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2210 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2211 SDVO_NAME(intel_sdvo),
2212 bytes[0], bytes[1]);
2215 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1);
2220 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2221 struct intel_sdvo_connector *intel_sdvo_connector,
2224 struct drm_device *dev = intel_sdvo->base.base.dev;
2225 struct intel_sdvo_tv_format format;
2226 uint32_t format_map, i;
2228 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2231 if (!intel_sdvo_get_value(intel_sdvo,
2232 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2233 &format, sizeof(format)))
2236 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2238 if (format_map == 0)
2241 intel_sdvo_connector->format_supported_num = 0;
2242 for (i = 0 ; i < TV_FORMAT_NUM; i++)
2243 if (format_map & (1 << i))
2244 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2247 intel_sdvo_connector->tv_format =
2248 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2249 "mode", intel_sdvo_connector->format_supported_num);
2250 if (!intel_sdvo_connector->tv_format)
2253 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2254 drm_property_add_enum(
2255 intel_sdvo_connector->tv_format, i,
2256 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2258 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2259 drm_connector_attach_property(&intel_sdvo_connector->base.base,
2260 intel_sdvo_connector->tv_format, 0);
2265 #define ENHANCEMENT(name, NAME) do { \
2266 if (enhancements.name) { \
2267 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2268 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2270 intel_sdvo_connector->max_##name = data_value[0]; \
2271 intel_sdvo_connector->cur_##name = response; \
2272 intel_sdvo_connector->name = \
2273 drm_property_create(dev, DRM_MODE_PROP_RANGE, #name, 2); \
2274 if (!intel_sdvo_connector->name) return false; \
2275 intel_sdvo_connector->name->values[0] = 0; \
2276 intel_sdvo_connector->name->values[1] = data_value[0]; \
2277 drm_connector_attach_property(connector, \
2278 intel_sdvo_connector->name, \
2279 intel_sdvo_connector->cur_##name); \
2280 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2281 data_value[0], data_value[1], response); \
2286 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2287 struct intel_sdvo_connector *intel_sdvo_connector,
2288 struct intel_sdvo_enhancements_reply enhancements)
2290 struct drm_device *dev = intel_sdvo->base.base.dev;
2291 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2292 uint16_t response, data_value[2];
2294 /* when horizontal overscan is supported, Add the left/right property */
2295 if (enhancements.overscan_h) {
2296 if (!intel_sdvo_get_value(intel_sdvo,
2297 SDVO_CMD_GET_MAX_OVERSCAN_H,
2301 if (!intel_sdvo_get_value(intel_sdvo,
2302 SDVO_CMD_GET_OVERSCAN_H,
2306 intel_sdvo_connector->max_hscan = data_value[0];
2307 intel_sdvo_connector->left_margin = data_value[0] - response;
2308 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2309 intel_sdvo_connector->left =
2310 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2312 if (!intel_sdvo_connector->left)
2315 intel_sdvo_connector->left->values[0] = 0;
2316 intel_sdvo_connector->left->values[1] = data_value[0];
2317 drm_connector_attach_property(connector,
2318 intel_sdvo_connector->left,
2319 intel_sdvo_connector->left_margin);
2321 intel_sdvo_connector->right =
2322 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2324 if (!intel_sdvo_connector->right)
2327 intel_sdvo_connector->right->values[0] = 0;
2328 intel_sdvo_connector->right->values[1] = data_value[0];
2329 drm_connector_attach_property(connector,
2330 intel_sdvo_connector->right,
2331 intel_sdvo_connector->right_margin);
2332 DRM_DEBUG_KMS("h_overscan: max %d, "
2333 "default %d, current %d\n",
2334 data_value[0], data_value[1], response);
2337 if (enhancements.overscan_v) {
2338 if (!intel_sdvo_get_value(intel_sdvo,
2339 SDVO_CMD_GET_MAX_OVERSCAN_V,
2343 if (!intel_sdvo_get_value(intel_sdvo,
2344 SDVO_CMD_GET_OVERSCAN_V,
2348 intel_sdvo_connector->max_vscan = data_value[0];
2349 intel_sdvo_connector->top_margin = data_value[0] - response;
2350 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2351 intel_sdvo_connector->top =
2352 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2354 if (!intel_sdvo_connector->top)
2357 intel_sdvo_connector->top->values[0] = 0;
2358 intel_sdvo_connector->top->values[1] = data_value[0];
2359 drm_connector_attach_property(connector,
2360 intel_sdvo_connector->top,
2361 intel_sdvo_connector->top_margin);
2363 intel_sdvo_connector->bottom =
2364 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2365 "bottom_margin", 2);
2366 if (!intel_sdvo_connector->bottom)
2369 intel_sdvo_connector->bottom->values[0] = 0;
2370 intel_sdvo_connector->bottom->values[1] = data_value[0];
2371 drm_connector_attach_property(connector,
2372 intel_sdvo_connector->bottom,
2373 intel_sdvo_connector->bottom_margin);
2374 DRM_DEBUG_KMS("v_overscan: max %d, "
2375 "default %d, current %d\n",
2376 data_value[0], data_value[1], response);
2379 ENHANCEMENT(hpos, HPOS);
2380 ENHANCEMENT(vpos, VPOS);
2381 ENHANCEMENT(saturation, SATURATION);
2382 ENHANCEMENT(contrast, CONTRAST);
2383 ENHANCEMENT(hue, HUE);
2384 ENHANCEMENT(sharpness, SHARPNESS);
2385 ENHANCEMENT(brightness, BRIGHTNESS);
2386 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2387 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2388 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2389 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2390 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2392 if (enhancements.dot_crawl) {
2393 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2396 intel_sdvo_connector->max_dot_crawl = 1;
2397 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2398 intel_sdvo_connector->dot_crawl =
2399 drm_property_create(dev, DRM_MODE_PROP_RANGE, "dot_crawl", 2);
2400 if (!intel_sdvo_connector->dot_crawl)
2403 intel_sdvo_connector->dot_crawl->values[0] = 0;
2404 intel_sdvo_connector->dot_crawl->values[1] = 1;
2405 drm_connector_attach_property(connector,
2406 intel_sdvo_connector->dot_crawl,
2407 intel_sdvo_connector->cur_dot_crawl);
2408 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2415 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2416 struct intel_sdvo_connector *intel_sdvo_connector,
2417 struct intel_sdvo_enhancements_reply enhancements)
2419 struct drm_device *dev = intel_sdvo->base.base.dev;
2420 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2421 uint16_t response, data_value[2];
2423 ENHANCEMENT(brightness, BRIGHTNESS);
2429 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2430 struct intel_sdvo_connector *intel_sdvo_connector)
2433 struct intel_sdvo_enhancements_reply reply;
2437 enhancements.response = 0;
2438 intel_sdvo_get_value(intel_sdvo,
2439 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2440 &enhancements, sizeof(enhancements));
2441 if (enhancements.response == 0) {
2442 DRM_DEBUG_KMS("No enhancement is supported\n");
2446 if (IS_TV(intel_sdvo_connector))
2447 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2448 else if(IS_LVDS(intel_sdvo_connector))
2449 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2454 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2455 struct i2c_msg *msgs,
2458 struct intel_sdvo *sdvo = adapter->algo_data;
2460 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2463 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2466 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2468 struct intel_sdvo *sdvo = adapter->algo_data;
2469 return sdvo->i2c->algo->functionality(sdvo->i2c);
2472 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2473 .master_xfer = intel_sdvo_ddc_proxy_xfer,
2474 .functionality = intel_sdvo_ddc_proxy_func
2478 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2479 struct drm_device *dev)
2481 sdvo->ddc.owner = THIS_MODULE;
2482 sdvo->ddc.class = I2C_CLASS_DDC;
2483 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2484 sdvo->ddc.dev.parent = &dev->pdev->dev;
2485 sdvo->ddc.algo_data = sdvo;
2486 sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2488 return i2c_add_adapter(&sdvo->ddc) == 0;
2491 bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
2493 struct drm_i915_private *dev_priv = dev->dev_private;
2494 struct intel_encoder *intel_encoder;
2495 struct intel_sdvo *intel_sdvo;
2498 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2502 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
2507 intel_sdvo->sdvo_reg = sdvo_reg;
2509 intel_encoder = &intel_sdvo->base;
2510 intel_encoder->type = INTEL_OUTPUT_SDVO;
2511 /* encoder type will be decided later */
2512 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2514 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg) >> 1;
2515 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
2517 /* Read the regs to test if we can talk to the device */
2518 for (i = 0; i < 0x40; i++) {
2521 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2522 DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
2523 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2528 if (IS_SDVOB(sdvo_reg))
2529 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
2531 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
2533 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
2535 /* In default case sdvo lvds is false */
2536 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2539 if (intel_sdvo_output_setup(intel_sdvo,
2540 intel_sdvo->caps.output_flags) != true) {
2541 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
2542 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2546 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2548 /* Set the input timing to the screen. Assume always input 0. */
2549 if (!intel_sdvo_set_target_input(intel_sdvo))
2552 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2553 &intel_sdvo->pixel_clock_min,
2554 &intel_sdvo->pixel_clock_max))
2557 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2558 "clock range %dMHz - %dMHz, "
2559 "input 1: %c, input 2: %c, "
2560 "output 1: %c, output 2: %c\n",
2561 SDVO_NAME(intel_sdvo),
2562 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2563 intel_sdvo->caps.device_rev_id,
2564 intel_sdvo->pixel_clock_min / 1000,
2565 intel_sdvo->pixel_clock_max / 1000,
2566 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2567 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2568 /* check currently supported outputs */
2569 intel_sdvo->caps.output_flags &
2570 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2571 intel_sdvo->caps.output_flags &
2572 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2576 drm_encoder_cleanup(&intel_encoder->base);
2577 i2c_del_adapter(&intel_sdvo->ddc);