2 * Copyright 2012 Red Hat Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
25 #include <core/object.h>
26 #include <core/gpuobj.h>
28 #include <subdev/instmem.h>
29 #include <subdev/bar.h>
30 #include <subdev/vm.h>
33 nouveau_gpuobj_destroy(struct nouveau_gpuobj *gpuobj)
37 if (gpuobj->flags & NVOBJ_FLAG_ZERO_FREE) {
38 for (i = 0; i < gpuobj->size; i += 4)
39 nv_wo32(gpuobj, i, 0x00000000);
42 if (gpuobj->heap.block_size)
43 nouveau_mm_fini(&gpuobj->heap);
45 nouveau_object_destroy(&gpuobj->base);
49 nouveau_gpuobj_create_(struct nouveau_object *parent,
50 struct nouveau_object *engine,
51 struct nouveau_oclass *oclass, u32 pclass,
52 struct nouveau_object *pargpu,
53 u32 size, u32 align, u32 flags,
54 int length, void **pobject)
56 struct nouveau_instmem *imem = nouveau_instmem(parent);
57 struct nouveau_bar *bar = nouveau_bar(parent);
58 struct nouveau_gpuobj *gpuobj;
59 struct nouveau_mm *heap = NULL;
66 while ((pargpu = nv_pclass(pargpu, NV_GPUOBJ_CLASS))) {
67 if (nv_gpuobj(pargpu)->heap.block_size)
69 pargpu = pargpu->parent;
72 if (unlikely(pargpu == NULL)) {
73 nv_error(parent, "no gpuobj heap\n");
77 addr = nv_gpuobj(pargpu)->addr;
78 heap = &nv_gpuobj(pargpu)->heap;
79 atomic_inc(&parent->refcount);
81 ret = imem->alloc(imem, parent, size, align, &parent);
86 addr = nv_memobj(pargpu)->addr;
87 size = nv_memobj(pargpu)->size;
89 if (bar && bar->alloc) {
90 struct nouveau_instobj *iobj = (void *)parent;
91 struct nouveau_mem **mem = (void *)(iobj + 1);
92 struct nouveau_mem *node = *mem;
93 if (!bar->alloc(bar, parent, node, &pargpu)) {
94 nouveau_object_ref(NULL, &parent);
100 ret = nouveau_object_create_(parent, engine, oclass, pclass |
101 NV_GPUOBJ_CLASS, length, pobject);
102 nouveau_object_ref(NULL, &parent);
107 gpuobj->parent = pargpu;
108 gpuobj->flags = flags;
113 ret = nouveau_mm_head(heap, 1, size, size,
114 max(align, (u32)1), &gpuobj->node);
118 gpuobj->addr += gpuobj->node->offset;
121 if (gpuobj->flags & NVOBJ_FLAG_HEAP) {
122 ret = nouveau_mm_init(&gpuobj->heap, 0, gpuobj->size, 1);
127 if (flags & NVOBJ_FLAG_ZERO_ALLOC) {
128 for (i = 0; i < gpuobj->size; i += 4)
129 nv_wo32(gpuobj, i, 0x00000000);
135 struct nouveau_gpuobj_class {
136 struct nouveau_object *pargpu;
143 _nouveau_gpuobj_ctor(struct nouveau_object *parent,
144 struct nouveau_object *engine,
145 struct nouveau_oclass *oclass, void *data, u32 size,
146 struct nouveau_object **pobject)
148 struct nouveau_gpuobj_class *args = data;
149 struct nouveau_gpuobj *object;
152 ret = nouveau_gpuobj_create(parent, engine, oclass, 0, args->pargpu,
153 args->size, args->align, args->flags,
155 *pobject = nv_object(object);
163 _nouveau_gpuobj_dtor(struct nouveau_object *object)
165 nouveau_gpuobj_destroy(nv_gpuobj(object));
169 _nouveau_gpuobj_init(struct nouveau_object *object)
171 return nouveau_gpuobj_init(nv_gpuobj(object));
175 _nouveau_gpuobj_fini(struct nouveau_object *object, bool suspend)
177 return nouveau_gpuobj_fini(nv_gpuobj(object), suspend);
181 _nouveau_gpuobj_rd32(struct nouveau_object *object, u32 addr)
183 struct nouveau_gpuobj *gpuobj = nv_gpuobj(object);
184 struct nouveau_ofuncs *pfuncs = nv_ofuncs(gpuobj->parent);
186 addr += gpuobj->node->offset;
187 return pfuncs->rd32(gpuobj->parent, addr);
191 _nouveau_gpuobj_wr32(struct nouveau_object *object, u32 addr, u32 data)
193 struct nouveau_gpuobj *gpuobj = nv_gpuobj(object);
194 struct nouveau_ofuncs *pfuncs = nv_ofuncs(gpuobj->parent);
196 addr += gpuobj->node->offset;
197 pfuncs->wr32(gpuobj->parent, addr, data);
200 static struct nouveau_oclass
201 _nouveau_gpuobj_oclass = {
202 .handle = 0x00000000,
203 .ofuncs = &(struct nouveau_ofuncs) {
204 .ctor = _nouveau_gpuobj_ctor,
205 .dtor = _nouveau_gpuobj_dtor,
206 .init = _nouveau_gpuobj_init,
207 .fini = _nouveau_gpuobj_fini,
208 .rd32 = _nouveau_gpuobj_rd32,
209 .wr32 = _nouveau_gpuobj_wr32,
214 nouveau_gpuobj_new(struct nouveau_object *parent, struct nouveau_object *pargpu,
215 u32 size, u32 align, u32 flags,
216 struct nouveau_gpuobj **pgpuobj)
218 struct nouveau_object *engine = parent;
219 struct nouveau_gpuobj_class args = {
226 if (!nv_iclass(engine, NV_SUBDEV_CLASS))
227 engine = engine->engine;
228 BUG_ON(engine == NULL);
230 return nouveau_object_ctor(parent, engine, &_nouveau_gpuobj_oclass,
232 (struct nouveau_object **)pgpuobj);
236 nouveau_gpuobj_map(struct nouveau_gpuobj *gpuobj, u32 access,
237 struct nouveau_vma *vma)
239 struct nouveau_bar *bar = nouveau_bar(gpuobj);
242 if (bar && bar->umap) {
243 struct nouveau_instobj *iobj = (void *)
244 nv_pclass(nv_object(gpuobj), NV_MEMOBJ_CLASS);
245 struct nouveau_mem **mem = (void *)(iobj + 1);
246 ret = bar->umap(bar, *mem, access, vma);
253 nouveau_gpuobj_map_vm(struct nouveau_gpuobj *gpuobj, struct nouveau_vm *vm,
254 u32 access, struct nouveau_vma *vma)
256 struct nouveau_instobj *iobj = (void *)
257 nv_pclass(nv_object(gpuobj), NV_MEMOBJ_CLASS);
258 struct nouveau_mem **mem = (void *)(iobj + 1);
261 ret = nouveau_vm_get(vm, gpuobj->size, 12, access, vma);
265 nouveau_vm_map(vma, *mem);
270 nouveau_gpuobj_unmap(struct nouveau_vma *vma)
273 nouveau_vm_unmap(vma);
278 /* the below is basically only here to support sharing the paged dma object
279 * for PCI(E)GART on <=nv4x chipsets, and should *not* be expected to work
284 nouveau_gpudup_dtor(struct nouveau_object *object)
286 struct nouveau_gpuobj *gpuobj = (void *)object;
287 nouveau_object_ref(NULL, &gpuobj->parent);
288 nouveau_object_destroy(&gpuobj->base);
291 static struct nouveau_oclass
292 nouveau_gpudup_oclass = {
293 .handle = NV_GPUOBJ_CLASS,
294 .ofuncs = &(struct nouveau_ofuncs) {
295 .dtor = nouveau_gpudup_dtor,
296 .init = nouveau_object_init,
297 .fini = nouveau_object_fini,
302 nouveau_gpuobj_dup(struct nouveau_object *parent, struct nouveau_gpuobj *base,
303 struct nouveau_gpuobj **pgpuobj)
305 struct nouveau_gpuobj *gpuobj;
308 ret = nouveau_object_create(parent, parent->engine,
309 &nouveau_gpudup_oclass, 0, &gpuobj);
314 nouveau_object_ref(nv_object(base), &gpuobj->parent);
315 gpuobj->addr = base->addr;
316 gpuobj->size = base->size;