2 * Copyright 2007-2008 Nouveau Project
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
24 #ifndef __NOUVEAU_BIOS_H__
25 #define __NOUVEAU_BIOS_H__
28 #include "nouveau_i2c.h"
30 #define DCB_MAX_NUM_ENTRIES 16
31 #define DCB_MAX_NUM_I2C_ENTRIES 16
32 #define DCB_MAX_NUM_GPIO_ENTRIES 32
33 #define DCB_MAX_NUM_CONNECTOR_ENTRIES 16
35 #define DCB_LOC_ON_CHIP 0
38 int index; /* may not be raw dcb index if merging has happened */
46 bool duallink_possible;
56 bool use_straps_for_mode;
57 bool use_power_scripts;
60 bool has_component_output;
71 bool i2c_upper_default;
74 struct dcb_i2c_entry {
77 struct nouveau_i2c_chan *chan;
82 struct dcb_entry entry[DCB_MAX_NUM_ENTRIES];
83 struct dcb_i2c_entry i2c[DCB_MAX_NUM_I2C_ENTRIES];
87 DCB_GPIO_TVDAC0 = 0xc,
88 DCB_GPIO_TVDAC1 = 0x2d,
91 struct dcb_gpio_entry {
92 enum dcb_gpio_tag tag;
97 struct parsed_dcb_gpio {
99 struct dcb_gpio_entry entry[DCB_MAX_NUM_GPIO_ENTRIES];
102 struct dcb_connector_table_entry {
109 struct dcb_connector_table {
111 struct dcb_connector_table_entry entry[DCB_MAX_NUM_CONNECTOR_ENTRIES];
114 struct bios_parsed_dcb {
117 struct parsed_dcb dcb;
120 uint8_t i2c_default_indices;
122 uint16_t gpio_table_ptr;
123 struct parsed_dcb_gpio gpio;
124 uint16_t connector_table_ptr;
125 struct dcb_connector_table connector;
128 enum nouveau_encoder_type {
144 /* Order *does* matter here */
153 /* changing these requires matching changes to reg tables in nv_get_clock */
154 #define MAX_PLL_TYPES 4
177 * for most pre nv50 cards setting a log2P of 7 (the common max_log2p
178 * value) is no different to 6 (at least for vplls) so allowing the MNP
179 * calc to use 7 causes the generated clock to be out by a factor of 2.
180 * however, max_log2p cannot be fixed-up during parsing as the
181 * unmodified max_log2p value is still needed for setting mplls, hence
182 * an additional max_usable_log2p member
184 uint8_t max_usable_log2p;
193 struct nouveau_bios_info {
194 struct parsed_dcb *dcb;
196 uint8_t chip_version;
199 uint32_t tvdactestval;
200 uint8_t digital_min_front_porch;
205 struct drm_device *dev;
206 struct nouveau_bios_info pub;
210 uint8_t data[NV_PROM_SIZE];
214 uint8_t major_version;
215 uint8_t feature_byte;
218 uint32_t fmaxvco, fminvco;
221 uint16_t init_script_tbls_ptr;
222 uint16_t extra_init_script_tbl_ptr;
223 uint16_t macro_index_tbl_ptr;
224 uint16_t macro_tbl_ptr;
225 uint16_t condition_tbl_ptr;
226 uint16_t io_condition_tbl_ptr;
227 uint16_t io_flag_condition_tbl_ptr;
228 uint16_t init_function_tbl_ptr;
230 uint16_t pll_limit_tbl_ptr;
231 uint16_t ram_restrict_tbl_ptr;
232 uint8_t ram_restrict_group_count;
234 uint16_t some_script_ptr; /* BIT I + 14 */
235 uint16_t init96_tbl_ptr; /* BIT I + 16 */
237 struct bios_parsed_dcb bdcb;
241 /* these need remembering across suspend */
242 uint32_t saved_nv_pfb_cfg0;
246 struct dcb_entry *output;
247 uint16_t script_table_ptr;
248 uint16_t dp_table_ptr;
252 uint16_t fptablepointer; /* also used by tmds */
253 uint16_t fpxlatetableptr;
255 uint16_t lvdsmanufacturerpointer;
256 uint16_t fpxlatemanufacturertableptr;
258 uint16_t xlated_entry;
259 bool power_off_for_reset;
260 bool reset_after_pclk_change;
262 bool link_c_increment;
265 int duallink_transition_clk;
266 uint8_t strapless_is_24bit;
269 /* will need resetting after suspend */
270 int last_script_invoc;
275 uint16_t output0_script_ptr;
276 uint16_t output1_script_ptr;
280 uint16_t mem_init_tbl_ptr;
281 uint16_t sdr_seq_tbl_ptr;
282 uint16_t ddr_seq_tbl_ptr;
285 uint8_t crt, tv, panel;
288 uint16_t lvds_single_a_script_ptr;