2 * Copyright (C) 2008 Maarten Maathuis.
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
28 #include <drm/drm_crtc_helper.h>
29 #include <drm/ttm/ttm_execbuf_util.h>
31 #include "nouveau_fbcon.h"
32 #include "dispnv04/hw.h"
33 #include "nouveau_crtc.h"
34 #include "nouveau_dma.h"
35 #include "nouveau_gem.h"
36 #include "nouveau_connector.h"
37 #include "nv50_display.h"
39 #include "nouveau_fence.h"
41 #include <subdev/bios/gpio.h>
42 #include <subdev/gpio.h>
43 #include <engine/disp.h>
45 #include <core/class.h>
48 nouveau_user_framebuffer_destroy(struct drm_framebuffer *drm_fb)
50 struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
53 drm_gem_object_unreference_unlocked(fb->nvbo->gem);
55 drm_framebuffer_cleanup(drm_fb);
60 nouveau_user_framebuffer_create_handle(struct drm_framebuffer *drm_fb,
61 struct drm_file *file_priv,
64 struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
66 return drm_gem_handle_create(file_priv, fb->nvbo->gem, handle);
69 static const struct drm_framebuffer_funcs nouveau_framebuffer_funcs = {
70 .destroy = nouveau_user_framebuffer_destroy,
71 .create_handle = nouveau_user_framebuffer_create_handle,
75 nouveau_framebuffer_init(struct drm_device *dev,
76 struct nouveau_framebuffer *nv_fb,
77 struct drm_mode_fb_cmd2 *mode_cmd,
78 struct nouveau_bo *nvbo)
80 struct nouveau_drm *drm = nouveau_drm(dev);
81 struct drm_framebuffer *fb = &nv_fb->base;
84 drm_helper_mode_fill_fb_struct(fb, mode_cmd);
87 if (nv_device(drm->device)->card_type >= NV_50) {
88 u32 tile_flags = nouveau_bo_tile_layout(nvbo);
89 if (tile_flags == 0x7a00 ||
91 nv_fb->r_dma = NvEvoFB32;
93 if (tile_flags == 0x7000)
94 nv_fb->r_dma = NvEvoFB16;
96 nv_fb->r_dma = NvEvoVRAM_LP;
99 case 8: nv_fb->r_format = 0x1e00; break;
100 case 15: nv_fb->r_format = 0xe900; break;
101 case 16: nv_fb->r_format = 0xe800; break;
103 case 32: nv_fb->r_format = 0xcf00; break;
104 case 30: nv_fb->r_format = 0xd100; break;
106 NV_ERROR(drm, "unknown depth %d\n", fb->depth);
110 if (nvbo->tile_flags & NOUVEAU_GEM_TILE_NONCONTIG) {
111 NV_ERROR(drm, "framebuffer requires contiguous bo\n");
115 if (nv_device(drm->device)->chipset == 0x50)
116 nv_fb->r_format |= (tile_flags << 8);
119 if (nv_device(drm->device)->card_type < NV_D0)
120 nv_fb->r_pitch = 0x00100000 | fb->pitches[0];
122 nv_fb->r_pitch = 0x01000000 | fb->pitches[0];
124 u32 mode = nvbo->tile_mode;
125 if (nv_device(drm->device)->card_type >= NV_C0)
127 nv_fb->r_pitch = ((fb->pitches[0] / 4) << 4) | mode;
131 ret = drm_framebuffer_init(dev, fb, &nouveau_framebuffer_funcs);
139 static struct drm_framebuffer *
140 nouveau_user_framebuffer_create(struct drm_device *dev,
141 struct drm_file *file_priv,
142 struct drm_mode_fb_cmd2 *mode_cmd)
144 struct nouveau_framebuffer *nouveau_fb;
145 struct drm_gem_object *gem;
148 gem = drm_gem_object_lookup(dev, file_priv, mode_cmd->handles[0]);
150 return ERR_PTR(-ENOENT);
152 nouveau_fb = kzalloc(sizeof(struct nouveau_framebuffer), GFP_KERNEL);
156 ret = nouveau_framebuffer_init(dev, nouveau_fb, mode_cmd, nouveau_gem_object(gem));
160 return &nouveau_fb->base;
165 drm_gem_object_unreference(gem);
169 static const struct drm_mode_config_funcs nouveau_mode_config_funcs = {
170 .fb_create = nouveau_user_framebuffer_create,
171 .output_poll_changed = nouveau_fbcon_output_poll_changed,
175 struct nouveau_drm_prop_enum_list {
181 static struct nouveau_drm_prop_enum_list underscan[] = {
182 { 6, UNDERSCAN_AUTO, "auto" },
183 { 6, UNDERSCAN_OFF, "off" },
184 { 6, UNDERSCAN_ON, "on" },
188 static struct nouveau_drm_prop_enum_list dither_mode[] = {
189 { 7, DITHERING_MODE_AUTO, "auto" },
190 { 7, DITHERING_MODE_OFF, "off" },
191 { 1, DITHERING_MODE_ON, "on" },
192 { 6, DITHERING_MODE_STATIC2X2, "static 2x2" },
193 { 6, DITHERING_MODE_DYNAMIC2X2, "dynamic 2x2" },
194 { 4, DITHERING_MODE_TEMPORAL, "temporal" },
198 static struct nouveau_drm_prop_enum_list dither_depth[] = {
199 { 6, DITHERING_DEPTH_AUTO, "auto" },
200 { 6, DITHERING_DEPTH_6BPC, "6 bpc" },
201 { 6, DITHERING_DEPTH_8BPC, "8 bpc" },
205 #define PROP_ENUM(p,gen,n,list) do { \
206 struct nouveau_drm_prop_enum_list *l = (list); \
208 while (l->gen_mask) { \
209 if (l->gen_mask & (1 << (gen))) \
214 p = drm_property_create(dev, DRM_MODE_PROP_ENUM, n, c); \
217 while (p && l->gen_mask) { \
218 if (l->gen_mask & (1 << (gen))) { \
219 drm_property_add_enum(p, c, l->type, l->name); \
228 nouveau_display_init(struct drm_device *dev)
230 struct nouveau_drm *drm = nouveau_drm(dev);
231 struct nouveau_display *disp = nouveau_display(dev);
232 struct nouveau_gpio *gpio = nouveau_gpio(drm->device);
233 struct drm_connector *connector;
236 ret = disp->init(dev);
240 /* enable polling for external displays */
241 drm_kms_helper_poll_enable(dev);
243 /* enable hotplug interrupts */
244 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
245 struct nouveau_connector *conn = nouveau_connector(connector);
246 if (gpio && conn->hpd.func != DCB_GPIO_UNUSED) {
247 nouveau_event_get(gpio->events, conn->hpd.line,
256 nouveau_display_fini(struct drm_device *dev)
258 struct nouveau_drm *drm = nouveau_drm(dev);
259 struct nouveau_display *disp = nouveau_display(dev);
260 struct nouveau_gpio *gpio = nouveau_gpio(drm->device);
261 struct drm_connector *connector;
263 /* disable hotplug interrupts */
264 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
265 struct nouveau_connector *conn = nouveau_connector(connector);
266 if (gpio && conn->hpd.func != DCB_GPIO_UNUSED) {
267 nouveau_event_put(gpio->events, conn->hpd.line,
272 drm_kms_helper_poll_disable(dev);
277 nouveau_display_create(struct drm_device *dev)
279 struct nouveau_drm *drm = nouveau_drm(dev);
280 struct nouveau_display *disp;
281 u32 pclass = dev->pdev->class >> 8;
284 disp = drm->display = kzalloc(sizeof(*disp), GFP_KERNEL);
288 drm_mode_config_init(dev);
289 drm_mode_create_scaling_mode_property(dev);
290 drm_mode_create_dvi_i_properties(dev);
292 if (nv_device(drm->device)->card_type < NV_50)
295 if (nv_device(drm->device)->card_type < NV_D0)
300 PROP_ENUM(disp->dithering_mode, gen, "dithering mode", dither_mode);
301 PROP_ENUM(disp->dithering_depth, gen, "dithering depth", dither_depth);
302 PROP_ENUM(disp->underscan_property, gen, "underscan", underscan);
304 disp->underscan_hborder_property =
305 drm_property_create_range(dev, 0, "underscan hborder", 0, 128);
307 disp->underscan_vborder_property =
308 drm_property_create_range(dev, 0, "underscan vborder", 0, 128);
312 disp->vibrant_hue_property =
313 drm_property_create_range(dev, 0, "vibrant hue", 0, 180);
316 disp->color_vibrance_property =
317 drm_property_create_range(dev, 0, "color vibrance", 0, 200);
320 dev->mode_config.funcs = &nouveau_mode_config_funcs;
321 dev->mode_config.fb_base = pci_resource_start(dev->pdev, 1);
323 dev->mode_config.min_width = 0;
324 dev->mode_config.min_height = 0;
325 if (nv_device(drm->device)->card_type < NV_10) {
326 dev->mode_config.max_width = 2048;
327 dev->mode_config.max_height = 2048;
329 if (nv_device(drm->device)->card_type < NV_50) {
330 dev->mode_config.max_width = 4096;
331 dev->mode_config.max_height = 4096;
333 dev->mode_config.max_width = 8192;
334 dev->mode_config.max_height = 8192;
337 dev->mode_config.preferred_depth = 24;
338 dev->mode_config.prefer_shadow = 1;
340 drm_kms_helper_poll_init(dev);
341 drm_kms_helper_poll_disable(dev);
343 if (nouveau_modeset == 1 ||
344 (nouveau_modeset < 0 && pclass == PCI_CLASS_DISPLAY_VGA)) {
345 if (drm->vbios.dcb.entries) {
346 if (nv_device(drm->device)->card_type < NV_50)
347 ret = nv04_display_create(dev);
349 ret = nv50_display_create(dev);
355 goto disp_create_err;
357 if (dev->mode_config.num_crtc) {
358 ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
363 nouveau_backlight_init(dev);
371 drm_kms_helper_poll_fini(dev);
372 drm_mode_config_cleanup(dev);
377 nouveau_display_destroy(struct drm_device *dev)
379 struct nouveau_display *disp = nouveau_display(dev);
381 nouveau_backlight_exit(dev);
382 drm_vblank_cleanup(dev);
384 drm_kms_helper_poll_fini(dev);
385 drm_mode_config_cleanup(dev);
390 nouveau_drm(dev)->display = NULL;
395 nouveau_display_suspend(struct drm_device *dev)
397 struct nouveau_drm *drm = nouveau_drm(dev);
398 struct drm_crtc *crtc;
400 nouveau_display_fini(dev);
402 NV_SUSPEND(drm, "unpinning framebuffer(s)...\n");
403 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
404 struct nouveau_framebuffer *nouveau_fb;
406 nouveau_fb = nouveau_framebuffer(crtc->fb);
407 if (!nouveau_fb || !nouveau_fb->nvbo)
410 nouveau_bo_unpin(nouveau_fb->nvbo);
413 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
414 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
416 nouveau_bo_unmap(nv_crtc->cursor.nvbo);
417 nouveau_bo_unpin(nv_crtc->cursor.nvbo);
424 nouveau_display_repin(struct drm_device *dev)
426 struct nouveau_drm *drm = nouveau_drm(dev);
427 struct drm_crtc *crtc;
430 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
431 struct nouveau_framebuffer *nouveau_fb;
433 nouveau_fb = nouveau_framebuffer(crtc->fb);
434 if (!nouveau_fb || !nouveau_fb->nvbo)
437 nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM);
440 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
441 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
443 ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM);
445 ret = nouveau_bo_map(nv_crtc->cursor.nvbo);
447 NV_ERROR(drm, "Could not pin/map cursor.\n");
452 nouveau_display_resume(struct drm_device *dev)
454 struct drm_crtc *crtc;
455 nouveau_display_init(dev);
457 /* Force CLUT to get re-loaded during modeset */
458 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
459 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
461 nv_crtc->lut.depth = 0;
464 drm_helper_resume_force_mode(dev);
466 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
467 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
468 u32 offset = nv_crtc->cursor.nvbo->bo.offset;
470 nv_crtc->cursor.set_offset(nv_crtc, offset);
471 nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x,
472 nv_crtc->cursor_saved_y);
477 nouveau_page_flip_emit(struct nouveau_channel *chan,
478 struct nouveau_bo *old_bo,
479 struct nouveau_bo *new_bo,
480 struct nouveau_page_flip_state *s,
481 struct nouveau_fence **pfence)
483 struct nouveau_fence_chan *fctx = chan->fence;
484 struct nouveau_drm *drm = chan->drm;
485 struct drm_device *dev = drm->dev;
489 /* Queue it to the pending list */
490 spin_lock_irqsave(&dev->event_lock, flags);
491 list_add_tail(&s->head, &fctx->flip);
492 spin_unlock_irqrestore(&dev->event_lock, flags);
494 /* Synchronize with the old framebuffer */
495 ret = nouveau_fence_sync(old_bo->bo.sync_obj, chan);
499 /* Emit the pageflip */
500 ret = RING_SPACE(chan, 3);
504 if (nv_device(drm->device)->card_type < NV_C0) {
505 BEGIN_NV04(chan, NvSubSw, NV_SW_PAGE_FLIP, 1);
506 OUT_RING (chan, 0x00000000);
507 OUT_RING (chan, 0x00000000);
509 BEGIN_NVC0(chan, 0, NV10_SUBCHAN_REF_CNT, 1);
511 BEGIN_IMC0(chan, 0, NVSW_SUBCHAN_PAGE_FLIP, 0x0000);
515 ret = nouveau_fence_new(chan, false, pfence);
521 spin_lock_irqsave(&dev->event_lock, flags);
523 spin_unlock_irqrestore(&dev->event_lock, flags);
528 nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb,
529 struct drm_pending_vblank_event *event,
530 uint32_t page_flip_flags)
532 struct drm_device *dev = crtc->dev;
533 struct nouveau_drm *drm = nouveau_drm(dev);
534 struct nouveau_bo *old_bo = nouveau_framebuffer(crtc->fb)->nvbo;
535 struct nouveau_bo *new_bo = nouveau_framebuffer(fb)->nvbo;
536 struct nouveau_page_flip_state *s;
537 struct nouveau_channel *chan = NULL;
538 struct nouveau_fence *fence;
539 struct ttm_validate_buffer resv[2] = {
540 { .bo = &old_bo->bo },
541 { .bo = &new_bo->bo },
543 struct ww_acquire_ctx ticket;
550 s = kzalloc(sizeof(*s), GFP_KERNEL);
554 /* Choose the channel the flip will be handled in */
555 spin_lock(&old_bo->bo.bdev->fence_lock);
556 fence = new_bo->bo.sync_obj;
558 chan = fence->channel;
561 spin_unlock(&old_bo->bo.bdev->fence_lock);
563 if (new_bo != old_bo) {
564 ret = nouveau_bo_pin(new_bo, TTM_PL_FLAG_VRAM);
568 list_add(&resv[1].head, &res);
570 list_add(&resv[0].head, &res);
572 mutex_lock(&chan->cli->mutex);
573 ret = ttm_eu_reserve_buffers(&ticket, &res);
577 /* Initialize a page flip struct */
578 *s = (struct nouveau_page_flip_state)
579 { { }, event, nouveau_crtc(crtc)->index,
580 fb->bits_per_pixel, fb->pitches[0], crtc->x, crtc->y,
583 /* Emit a page flip */
584 if (nv_device(drm->device)->card_type >= NV_50) {
585 ret = nv50_display_flip_next(crtc, fb, chan, 0);
589 struct nv04_display *dispnv04 = nv04_display(dev);
590 nouveau_bo_ref(new_bo, &dispnv04->image[nouveau_crtc(crtc)->index]);
593 ret = nouveau_page_flip_emit(chan, old_bo, new_bo, s, &fence);
594 mutex_unlock(&chan->cli->mutex);
598 /* Update the crtc struct and cleanup */
601 ttm_eu_fence_buffer_objects(&ticket, &res, fence);
602 if (old_bo != new_bo)
603 nouveau_bo_unpin(old_bo);
604 nouveau_fence_unref(&fence);
608 ttm_eu_backoff_reservation(&ticket, &res);
610 mutex_unlock(&chan->cli->mutex);
611 if (old_bo != new_bo)
612 nouveau_bo_unpin(new_bo);
619 nouveau_finish_page_flip(struct nouveau_channel *chan,
620 struct nouveau_page_flip_state *ps)
622 struct nouveau_fence_chan *fctx = chan->fence;
623 struct nouveau_drm *drm = chan->drm;
624 struct drm_device *dev = drm->dev;
625 struct nouveau_page_flip_state *s;
628 spin_lock_irqsave(&dev->event_lock, flags);
630 if (list_empty(&fctx->flip)) {
631 NV_ERROR(drm, "unexpected pageflip\n");
632 spin_unlock_irqrestore(&dev->event_lock, flags);
636 s = list_first_entry(&fctx->flip, struct nouveau_page_flip_state, head);
638 drm_send_vblank_event(dev, -1, s->event);
645 spin_unlock_irqrestore(&dev->event_lock, flags);
650 nouveau_flip_complete(void *data)
652 struct nouveau_channel *chan = data;
653 struct nouveau_drm *drm = chan->drm;
654 struct nouveau_page_flip_state state;
656 if (!nouveau_finish_page_flip(chan, &state)) {
657 if (nv_device(drm->device)->card_type < NV_50) {
658 nv_set_crtc_base(drm->dev, state.crtc, state.offset +
659 state.y * state.pitch +
660 state.x * state.bpp / 8);
668 nouveau_display_dumb_create(struct drm_file *file_priv, struct drm_device *dev,
669 struct drm_mode_create_dumb *args)
671 struct nouveau_bo *bo;
674 args->pitch = roundup(args->width * (args->bpp / 8), 256);
675 args->size = args->pitch * args->height;
676 args->size = roundup(args->size, PAGE_SIZE);
678 ret = nouveau_gem_new(dev, args->size, 0, NOUVEAU_GEM_DOMAIN_VRAM, 0, 0, &bo);
682 ret = drm_gem_handle_create(file_priv, bo->gem, &args->handle);
683 drm_gem_object_unreference_unlocked(bo->gem);
688 nouveau_display_dumb_map_offset(struct drm_file *file_priv,
689 struct drm_device *dev,
690 uint32_t handle, uint64_t *poffset)
692 struct drm_gem_object *gem;
694 gem = drm_gem_object_lookup(dev, file_priv, handle);
696 struct nouveau_bo *bo = gem->driver_private;
697 *poffset = drm_vma_node_offset_addr(&bo->bo.vma_node);
698 drm_gem_object_unreference_unlocked(gem);