2 * Copyright 2009 Red Hat Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
26 #include "drm_dp_helper.h"
28 #include "nouveau_drv.h"
29 #include "nouveau_connector.h"
30 #include "nouveau_encoder.h"
31 #include "nouveau_crtc.h"
34 nouveau_dp_bios_data(struct drm_device *dev, struct dcb_output *dcb, u8 **entry)
40 if (bit_table(dev, 'd', &d)) {
41 NV_ERROR(dev, "BIT 'd' table not found\n");
46 NV_ERROR(dev, "BIT 'd' table version %d unknown\n", d.version);
50 table = ROMPTR(dev, d.data[0]);
52 NV_ERROR(dev, "displayport table pointer invalid\n");
63 NV_ERROR(dev, "displayport table 0x%02x unknown\n", table[0]);
67 for (i = 0; i < table[3]; i++) {
68 *entry = ROMPTR(dev, table[table[1] + (i * table[2])]);
69 if (*entry && bios_encoder_match(dcb, ROM32((*entry)[0])))
73 NV_ERROR(dev, "displayport encoder table not found\n");
77 /******************************************************************************
79 *****************************************************************************/
81 struct nouveau_i2c_port *auxch;
82 struct dp_train_func *func;
83 struct dcb_output *dcb;
93 dp_set_link_config(struct drm_device *dev, struct dp_state *dp)
97 NV_DEBUG_KMS(dev, "%d lanes at %d KB/s\n", dp->link_nr, dp->link_bw);
99 /* set desired link configuration on the source */
100 dp->func->link_set(dev, dp->dcb, dp->crtc, dp->link_nr, dp->link_bw,
101 dp->dpcd[2] & DP_ENHANCED_FRAME_CAP);
103 /* inform the sink of the new configuration */
104 sink[0] = dp->link_bw / 27000;
105 sink[1] = dp->link_nr;
106 if (dp->dpcd[2] & DP_ENHANCED_FRAME_CAP)
107 sink[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN;
109 auxch_wr(dev, dp->auxch, DP_LINK_BW_SET, sink, 2);
113 dp_set_training_pattern(struct drm_device *dev, struct dp_state *dp, u8 pattern)
117 NV_DEBUG_KMS(dev, "training pattern %d\n", pattern);
119 dp->func->train_set(dev, dp->dcb, pattern);
121 auxch_rd(dev, dp->auxch, DP_TRAINING_PATTERN_SET, &sink_tp, 1);
122 sink_tp &= ~DP_TRAINING_PATTERN_MASK;
124 auxch_wr(dev, dp->auxch, DP_TRAINING_PATTERN_SET, &sink_tp, 1);
128 dp_link_train_commit(struct drm_device *dev, struct dp_state *dp)
132 for (i = 0; i < dp->link_nr; i++) {
133 u8 lane = (dp->stat[4 + (i >> 1)] >> ((i & 1) * 4)) & 0xf;
134 u8 lpre = (lane & 0x0c) >> 2;
135 u8 lvsw = (lane & 0x03) >> 0;
137 dp->conf[i] = (lpre << 3) | lvsw;
138 if (lvsw == DP_TRAIN_VOLTAGE_SWING_1200)
139 dp->conf[i] |= DP_TRAIN_MAX_SWING_REACHED;
140 if ((lpre << 3) == DP_TRAIN_PRE_EMPHASIS_9_5)
141 dp->conf[i] |= DP_TRAIN_MAX_PRE_EMPHASIS_REACHED;
143 NV_DEBUG_KMS(dev, "config lane %d %02x\n", i, dp->conf[i]);
144 dp->func->train_adj(dev, dp->dcb, i, lvsw, lpre);
147 return auxch_wr(dev, dp->auxch, DP_TRAINING_LANE0_SET, dp->conf, 4);
151 dp_link_train_update(struct drm_device *dev, struct dp_state *dp, u32 delay)
157 ret = auxch_rd(dev, dp->auxch, DP_LANE0_1_STATUS, dp->stat, 6);
161 NV_DEBUG_KMS(dev, "status %02x %02x %02x %02x %02x %02x\n",
162 dp->stat[0], dp->stat[1], dp->stat[2], dp->stat[3],
163 dp->stat[4], dp->stat[5]);
168 dp_link_train_cr(struct drm_device *dev, struct dp_state *dp)
170 bool cr_done = false, abort = false;
171 int voltage = dp->conf[0] & DP_TRAIN_VOLTAGE_SWING_MASK;
174 dp_set_training_pattern(dev, dp, DP_TRAINING_PATTERN_1);
177 if (dp_link_train_commit(dev, dp) ||
178 dp_link_train_update(dev, dp, 100))
182 for (i = 0; i < dp->link_nr; i++) {
183 u8 lane = (dp->stat[i >> 1] >> ((i & 1) * 4)) & 0xf;
184 if (!(lane & DP_LANE_CR_DONE)) {
186 if (dp->conf[i] & DP_TRAIN_MAX_SWING_REACHED)
192 if ((dp->conf[0] & DP_TRAIN_VOLTAGE_SWING_MASK) != voltage) {
193 voltage = dp->conf[0] & DP_TRAIN_VOLTAGE_SWING_MASK;
196 } while (!cr_done && !abort && ++tries < 5);
198 return cr_done ? 0 : -1;
202 dp_link_train_eq(struct drm_device *dev, struct dp_state *dp)
204 bool eq_done, cr_done = true;
207 dp_set_training_pattern(dev, dp, DP_TRAINING_PATTERN_2);
210 if (dp_link_train_update(dev, dp, 400))
213 eq_done = !!(dp->stat[2] & DP_INTERLANE_ALIGN_DONE);
214 for (i = 0; i < dp->link_nr && eq_done; i++) {
215 u8 lane = (dp->stat[i >> 1] >> ((i & 1) * 4)) & 0xf;
216 if (!(lane & DP_LANE_CR_DONE))
218 if (!(lane & DP_LANE_CHANNEL_EQ_DONE) ||
219 !(lane & DP_LANE_SYMBOL_LOCKED))
223 if (dp_link_train_commit(dev, dp))
225 } while (!eq_done && cr_done && ++tries <= 5);
227 return eq_done ? 0 : -1;
231 dp_set_downspread(struct drm_device *dev, struct dp_state *dp, bool enable)
234 u8 *entry, *table = nouveau_dp_bios_data(dev, dp->dcb, &entry);
236 if (table[0] >= 0x20 && table[0] <= 0x30) {
237 if (enable) script = ROM16(entry[12]);
238 else script = ROM16(entry[14]);
240 if (table[0] == 0x40) {
241 if (enable) script = ROM16(entry[11]);
242 else script = ROM16(entry[13]);
246 nouveau_bios_run_init_table(dev, script, dp->dcb, dp->crtc);
250 dp_link_train_init(struct drm_device *dev, struct dp_state *dp)
253 u8 *entry, *table = nouveau_dp_bios_data(dev, dp->dcb, &entry);
255 if (table[0] >= 0x20 && table[0] <= 0x30)
256 script = ROM16(entry[6]);
258 if (table[0] == 0x40)
259 script = ROM16(entry[5]);
262 nouveau_bios_run_init_table(dev, script, dp->dcb, dp->crtc);
266 dp_link_train_fini(struct drm_device *dev, struct dp_state *dp)
269 u8 *entry, *table = nouveau_dp_bios_data(dev, dp->dcb, &entry);
271 if (table[0] >= 0x20 && table[0] <= 0x30)
272 script = ROM16(entry[8]);
274 if (table[0] == 0x40)
275 script = ROM16(entry[7]);
278 nouveau_bios_run_init_table(dev, script, dp->dcb, dp->crtc);
282 nouveau_dp_link_train(struct drm_encoder *encoder, u32 datarate,
283 struct dp_train_func *func)
285 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
286 struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc);
287 struct nouveau_connector *nv_connector =
288 nouveau_encoder_connector_get(nv_encoder);
289 struct drm_device *dev = encoder->dev;
290 const u32 bw_list[] = { 270000, 162000, 0 };
291 const u32 *link_bw = bw_list;
294 dp.auxch = nouveau_i2c_find(dev, nv_encoder->dcb->i2c_index);
299 dp.dcb = nv_encoder->dcb;
300 dp.crtc = nv_crtc->index;
301 dp.dpcd = nv_encoder->dp.dpcd;
303 /* adjust required bandwidth for 8B/10B coding overhead */
304 datarate = (datarate / 8) * 10;
306 /* some sinks toggle hotplug in response to some of the actions
307 * we take during link training (DP_SET_POWER is one), we need
308 * to ignore them for the moment to avoid races.
310 nouveau_gpio_irq(dev, 0, nv_connector->hpd, 0xff, false);
312 /* enable down-spreading, if possible */
313 dp_set_downspread(dev, &dp, nv_encoder->dp.dpcd[3] & 1);
315 /* execute pre-train script from vbios */
316 dp_link_train_init(dev, &dp);
318 /* start off at highest link rate supported by encoder and display */
319 while (*link_bw > nv_encoder->dp.link_bw)
323 /* find minimum required lane count at this link rate */
324 dp.link_nr = nv_encoder->dp.link_nr;
325 while ((dp.link_nr >> 1) * link_bw[0] > datarate)
328 /* drop link rate to minimum with this lane count */
329 while ((link_bw[1] * dp.link_nr) > datarate)
331 dp.link_bw = link_bw[0];
333 /* program selected link configuration */
334 dp_set_link_config(dev, &dp);
336 /* attempt to train the link at this configuration */
337 memset(dp.stat, 0x00, sizeof(dp.stat));
338 if (!dp_link_train_cr(dev, &dp) &&
339 !dp_link_train_eq(dev, &dp))
342 /* retry at lower rate */
346 /* finish link training */
347 dp_set_training_pattern(dev, &dp, DP_TRAINING_PATTERN_DISABLE);
349 /* execute post-train script from vbios */
350 dp_link_train_fini(dev, &dp);
352 /* re-enable hotplug detect */
353 nouveau_gpio_irq(dev, 0, nv_connector->hpd, 0xff, true);
358 nouveau_dp_dpms(struct drm_encoder *encoder, int mode, u32 datarate,
359 struct dp_train_func *func)
361 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
362 struct nouveau_i2c_port *auxch;
365 auxch = nouveau_i2c_find(encoder->dev, nv_encoder->dcb->i2c_index);
369 if (mode == DRM_MODE_DPMS_ON)
370 status = DP_SET_POWER_D0;
372 status = DP_SET_POWER_D3;
374 auxch_wr(encoder->dev, auxch, DP_SET_POWER, &status, 1);
376 if (mode == DRM_MODE_DPMS_ON)
377 nouveau_dp_link_train(encoder, datarate, func);
381 nouveau_dp_probe_oui(struct drm_device *dev, struct nouveau_i2c_port *auxch,
386 if (!(dpcd[DP_DOWN_STREAM_PORT_COUNT] & DP_OUI_SUPPORT))
389 if (!auxch_rd(dev, auxch, DP_SINK_OUI, buf, 3))
390 NV_DEBUG_KMS(dev, "Sink OUI: %02hx%02hx%02hx\n",
391 buf[0], buf[1], buf[2]);
393 if (!auxch_rd(dev, auxch, DP_BRANCH_OUI, buf, 3))
394 NV_DEBUG_KMS(dev, "Branch OUI: %02hx%02hx%02hx\n",
395 buf[0], buf[1], buf[2]);
400 nouveau_dp_detect(struct drm_encoder *encoder)
402 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
403 struct drm_device *dev = encoder->dev;
404 struct nouveau_i2c_port *auxch;
405 u8 *dpcd = nv_encoder->dp.dpcd;
408 auxch = nouveau_i2c_find(dev, nv_encoder->dcb->i2c_index);
412 ret = auxch_rd(dev, auxch, DP_DPCD_REV, dpcd, 8);
416 nv_encoder->dp.link_bw = 27000 * dpcd[1];
417 nv_encoder->dp.link_nr = dpcd[2] & DP_MAX_LANE_COUNT_MASK;
419 NV_DEBUG_KMS(dev, "display: %dx%d dpcd 0x%02x\n",
420 nv_encoder->dp.link_nr, nv_encoder->dp.link_bw, dpcd[0]);
421 NV_DEBUG_KMS(dev, "encoder: %dx%d\n",
422 nv_encoder->dcb->dpconf.link_nr,
423 nv_encoder->dcb->dpconf.link_bw);
425 if (nv_encoder->dcb->dpconf.link_nr < nv_encoder->dp.link_nr)
426 nv_encoder->dp.link_nr = nv_encoder->dcb->dpconf.link_nr;
427 if (nv_encoder->dcb->dpconf.link_bw < nv_encoder->dp.link_bw)
428 nv_encoder->dp.link_bw = nv_encoder->dcb->dpconf.link_bw;
430 NV_DEBUG_KMS(dev, "maximum: %dx%d\n",
431 nv_encoder->dp.link_nr, nv_encoder->dp.link_bw);
433 nouveau_dp_probe_oui(dev, auxch, dpcd);