2 * Copyright 2005 Stephane Marchesin.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
25 #include <linux/console.h>
29 #include "drm_crtc_helper.h"
30 #include "nouveau_drv.h"
31 #include "nouveau_hw.h"
32 #include "nouveau_fb.h"
33 #include "nouveau_fbcon.h"
34 #include "nv50_display.h"
36 #include "drm_pciids.h"
38 MODULE_PARM_DESC(noagp, "Disable AGP");
40 module_param_named(noagp, nouveau_noagp, int, 0400);
42 MODULE_PARM_DESC(modeset, "Enable kernel modesetting");
43 static int nouveau_modeset = -1; /* kms */
44 module_param_named(modeset, nouveau_modeset, int, 0400);
46 MODULE_PARM_DESC(vbios, "Override default VBIOS location");
48 module_param_named(vbios, nouveau_vbios, charp, 0400);
50 MODULE_PARM_DESC(vram_pushbuf, "Force DMA push buffers to be in VRAM");
51 int nouveau_vram_pushbuf;
52 module_param_named(vram_pushbuf, nouveau_vram_pushbuf, int, 0400);
54 MODULE_PARM_DESC(vram_notify, "Force DMA notifiers to be in VRAM");
55 int nouveau_vram_notify = 0;
56 module_param_named(vram_notify, nouveau_vram_notify, int, 0400);
58 MODULE_PARM_DESC(duallink, "Allow dual-link TMDS (>=GeForce 8)");
59 int nouveau_duallink = 1;
60 module_param_named(duallink, nouveau_duallink, int, 0400);
62 MODULE_PARM_DESC(uscript_lvds, "LVDS output script table ID (>=GeForce 8)");
63 int nouveau_uscript_lvds = -1;
64 module_param_named(uscript_lvds, nouveau_uscript_lvds, int, 0400);
66 MODULE_PARM_DESC(uscript_tmds, "TMDS output script table ID (>=GeForce 8)");
67 int nouveau_uscript_tmds = -1;
68 module_param_named(uscript_tmds, nouveau_uscript_tmds, int, 0400);
70 MODULE_PARM_DESC(ignorelid, "Ignore ACPI lid status");
71 int nouveau_ignorelid = 0;
72 module_param_named(ignorelid, nouveau_ignorelid, int, 0400);
74 MODULE_PARM_DESC(noaccel, "Disable all acceleration");
75 int nouveau_noaccel = 0;
76 module_param_named(noaccel, nouveau_noaccel, int, 0400);
78 MODULE_PARM_DESC(nofbaccel, "Disable fbcon acceleration");
79 int nouveau_nofbaccel = 0;
80 module_param_named(nofbaccel, nouveau_nofbaccel, int, 0400);
82 MODULE_PARM_DESC(override_conntype, "Ignore DCB connector type");
83 int nouveau_override_conntype = 0;
84 module_param_named(override_conntype, nouveau_override_conntype, int, 0400);
86 MODULE_PARM_DESC(tv_disable, "Disable TV-out detection\n");
87 int nouveau_tv_disable = 0;
88 module_param_named(tv_disable, nouveau_tv_disable, int, 0400);
90 MODULE_PARM_DESC(tv_norm, "Default TV norm.\n"
91 "\t\tSupported: PAL, PAL-M, PAL-N, PAL-Nc, NTSC-M, NTSC-J,\n"
92 "\t\t\thd480i, hd480p, hd576i, hd576p, hd720p, hd1080i.\n"
94 "\t\t*NOTE* Ignored for cards with external TV encoders.");
95 char *nouveau_tv_norm;
96 module_param_named(tv_norm, nouveau_tv_norm, charp, 0400);
98 MODULE_PARM_DESC(reg_debug, "Register access debug bitmask:\n"
99 "\t\t0x1 mc, 0x2 video, 0x4 fb, 0x8 extdev,\n"
100 "\t\t0x10 crtc, 0x20 ramdac, 0x40 vgacrtc, 0x80 rmvio,\n"
101 "\t\t0x100 vgaattr, 0x200 EVO (G80+). ");
102 int nouveau_reg_debug;
103 module_param_named(reg_debug, nouveau_reg_debug, int, 0600);
105 int nouveau_fbpercrtc;
107 module_param_named(fbpercrtc, nouveau_fbpercrtc, int, 0400);
110 static struct pci_device_id pciidlist[] = {
112 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
113 .class = PCI_BASE_CLASS_DISPLAY << 16,
114 .class_mask = 0xff << 16,
117 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
118 .class = PCI_BASE_CLASS_DISPLAY << 16,
119 .class_mask = 0xff << 16,
124 MODULE_DEVICE_TABLE(pci, pciidlist);
126 static struct drm_driver driver;
129 nouveau_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
131 return drm_get_pci_dev(pdev, ent, &driver);
135 nouveau_pci_remove(struct pci_dev *pdev)
137 struct drm_device *dev = pci_get_drvdata(pdev);
143 nouveau_pci_suspend(struct pci_dev *pdev, pm_message_t pm_state)
145 struct drm_device *dev = pci_get_drvdata(pdev);
146 struct drm_nouveau_private *dev_priv = dev->dev_private;
147 struct nouveau_instmem_engine *pinstmem = &dev_priv->engine.instmem;
148 struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
149 struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
150 struct nouveau_channel *chan;
151 struct drm_crtc *crtc;
154 if (pm_state.event == PM_EVENT_PRETHAW)
157 NV_INFO(dev, "Disabling fbcon acceleration...\n");
158 nouveau_fbcon_save_disable_accel(dev);
160 NV_INFO(dev, "Unpinning framebuffer(s)...\n");
161 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
162 struct nouveau_framebuffer *nouveau_fb;
164 nouveau_fb = nouveau_framebuffer(crtc->fb);
165 if (!nouveau_fb || !nouveau_fb->nvbo)
168 nouveau_bo_unpin(nouveau_fb->nvbo);
171 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
172 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
174 nouveau_bo_unmap(nv_crtc->cursor.nvbo);
175 nouveau_bo_unpin(nv_crtc->cursor.nvbo);
178 NV_INFO(dev, "Evicting buffers...\n");
179 ttm_bo_evict_mm(&dev_priv->ttm.bdev, TTM_PL_VRAM);
181 NV_INFO(dev, "Idling channels...\n");
182 for (i = 0; i < pfifo->channels; i++) {
183 struct nouveau_fence *fence = NULL;
185 chan = dev_priv->fifos[i];
186 if (!chan || (dev_priv->card_type >= NV_50 &&
187 chan == dev_priv->fifos[0]))
190 ret = nouveau_fence_new(chan, &fence, true);
192 ret = nouveau_fence_wait(fence, NULL, false, false);
193 nouveau_fence_unref((void *)&fence);
197 NV_ERROR(dev, "Failed to idle channel %d for suspend\n",
202 pgraph->fifo_access(dev, false);
203 nouveau_wait_for_idle(dev);
204 pfifo->reassign(dev, false);
206 pfifo->unload_context(dev);
207 pgraph->unload_context(dev);
209 NV_INFO(dev, "Suspending GPU objects...\n");
210 ret = nouveau_gpuobj_suspend(dev);
212 NV_ERROR(dev, "... failed: %d\n", ret);
216 ret = pinstmem->suspend(dev);
218 NV_ERROR(dev, "... failed: %d\n", ret);
219 nouveau_gpuobj_suspend_cleanup(dev);
223 NV_INFO(dev, "And we're gone!\n");
224 pci_save_state(pdev);
225 if (pm_state.event == PM_EVENT_SUSPEND) {
226 pci_disable_device(pdev);
227 pci_set_power_state(pdev, PCI_D3hot);
230 acquire_console_sem();
231 nouveau_fbcon_set_suspend(dev, 1);
232 release_console_sem();
233 nouveau_fbcon_restore_accel(dev);
237 NV_INFO(dev, "Re-enabling acceleration..\n");
239 pfifo->reassign(dev, true);
240 pgraph->fifo_access(dev, true);
245 nouveau_pci_resume(struct pci_dev *pdev)
247 struct drm_device *dev = pci_get_drvdata(pdev);
248 struct drm_nouveau_private *dev_priv = dev->dev_private;
249 struct nouveau_engine *engine = &dev_priv->engine;
250 struct drm_crtc *crtc;
253 nouveau_fbcon_save_disable_accel(dev);
255 NV_INFO(dev, "We're back, enabling device...\n");
256 pci_set_power_state(pdev, PCI_D0);
257 pci_restore_state(pdev);
258 if (pci_enable_device(pdev))
260 pci_set_master(dev->pdev);
262 /* Make sure the AGP controller is in a consistent state */
263 if (dev_priv->gart_info.type == NOUVEAU_GART_AGP)
264 nouveau_mem_reset_agp(dev);
266 /* Make the CRTCs accessible */
267 engine->display.early_init(dev);
269 NV_INFO(dev, "POSTing device...\n");
270 ret = nouveau_run_vbios_init(dev);
274 if (dev_priv->gart_info.type == NOUVEAU_GART_AGP) {
275 ret = nouveau_mem_init_agp(dev);
277 NV_ERROR(dev, "error reinitialising AGP: %d\n", ret);
282 NV_INFO(dev, "Reinitialising engines...\n");
283 engine->instmem.resume(dev);
284 engine->mc.init(dev);
285 engine->timer.init(dev);
286 engine->fb.init(dev);
287 engine->graph.init(dev);
288 engine->fifo.init(dev);
290 NV_INFO(dev, "Restoring GPU objects...\n");
291 nouveau_gpuobj_resume(dev);
293 nouveau_irq_postinstall(dev);
295 /* Re-write SKIPS, they'll have been lost over the suspend */
296 if (nouveau_vram_pushbuf) {
297 struct nouveau_channel *chan;
300 for (i = 0; i < dev_priv->engine.fifo.channels; i++) {
301 chan = dev_priv->fifos[i];
302 if (!chan || !chan->pushbuf_bo)
305 for (j = 0; j < NOUVEAU_DMA_SKIPS; j++)
306 nouveau_bo_wr32(chan->pushbuf_bo, i, 0);
310 NV_INFO(dev, "Restoring mode...\n");
311 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
312 struct nouveau_framebuffer *nouveau_fb;
314 nouveau_fb = nouveau_framebuffer(crtc->fb);
315 if (!nouveau_fb || !nouveau_fb->nvbo)
318 nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM);
321 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
322 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
324 ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM);
326 ret = nouveau_bo_map(nv_crtc->cursor.nvbo);
328 NV_ERROR(dev, "Could not pin/map cursor.\n");
331 engine->display.init(dev);
333 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
334 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
336 nv_crtc->cursor.set_offset(nv_crtc,
337 nv_crtc->cursor.nvbo->bo.offset -
338 dev_priv->vm_vram_base);
340 nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x,
341 nv_crtc->cursor_saved_y);
344 /* Force CLUT to get re-loaded during modeset */
345 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
346 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
348 nv_crtc->lut.depth = 0;
351 acquire_console_sem();
352 nouveau_fbcon_set_suspend(dev, 0);
353 release_console_sem();
355 nouveau_fbcon_zfill_all(dev);
357 drm_helper_resume_force_mode(dev);
359 nouveau_fbcon_restore_accel(dev);
363 static struct drm_driver driver = {
365 DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
366 DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
368 .load = nouveau_load,
369 .firstopen = nouveau_firstopen,
370 .lastclose = nouveau_lastclose,
371 .unload = nouveau_unload,
372 .preclose = nouveau_preclose,
373 #if defined(CONFIG_DRM_NOUVEAU_DEBUG)
374 .debugfs_init = nouveau_debugfs_init,
375 .debugfs_cleanup = nouveau_debugfs_takedown,
377 .irq_preinstall = nouveau_irq_preinstall,
378 .irq_postinstall = nouveau_irq_postinstall,
379 .irq_uninstall = nouveau_irq_uninstall,
380 .irq_handler = nouveau_irq_handler,
381 .reclaim_buffers = drm_core_reclaim_buffers,
382 .get_map_ofs = drm_core_get_map_ofs,
383 .get_reg_ofs = drm_core_get_reg_ofs,
384 .ioctls = nouveau_ioctls,
386 .owner = THIS_MODULE,
388 .release = drm_release,
389 .unlocked_ioctl = drm_ioctl,
390 .mmap = nouveau_ttm_mmap,
392 .fasync = drm_fasync,
393 #if defined(CONFIG_COMPAT)
394 .compat_ioctl = nouveau_compat_ioctl,
399 .id_table = pciidlist,
400 .probe = nouveau_pci_probe,
401 .remove = nouveau_pci_remove,
402 .suspend = nouveau_pci_suspend,
403 .resume = nouveau_pci_resume
406 .gem_init_object = nouveau_gem_object_new,
407 .gem_free_object = nouveau_gem_object_del,
412 .date = GIT_REVISION,
416 .major = DRIVER_MAJOR,
417 .minor = DRIVER_MINOR,
418 .patchlevel = DRIVER_PATCHLEVEL,
421 static int __init nouveau_init(void)
423 driver.num_ioctls = nouveau_max_ioctl;
425 if (nouveau_modeset == -1) {
426 #ifdef CONFIG_VGA_CONSOLE
427 if (vgacon_text_force())
434 if (!nouveau_modeset)
437 nouveau_register_dsm_handler();
438 return drm_init(&driver);
441 static void __exit nouveau_exit(void)
443 if (!nouveau_modeset)
447 nouveau_unregister_dsm_handler();
450 module_init(nouveau_init);
451 module_exit(nouveau_exit);
453 MODULE_AUTHOR(DRIVER_AUTHOR);
454 MODULE_DESCRIPTION(DRIVER_DESC);
455 MODULE_LICENSE("GPL and additional rights");