2 * Copyright 2005 Stephane Marchesin.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
25 #ifndef __NOUVEAU_DRV_H__
26 #define __NOUVEAU_DRV_H__
28 #define DRIVER_AUTHOR "Stephane Marchesin"
29 #define DRIVER_EMAIL "nouveau@lists.freedesktop.org"
31 #define DRIVER_NAME "nouveau"
32 #define DRIVER_DESC "nVidia Riva/TNT/GeForce"
33 #define DRIVER_DATE "20120316"
35 #define DRIVER_MAJOR 1
36 #define DRIVER_MINOR 0
37 #define DRIVER_PATCHLEVEL 0
39 #define NOUVEAU_FAMILY 0x0000FFFF
40 #define NOUVEAU_FLAGS 0xFFFF0000
42 #include "ttm/ttm_bo_api.h"
43 #include "ttm/ttm_bo_driver.h"
44 #include "ttm/ttm_placement.h"
45 #include "ttm/ttm_memory.h"
46 #include "ttm/ttm_module.h"
48 #define XXX_THIS_IS_A_HACK
49 #include <subdev/vm.h>
50 #include <subdev/fb.h>
51 #include <core/gpuobj.h>
54 NV_MEM_TYPE_UNKNOWN = 0,
67 #include <nouveau_drm.h>
68 #include "nouveau_reg.h"
69 #include <nouveau_bios.h>
71 #include <subdev/bios/pll.h>
72 #include "nouveau_compat.h"
74 #define nouveau_gpuobj_new(d,c,s,a,f,o) \
75 _nouveau_gpuobj_new((d), NULL, (s), (a), (f), (o))
77 #define nouveau_vm_new(d,o,l,m,v) \
78 _nouveau_vm_new((d), (o), (l), (m), (v))
80 #define nv50_vm_flush_engine(d,e) \
81 _nv50_vm_flush_engine((d), (e))
83 #include "nouveau_bo.h"
84 #include "nouveau_gem.h"
86 struct nouveau_page_flip_state {
87 struct list_head head;
88 struct drm_pending_vblank_event *event;
89 int crtc, bpp, pitch, x, y;
93 struct nouveau_display_engine {
95 int (*early_init)(struct drm_device *);
96 void (*late_takedown)(struct drm_device *);
97 int (*create)(struct drm_device *);
98 void (*destroy)(struct drm_device *);
99 int (*init)(struct drm_device *);
100 void (*fini)(struct drm_device *);
102 struct drm_property *dithering_mode;
103 struct drm_property *dithering_depth;
104 struct drm_property *underscan_property;
105 struct drm_property *underscan_hborder_property;
106 struct drm_property *underscan_vborder_property;
107 /* not really hue and saturation: */
108 struct drm_property *vibrant_hue_property;
109 struct drm_property *color_vibrance_property;
112 struct nouveau_pm_voltage_level {
113 u32 voltage; /* microvolts */
117 struct nouveau_pm_voltage {
122 struct nouveau_pm_voltage_level *level;
126 /* Exclusive upper limits */
127 #define NV_MEM_CL_DDR2_MAX 8
128 #define NV_MEM_WR_DDR2_MAX 9
129 #define NV_MEM_CL_DDR3_MAX 17
130 #define NV_MEM_WR_DDR3_MAX 17
131 #define NV_MEM_CL_GDDR3_MAX 16
132 #define NV_MEM_WR_GDDR3_MAX 18
133 #define NV_MEM_CL_GDDR5_MAX 21
134 #define NV_MEM_WR_GDDR5_MAX 20
136 struct nouveau_pm_memtiming {
148 struct nouveau_pm_tbl_header {
155 struct nouveau_pm_tbl_entry {
161 u8 tRFC; /* Byte 5 */
163 u8 tRAS; /* Byte 7 */
170 u8 RAM_FT1; /* 14, a bitmask of random RAM features */
179 struct nouveau_pm_profile;
180 struct nouveau_pm_profile_func {
181 void (*destroy)(struct nouveau_pm_profile *);
182 void (*init)(struct nouveau_pm_profile *);
183 void (*fini)(struct nouveau_pm_profile *);
184 struct nouveau_pm_level *(*select)(struct nouveau_pm_profile *);
187 struct nouveau_pm_profile {
188 const struct nouveau_pm_profile_func *func;
189 struct list_head head;
193 #define NOUVEAU_PM_MAX_LEVEL 8
194 struct nouveau_pm_level {
195 struct nouveau_pm_profile profile;
196 struct device_attribute dev_attr;
200 struct nouveau_pm_memtiming timing;
211 u32 unka0; /* nva3:nvc0 */
212 u32 hub01; /* nvc0- */
213 u32 hub06; /* nvc0- */
214 u32 hub07; /* nvc0- */
216 u32 volt_min; /* microvolts */
221 struct nouveau_pm_temp_sensor_constants {
229 struct nouveau_pm_threshold_temp {
235 struct nouveau_pm_fan {
243 struct nouveau_pm_engine {
244 struct nouveau_pm_voltage voltage;
245 struct nouveau_pm_level perflvl[NOUVEAU_PM_MAX_LEVEL];
247 struct nouveau_pm_temp_sensor_constants sensor_constants;
248 struct nouveau_pm_threshold_temp threshold_temp;
249 struct nouveau_pm_fan fan;
251 struct nouveau_pm_profile *profile_ac;
252 struct nouveau_pm_profile *profile_dc;
253 struct nouveau_pm_profile *profile;
254 struct list_head profiles;
256 struct nouveau_pm_level boot;
257 struct nouveau_pm_level *cur;
259 struct device *hwmon;
260 struct notifier_block acpi_nb;
262 int (*clocks_get)(struct drm_device *, struct nouveau_pm_level *);
263 void *(*clocks_pre)(struct drm_device *, struct nouveau_pm_level *);
264 int (*clocks_set)(struct drm_device *, void *);
266 int (*voltage_get)(struct drm_device *);
267 int (*voltage_set)(struct drm_device *, int voltage);
268 int (*pwm_get)(struct drm_device *, int line, u32*, u32*);
269 int (*pwm_set)(struct drm_device *, int line, u32, u32);
270 int (*temp_get)(struct drm_device *);
273 struct nouveau_engine {
274 struct nouveau_display_engine display;
275 struct nouveau_pm_engine pm;
278 enum nouveau_card_type {
290 struct drm_nouveau_private {
291 struct drm_device *dev;
295 /* the card type, takes NV_* as values */
296 enum nouveau_card_type card_type;
297 /* exact chipset, derived from NV_PMC_BOOT_0 */
301 /* interrupt handling */
302 void (*irq_handler[32])(struct drm_device *);
305 struct nouveau_engine engine;
307 /* For PFIFO and PGRAPH. */
308 spinlock_t context_switch_lock;
313 static inline struct drm_nouveau_private *
314 nouveau_private(struct drm_device *dev)
316 return dev->dev_private;
320 extern int nouveau_modeset;
321 extern int nouveau_duallink;
322 extern int nouveau_uscript_lvds;
323 extern int nouveau_uscript_tmds;
324 extern int nouveau_vram_pushbuf;
325 extern int nouveau_vram_notify;
326 extern char *nouveau_vram_type;
327 extern int nouveau_fbpercrtc;
328 extern int nouveau_tv_disable;
329 extern char *nouveau_tv_norm;
330 extern int nouveau_ignorelid;
331 extern int nouveau_force_post;
332 extern int nouveau_override_conntype;
333 extern char *nouveau_perflvl;
334 extern int nouveau_perflvl_wr;
335 extern int nouveau_msi;
336 extern int nouveau_ctxfw;
337 extern int nouveau_mxmdcb;
339 extern int nouveau_pci_suspend(struct pci_dev *pdev, pm_message_t pm_state);
340 extern int nouveau_pci_resume(struct pci_dev *pdev);
342 /* nouveau_state.c */
343 extern int nouveau_load(struct drm_device *, unsigned long flags);
344 extern int nouveau_firstopen(struct drm_device *);
345 extern void nouveau_lastclose(struct drm_device *);
346 extern int nouveau_unload(struct drm_device *);
347 extern int nouveau_card_init(struct drm_device *);
350 extern int nouveau_mem_timing_calc(struct drm_device *, u32 freq,
351 struct nouveau_pm_memtiming *);
352 extern void nouveau_mem_timing_read(struct drm_device *,
353 struct nouveau_pm_memtiming *);
356 extern int nouveau_irq_init(struct drm_device *);
357 extern void nouveau_irq_fini(struct drm_device *);
358 extern irqreturn_t nouveau_irq_handler(DRM_IRQ_ARGS);
359 extern void nouveau_irq_register(struct drm_device *, int status_bit,
360 void (*)(struct drm_device *));
361 extern void nouveau_irq_unregister(struct drm_device *, int status_bit);
362 extern void nouveau_irq_preinstall(struct drm_device *);
363 extern int nouveau_irq_postinstall(struct drm_device *);
364 extern void nouveau_irq_uninstall(struct drm_device *);
366 /* nouveau_backlight.c */
367 #ifdef CONFIG_DRM_NOUVEAU_BACKLIGHT
368 extern int nouveau_backlight_init(struct drm_device *);
369 extern void nouveau_backlight_exit(struct drm_device *);
371 static inline int nouveau_backlight_init(struct drm_device *dev)
376 static inline void nouveau_backlight_exit(struct drm_device *dev) { }
380 extern int nouveau_bios_init(struct drm_device *);
381 extern void nouveau_bios_takedown(struct drm_device *dev);
382 extern int nouveau_run_vbios_init(struct drm_device *);
383 extern struct dcb_connector_table_entry *
384 nouveau_bios_connector_entry(struct drm_device *, int index);
385 extern int nouveau_bios_run_display_table(struct drm_device *, u16 id, int clk,
386 struct dcb_output *, int crtc);
387 extern bool nouveau_bios_fp_mode(struct drm_device *, struct drm_display_mode *);
388 extern uint8_t *nouveau_bios_embedded_edid(struct drm_device *);
389 extern int nouveau_bios_parse_lvds_table(struct drm_device *, int pxclk,
390 bool *dl, bool *if_is_24bit);
391 extern int run_tmds_table(struct drm_device *, struct dcb_output *,
392 int head, int pxclk);
393 extern int call_lvds_script(struct drm_device *, struct dcb_output *, int head,
394 enum LVDS_script, int pxclk);
395 bool bios_encoder_match(struct dcb_output *, u32 hash);
398 int nouveau_ttm_global_init(struct drm_nouveau_private *);
399 void nouveau_ttm_global_release(struct drm_nouveau_private *);
400 int nouveau_ttm_mmap(struct file *, struct vm_area_struct *);
403 void nouveau_hdmi_mode_set(struct drm_encoder *, struct drm_display_mode *);
406 extern int nvd0_display_create(struct drm_device *);
407 extern void nvd0_display_destroy(struct drm_device *);
408 extern int nvd0_display_init(struct drm_device *);
409 extern void nvd0_display_fini(struct drm_device *);
410 struct nouveau_bo *nvd0_display_crtc_sema(struct drm_device *, int crtc);
411 void nvd0_display_flip_stop(struct drm_crtc *);
412 int nvd0_display_flip_next(struct drm_crtc *, struct drm_framebuffer *,
413 struct nouveau_channel *, u32 swap_interval);
416 /* nouveau_display.c */
417 int nouveau_display_create(struct drm_device *dev);
418 void nouveau_display_destroy(struct drm_device *dev);
419 int nouveau_display_init(struct drm_device *dev);
420 void nouveau_display_fini(struct drm_device *dev);
421 int nouveau_vblank_enable(struct drm_device *dev, int crtc);
422 void nouveau_vblank_disable(struct drm_device *dev, int crtc);
423 int nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb,
424 struct drm_pending_vblank_event *event);
425 int nouveau_finish_page_flip(struct nouveau_channel *,
426 struct nouveau_page_flip_state *);
427 int nouveau_display_dumb_create(struct drm_file *, struct drm_device *,
428 struct drm_mode_create_dumb *args);
429 int nouveau_display_dumb_map_offset(struct drm_file *, struct drm_device *,
430 uint32_t handle, uint64_t *offset);
431 int nouveau_display_dumb_destroy(struct drm_file *, struct drm_device *,
434 #ifndef ioread32_native
436 #define ioread16_native ioread16be
437 #define iowrite16_native iowrite16be
438 #define ioread32_native ioread32be
439 #define iowrite32_native iowrite32be
440 #else /* def __BIG_ENDIAN */
441 #define ioread16_native ioread16
442 #define iowrite16_native iowrite16
443 #define ioread32_native ioread32
444 #define iowrite32_native iowrite32
445 #endif /* def __BIG_ENDIAN else */
446 #endif /* !ioread32_native */
448 /* register access */
449 #define nv_rd08 _nv_rd08
450 #define nv_wr08 _nv_wr08
451 #define nv_rd32 _nv_rd32
452 #define nv_wr32 _nv_wr32
453 #define nv_mask _nv_mask
455 #define nv_wait(dev, reg, mask, val) \
456 nouveau_wait_eq(dev, 2000000000ULL, (reg), (mask), (val))
457 #define nv_wait_ne(dev, reg, mask, val) \
458 nouveau_wait_ne(dev, 2000000000ULL, (reg), (mask), (val))
459 #define nv_wait_cb(dev, func, data) \
460 nouveau_wait_cb(dev, 2000000000ULL, (func), (data))
464 * Argument d is (struct drm_device *).
466 #define NV_PRINTK(level, d, fmt, arg...) \
467 printk(level "[" DRM_NAME "] " DRIVER_NAME " %s: " fmt, \
468 pci_name(d->pdev), ##arg)
469 #ifndef NV_DEBUG_NOTRACE
470 #define NV_DEBUG(d, fmt, arg...) do { \
471 if (drm_debug & DRM_UT_DRIVER) { \
472 NV_PRINTK(KERN_DEBUG, d, "%s:%d - " fmt, __func__, \
476 #define NV_DEBUG_KMS(d, fmt, arg...) do { \
477 if (drm_debug & DRM_UT_KMS) { \
478 NV_PRINTK(KERN_DEBUG, d, "%s:%d - " fmt, __func__, \
483 #define NV_DEBUG(d, fmt, arg...) do { \
484 if (drm_debug & DRM_UT_DRIVER) \
485 NV_PRINTK(KERN_DEBUG, d, fmt, ##arg); \
487 #define NV_DEBUG_KMS(d, fmt, arg...) do { \
488 if (drm_debug & DRM_UT_KMS) \
489 NV_PRINTK(KERN_DEBUG, d, fmt, ##arg); \
492 #define NV_ERROR(d, fmt, arg...) NV_PRINTK(KERN_ERR, d, fmt, ##arg)
493 #define NV_INFO(d, fmt, arg...) NV_PRINTK(KERN_INFO, d, fmt, ##arg)
494 #define NV_TRACEWARN(d, fmt, arg...) NV_PRINTK(KERN_NOTICE, d, fmt, ##arg)
495 #define NV_TRACE(d, fmt, arg...) NV_PRINTK(KERN_INFO, d, fmt, ##arg)
496 #define NV_WARN(d, fmt, arg...) NV_PRINTK(KERN_WARNING, d, fmt, ##arg)
497 #define NV_WARNONCE(d, fmt, arg...) do { \
498 static int _warned = 0; \
500 NV_WARN(d, fmt, ##arg); \
506 nv_two_heads(struct drm_device *dev)
508 struct drm_nouveau_private *dev_priv = dev->dev_private;
509 const int impl = dev->pci_device & 0x0ff0;
511 if (dev_priv->card_type >= NV_10 && impl != 0x0100 &&
512 impl != 0x0150 && impl != 0x01a0 && impl != 0x0200)
519 nv_gf4_disp_arch(struct drm_device *dev)
521 return nv_two_heads(dev) && (dev->pci_device & 0x0ff0) != 0x0110;
525 nv_two_reg_pll(struct drm_device *dev)
527 struct drm_nouveau_private *dev_priv = dev->dev_private;
528 const int impl = dev->pci_device & 0x0ff0;
530 if (impl == 0x0310 || impl == 0x0340 || dev_priv->card_type >= NV_40)
536 nv_match_device(struct drm_device *dev, unsigned device,
537 unsigned sub_vendor, unsigned sub_device)
539 return dev->pdev->device == device &&
540 dev->pdev->subsystem_vendor == sub_vendor &&
541 dev->pdev->subsystem_device == sub_device;
544 static inline struct nv04_display *
545 nv04_display(struct drm_device *dev)
547 struct drm_nouveau_private *dev_priv = dev->dev_private;
548 return dev_priv->engine.display.priv;
551 #endif /* __NOUVEAU_DRV_H__ */