2 * Copyright 2011 Red Hat Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
26 #include "nouveau_drm.h"
27 #include "nouveau_connector.h"
28 #include "nouveau_encoder.h"
29 #include "nouveau_crtc.h"
32 hdmi_sor(struct drm_encoder *encoder)
34 struct nouveau_drm *drm = nouveau_drm(encoder->dev);
35 if (nv_device(drm->device)->chipset < 0xa3 ||
36 nv_device(drm->device)->chipset == 0xaa ||
37 nv_device(drm->device)->chipset == 0xac)
43 hdmi_base(struct drm_encoder *encoder)
45 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
46 struct nouveau_crtc *nv_crtc = nouveau_crtc(nv_encoder->crtc);
47 if (!hdmi_sor(encoder))
48 return 0x616500 + (nv_crtc->index * 0x800);
49 return 0x61c500 + (nv_encoder->or * 0x800);
53 hdmi_wr32(struct drm_encoder *encoder, u32 reg, u32 val)
55 struct nouveau_device *device = nouveau_dev(encoder->dev);
56 nv_wr32(device, hdmi_base(encoder) + reg, val);
60 hdmi_rd32(struct drm_encoder *encoder, u32 reg)
62 struct nouveau_device *device = nouveau_dev(encoder->dev);
63 return nv_rd32(device, hdmi_base(encoder) + reg);
67 hdmi_mask(struct drm_encoder *encoder, u32 reg, u32 mask, u32 val)
69 u32 tmp = hdmi_rd32(encoder, reg);
70 hdmi_wr32(encoder, reg, (tmp & ~mask) | val);
75 nouveau_audio_disconnect(struct drm_encoder *encoder)
77 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
78 struct nouveau_device *device = nouveau_dev(encoder->dev);
79 u32 or = nv_encoder->or * 0x800;
81 if (hdmi_sor(encoder))
82 nv_mask(device, 0x61c448 + or, 0x00000003, 0x00000000);
86 nouveau_audio_mode_set(struct drm_encoder *encoder,
87 struct drm_display_mode *mode)
89 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
90 struct nouveau_device *device = nouveau_dev(encoder->dev);
91 struct nouveau_connector *nv_connector;
92 u32 or = nv_encoder->or * 0x800;
95 nv_connector = nouveau_encoder_connector_get(nv_encoder);
96 if (!drm_detect_monitor_audio(nv_connector->edid)) {
97 nouveau_audio_disconnect(encoder);
101 if (hdmi_sor(encoder)) {
102 nv_mask(device, 0x61c448 + or, 0x00000001, 0x00000001);
104 drm_edid_to_eld(&nv_connector->base, nv_connector->edid);
105 if (nv_connector->base.eld[0]) {
106 u8 *eld = nv_connector->base.eld;
107 for (i = 0; i < eld[2] * 4; i++)
108 nv_wr32(device, 0x61c440 + or, (i << 8) | eld[i]);
109 for (i = eld[2] * 4; i < 0x60; i++)
110 nv_wr32(device, 0x61c440 + or, (i << 8) | 0x00);
111 nv_mask(device, 0x61c448 + or, 0x00000002, 0x00000002);
117 nouveau_hdmi_infoframe(struct drm_encoder *encoder, u32 ctrl, u8 *frame)
119 /* calculate checksum for the infoframe */
121 for (i = 0; i < frame[2]; i++)
123 frame[3] = 256 - sum;
125 /* disable infoframe, and write header */
126 hdmi_mask(encoder, ctrl + 0x00, 0x00000001, 0x00000000);
127 hdmi_wr32(encoder, ctrl + 0x08, *(u32 *)frame & 0xffffff);
129 /* register scans tell me the audio infoframe has only one set of
130 * subpack regs, according to tegra (gee nvidia, it'd be nice if we
131 * could get those docs too!), the hdmi block pads out the rest of
132 * the packet on its own.
137 /* write out checksum and data, weird weird 7 byte register pairs */
138 for (i = 0; i < frame[2] + 1; i += 7) {
139 u32 rsubpack = ctrl + 0x0c + ((i / 7) * 8);
140 u32 *subpack = (u32 *)&frame[3 + i];
141 hdmi_wr32(encoder, rsubpack + 0, subpack[0]);
142 hdmi_wr32(encoder, rsubpack + 4, subpack[1] & 0xffffff);
145 /* enable the infoframe */
146 hdmi_mask(encoder, ctrl, 0x00000001, 0x00000001);
150 nouveau_hdmi_video_infoframe(struct drm_encoder *encoder,
151 struct drm_display_mode *mode)
153 const u8 Y = 0, A = 0, B = 0, S = 0, C = 0, M = 0, R = 0;
154 const u8 ITC = 0, EC = 0, Q = 0, SC = 0, VIC = 0, PR = 0;
155 const u8 bar_top = 0, bar_bottom = 0, bar_left = 0, bar_right = 0;
158 frame[0x00] = 0x82; /* AVI infoframe */
159 frame[0x01] = 0x02; /* version */
160 frame[0x02] = 0x0d; /* length */
162 frame[0x04] = (Y << 5) | (A << 4) | (B << 2) | S;
163 frame[0x05] = (C << 6) | (M << 4) | R;
164 frame[0x06] = (ITC << 7) | (EC << 4) | (Q << 2) | SC;
167 frame[0x09] = bar_top & 0xff;
168 frame[0x0a] = bar_top >> 8;
169 frame[0x0b] = bar_bottom & 0xff;
170 frame[0x0c] = bar_bottom >> 8;
171 frame[0x0d] = bar_left & 0xff;
172 frame[0x0e] = bar_left >> 8;
173 frame[0x0f] = bar_right & 0xff;
174 frame[0x10] = bar_right >> 8;
179 nouveau_hdmi_infoframe(encoder, 0x020, frame);
183 nouveau_hdmi_audio_infoframe(struct drm_encoder *encoder,
184 struct drm_display_mode *mode)
186 const u8 CT = 0x00, CC = 0x01, ceaSS = 0x00, SF = 0x00, FMT = 0x00;
187 const u8 CA = 0x00, DM_INH = 0, LSV = 0x00;
190 frame[0x00] = 0x84; /* Audio infoframe */
191 frame[0x01] = 0x01; /* version */
192 frame[0x02] = 0x0a; /* length */
194 frame[0x04] = (CT << 4) | CC;
195 frame[0x05] = (SF << 2) | ceaSS;
198 frame[0x08] = (DM_INH << 7) | (LSV << 3);
203 nouveau_hdmi_infoframe(encoder, 0x000, frame);
207 nouveau_hdmi_disconnect(struct drm_encoder *encoder)
209 nouveau_audio_disconnect(encoder);
211 /* disable audio and avi infoframes */
212 hdmi_mask(encoder, 0x000, 0x00000001, 0x00000000);
213 hdmi_mask(encoder, 0x020, 0x00000001, 0x00000000);
216 hdmi_mask(encoder, 0x0a4, 0x40000000, 0x00000000);
220 nouveau_hdmi_mode_set(struct drm_encoder *encoder,
221 struct drm_display_mode *mode)
223 struct nouveau_device *device = nouveau_dev(encoder->dev);
224 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
225 struct nouveau_connector *nv_connector;
226 u32 max_ac_packet, rekey;
228 nv_connector = nouveau_encoder_connector_get(nv_encoder);
229 if (!mode || !nv_connector || !nv_connector->edid ||
230 !drm_detect_hdmi_monitor(nv_connector->edid)) {
231 nouveau_hdmi_disconnect(encoder);
235 nouveau_hdmi_video_infoframe(encoder, mode);
236 nouveau_hdmi_audio_infoframe(encoder, mode);
238 hdmi_mask(encoder, 0x0d0, 0x00070001, 0x00010001); /* SPARE, HW_CTS */
239 hdmi_mask(encoder, 0x068, 0x00010101, 0x00000000); /* ACR_CTRL, ?? */
240 hdmi_mask(encoder, 0x078, 0x80000000, 0x80000000); /* ACR_0441_ENABLE */
242 nv_mask(device, 0x61733c, 0x00100000, 0x00100000); /* RESETF */
243 nv_mask(device, 0x61733c, 0x10000000, 0x10000000); /* LOOKUP_EN */
244 nv_mask(device, 0x61733c, 0x00100000, 0x00000000); /* !RESETF */
246 /* value matches nvidia binary driver, and tegra constant */
249 max_ac_packet = mode->htotal - mode->hdisplay;
250 max_ac_packet -= rekey;
251 max_ac_packet -= 18; /* constant from tegra */
255 hdmi_mask(encoder, 0x0a4, 0x5f1f003f, 0x40000000 | /* enable */
256 0x1f000000 | /* unknown */
257 max_ac_packet << 16 |
260 nouveau_audio_mode_set(encoder, mode);