2 * Copyright (C) 2006 Ben Skeggs.
6 * Permission is hereby granted, free of charge, to any person obtaining
7 * a copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sublicense, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial
16 * portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
30 * Ben Skeggs <darktama@iinet.net.au>
35 #include <nouveau_drm.h>
36 #include "nouveau_drv.h"
37 #include "nouveau_reg.h"
40 nouveau_irq_preinstall(struct drm_device *dev)
43 nv_wr32(dev, NV03_PMC_INTR_EN_0, 0);
47 nouveau_irq_postinstall(struct drm_device *dev)
49 struct drm_nouveau_private *dev_priv = dev->dev_private;
52 nv_wr32(dev, NV03_PMC_INTR_EN_0, NV_PMC_INTR_EN_0_MASTER_ENABLE);
53 if (dev_priv->msi_enabled)
54 nv_wr08(dev, 0x00088068, 0xff);
60 nouveau_irq_uninstall(struct drm_device *dev)
63 nv_wr32(dev, NV03_PMC_INTR_EN_0, 0);
67 nouveau_irq_handler(DRM_IRQ_ARGS)
69 struct drm_device *dev = (struct drm_device *)arg;
70 struct drm_nouveau_private *dev_priv = dev->dev_private;
75 stat = nv_rd32(dev, NV03_PMC_INTR_0);
76 if (stat == 0 || stat == ~0)
79 spin_lock_irqsave(&dev_priv->context_switch_lock, flags);
80 for (i = 0; i < 32 && stat; i++) {
81 if (!(stat & (1 << i)) || !dev_priv->irq_handler[i])
84 dev_priv->irq_handler[i](dev);
90 if (dev_priv->msi_enabled)
91 nv_wr08(dev, 0x00088068, 0xff);
92 spin_unlock_irqrestore(&dev_priv->context_switch_lock, flags);
98 nouveau_irq_init(struct drm_device *dev)
100 struct drm_nouveau_private *dev_priv = dev->dev_private;
103 if (nouveau_msi != 0 && dev_priv->card_type >= NV_50) {
104 ret = pci_enable_msi(dev->pdev);
106 NV_INFO(dev, "enabled MSI\n");
107 dev_priv->msi_enabled = true;
111 return drm_irq_install(dev);
115 nouveau_irq_fini(struct drm_device *dev)
117 struct drm_nouveau_private *dev_priv = dev->dev_private;
119 drm_irq_uninstall(dev);
120 if (dev_priv->msi_enabled)
121 pci_disable_msi(dev->pdev);
125 nouveau_irq_register(struct drm_device *dev, int status_bit,
126 void (*handler)(struct drm_device *))
128 struct drm_nouveau_private *dev_priv = dev->dev_private;
131 spin_lock_irqsave(&dev_priv->context_switch_lock, flags);
132 dev_priv->irq_handler[status_bit] = handler;
133 spin_unlock_irqrestore(&dev_priv->context_switch_lock, flags);
137 nouveau_irq_unregister(struct drm_device *dev, int status_bit)
139 struct drm_nouveau_private *dev_priv = dev->dev_private;
142 spin_lock_irqsave(&dev_priv->context_switch_lock, flags);
143 dev_priv->irq_handler[status_bit] = NULL;
144 spin_unlock_irqrestore(&dev_priv->context_switch_lock, flags);