drivers/gpu/drm/nouveau/nouveau_ramht.c

   1 /*
   2  * Copyright 2010 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs
  23  */
  24
  25 #include "drmP.h"
  26
  27 #include "nouveau_drv.h"
  28 #include "nouveau_ramht.h"
  29
  30 static uint32_t
  31 nouveau_ramht_hash_handle(struct drm_device *dev, int channel, uint32_t handle)
  32 {
  33         struct drm_nouveau_private *dev_priv = dev->dev_private;
  34         uint32_t hash = 0;
  35         int i;
  36
  37         NV_DEBUG(dev, "ch%d handle=0x%08x\n", channel, handle);
  38
  39         for (i = 32; i > 0; i -= dev_priv->ramht_bits) {
  40                 hash ^= (handle & ((1 << dev_priv->ramht_bits) - 1));
  41                 handle >>= dev_priv->ramht_bits;
  42         }
  43
  44         if (dev_priv->card_type < NV_50)
  45                 hash ^= channel << (dev_priv->ramht_bits - 4);
  46         hash <<= 3;
  47
  48         NV_DEBUG(dev, "hash=0x%08x\n", hash);
  49         return hash;
  50 }
  51
  52 static int
  53 nouveau_ramht_entry_valid(struct drm_device *dev, struct nouveau_gpuobj *ramht,
  54                           uint32_t offset)
  55 {
  56         struct drm_nouveau_private *dev_priv = dev->dev_private;
  57         uint32_t ctx = nv_ro32(ramht, offset + 4);
  58
  59         if (dev_priv->card_type < NV_40)
  60                 return ((ctx & NV_RAMHT_CONTEXT_VALID) != 0);
  61         return (ctx != 0);
  62 }
  63
  64 int
  65 nouveau_ramht_insert(struct nouveau_channel *chan, u32 handle,
  66                      struct nouveau_gpuobj *gpuobj)
  67 {
  68         struct drm_device *dev = chan->dev;
  69         struct drm_nouveau_private *dev_priv = dev->dev_private;
  70         struct nouveau_instmem_engine *instmem = &dev_priv->engine.instmem;
  71         struct nouveau_ramht_entry *entry;
  72         struct nouveau_gpuobj *ramht = chan->ramht->gpuobj;
  73         uint32_t ctx, co, ho;
  74
  75         if (nouveau_ramht_find(chan, handle))
  76                 return -EEXIST;
  77
  78         entry = kmalloc(sizeof(*entry), GFP_KERNEL);
  79         if (!entry)
  80                 return -ENOMEM;
  81         entry->channel = chan;
  82         entry->gpuobj = NULL;
  83         entry->handle = handle;
  84         list_add(&entry->head, &chan->ramht->entries);
  85         nouveau_gpuobj_ref(gpuobj, &entry->gpuobj);
  86
  87         if (dev_priv->card_type < NV_40) {
  88                 ctx = NV_RAMHT_CONTEXT_VALID | (gpuobj->cinst >> 4) |
  89                       (chan->id << NV_RAMHT_CONTEXT_CHANNEL_SHIFT) |
  90                       (gpuobj->engine << NV_RAMHT_CONTEXT_ENGINE_SHIFT);
  91         } else
  92         if (dev_priv->card_type < NV_50) {
  93                 ctx = (gpuobj->cinst >> 4) |
  94                       (chan->id << NV40_RAMHT_CONTEXT_CHANNEL_SHIFT) |
  95                       (gpuobj->engine << NV40_RAMHT_CONTEXT_ENGINE_SHIFT);
  96         } else {
  97                 if (gpuobj->engine == NVOBJ_ENGINE_DISPLAY) {
  98                         ctx = (gpuobj->cinst << 10) | 2;
  99                 } else {
 100                         ctx = (gpuobj->cinst >> 4) |
 101                               ((gpuobj->engine <<
 102                                 NV40_RAMHT_CONTEXT_ENGINE_SHIFT));
 103                 }
 104         }
 105
 106         co = ho = nouveau_ramht_hash_handle(dev, chan->id, handle);
 107         do {
 108                 if (!nouveau_ramht_entry_valid(dev, ramht, co)) {
 109                         NV_DEBUG(dev,
 110                                  "insert ch%d 0x%08x: h=0x%08x, c=0x%08x\n",
 111                                  chan->id, co, handle, ctx);
 112                         nv_wo32(ramht, co + 0, handle);
 113                         nv_wo32(ramht, co + 4, ctx);
 114
 115                         instmem->flush(dev);
 116                         return 0;
 117                 }
 118                 NV_DEBUG(dev, "collision ch%d 0x%08x: h=0x%08x\n",
 119                          chan->id, co, nv_ro32(ramht, co));
 120
 121                 co += 8;
 122                 if (co >= dev_priv->ramht_size)
 123                         co = 0;
 124         } while (co != ho);
 125
 126         NV_ERROR(dev, "RAMHT space exhausted. ch=%d\n", chan->id);
 127         list_del(&entry->head);
 128         kfree(entry);
 129         return -ENOMEM;
 130 }
 131
 132 void
 133 nouveau_ramht_remove(struct nouveau_channel *chan, u32 handle)
 134 {
 135         struct drm_device *dev = chan->dev;
 136         struct drm_nouveau_private *dev_priv = dev->dev_private;
 137         struct nouveau_instmem_engine *instmem = &dev_priv->engine.instmem;
 138         struct nouveau_gpuobj *ramht = chan->ramht->gpuobj;
 139         struct nouveau_ramht_entry *entry, *tmp;
 140         u32 co, ho;
 141
 142         list_for_each_entry_safe(entry, tmp, &chan->ramht->entries, head) {
 143                 if (entry->channel != chan || entry->handle != handle)
 144                         continue;
 145
 146                 nouveau_gpuobj_ref(NULL, &entry->gpuobj);
 147                 list_del(&entry->head);
 148                 kfree(entry);
 149                 break;
 150         }
 151
 152         co = ho = nouveau_ramht_hash_handle(dev, chan->id, handle);
 153         do {
 154                 if (nouveau_ramht_entry_valid(dev, ramht, co) &&
 155                     (handle == nv_ro32(ramht, co))) {
 156                         NV_DEBUG(dev,
 157                                  "remove ch%d 0x%08x: h=0x%08x, c=0x%08x\n",
 158                                  chan->id, co, handle, nv_ro32(ramht, co + 4));
 159                         nv_wo32(ramht, co + 0, 0x00000000);
 160                         nv_wo32(ramht, co + 4, 0x00000000);
 161                         instmem->flush(dev);
 162                         return;
 163                 }
 164
 165                 co += 8;
 166                 if (co >= dev_priv->ramht_size)
 167                         co = 0;
 168         } while (co != ho);
 169
 170         NV_ERROR(dev, "RAMHT entry not found. ch=%d, handle=0x%08x\n",
 171                  chan->id, handle);
 172 }
 173
 174 struct nouveau_gpuobj *
 175 nouveau_ramht_find(struct nouveau_channel *chan, u32 handle)
 176 {
 177         struct nouveau_ramht_entry *entry;
 178
 179         list_for_each_entry(entry, &chan->ramht->entries, head) {
 180                 if (entry->channel == chan && entry->handle == handle)
 181                         return entry->gpuobj;
 182         }
 183
 184         return NULL;
 185 }
 186
 187 int
 188 nouveau_ramht_new(struct drm_device *dev, struct nouveau_gpuobj *gpuobj,
 189                   struct nouveau_ramht **pramht)
 190 {
 191         struct nouveau_ramht *ramht;
 192
 193         ramht = kzalloc(sizeof(*ramht), GFP_KERNEL);
 194         if (!ramht)
 195                 return -ENOMEM;
 196
 197         ramht->dev = dev;
 198         ramht->refcount = 1;
 199         INIT_LIST_HEAD(&ramht->entries);
 200         nouveau_gpuobj_ref(gpuobj, &ramht->gpuobj);
 201
 202         *pramht = ramht;
 203         return 0;
 204 }
 205
 206 void
 207 nouveau_ramht_ref(struct nouveau_ramht *ref, struct nouveau_ramht **ptr,
 208                   struct nouveau_channel *chan)
 209 {
 210         struct nouveau_ramht_entry *entry, *tmp;
 211         struct nouveau_ramht *ramht;
 212
 213         if (ref)
 214                 ref->refcount++;
 215
 216         ramht = *ptr;
 217         if (ramht) {
 218                 list_for_each_entry_safe(entry, tmp, &ramht->entries, head) {
 219                         if (entry->channel == chan)
 220                                 nouveau_ramht_remove(chan, entry->handle);
 221                 }
 222
 223                 if (--ramht->refcount == 0) {
 224                         nouveau_gpuobj_ref(NULL, &ramht->gpuobj);
 225                         kfree(ramht);
 226                 }
 227         }
 228         *ptr = ref;
 229 }