3 #include "nouveau_drv.h"
4 #include "nouveau_drm.h"
7 nv04_fb_vram_init(struct drm_device *dev)
9 struct drm_nouveau_private *dev_priv = dev->dev_private;
10 u32 boot0 = nv_rd32(dev, NV04_PFB_BOOT_0);
12 if (boot0 & 0x00000100) {
13 dev_priv->vram_size = ((boot0 >> 12) & 0xf) * 2 + 2;
14 dev_priv->vram_size *= 1024 * 1024;
16 switch (boot0 & NV04_PFB_BOOT_0_RAM_AMOUNT) {
17 case NV04_PFB_BOOT_0_RAM_AMOUNT_32MB:
18 dev_priv->vram_size = 32 * 1024 * 1024;
20 case NV04_PFB_BOOT_0_RAM_AMOUNT_16MB:
21 dev_priv->vram_size = 16 * 1024 * 1024;
23 case NV04_PFB_BOOT_0_RAM_AMOUNT_8MB:
24 dev_priv->vram_size = 8 * 1024 * 1024;
26 case NV04_PFB_BOOT_0_RAM_AMOUNT_4MB:
27 dev_priv->vram_size = 4 * 1024 * 1024;
32 if ((boot0 & 0x00000038) <= 0x10)
33 dev_priv->vram_type = NV_MEM_TYPE_SGRAM;
35 dev_priv->vram_type = NV_MEM_TYPE_SDRAM;
41 nv04_fb_init(struct drm_device *dev)
43 /* This is what the DDX did for NV_ARCH_04, but a mmio-trace shows
44 * nvidia reading PFB_CFG_0, then writing back its original value.
45 * (which was 0x701114 in this case)
48 nv_wr32(dev, NV04_PFB_CFG0, 0x1114);
53 nv04_fb_takedown(struct drm_device *dev)