2 * Copyright 2009 Ben Skeggs
3 * Copyright 2008 Stuart Bennett
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
26 #include "nouveau_drv.h"
27 #include "nouveau_dma.h"
28 #include "nouveau_ramht.h"
29 #include "nouveau_fbcon.h"
32 nv04_fbcon_copyarea(struct fb_info *info, const struct fb_copyarea *region)
34 struct nouveau_fbdev *nfbdev = info->par;
35 struct drm_device *dev = nfbdev->dev;
36 struct drm_nouveau_private *dev_priv = dev->dev_private;
37 struct nouveau_channel *chan = dev_priv->channel;
39 if (info->state != FBINFO_STATE_RUNNING)
42 if (!(info->flags & FBINFO_HWACCEL_DISABLED) && RING_SPACE(chan, 4)) {
43 nouveau_fbcon_gpu_lockup(info);
46 if (info->flags & FBINFO_HWACCEL_DISABLED) {
47 cfb_copyarea(info, region);
51 BEGIN_RING(chan, NvSubImageBlit, 0x0300, 3);
52 OUT_RING(chan, (region->sy << 16) | region->sx);
53 OUT_RING(chan, (region->dy << 16) | region->dx);
54 OUT_RING(chan, (region->height << 16) | region->width);
59 nv04_fbcon_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
61 struct nouveau_fbdev *nfbdev = info->par;
62 struct drm_device *dev = nfbdev->dev;
63 struct drm_nouveau_private *dev_priv = dev->dev_private;
64 struct nouveau_channel *chan = dev_priv->channel;
66 if (info->state != FBINFO_STATE_RUNNING)
69 if (!(info->flags & FBINFO_HWACCEL_DISABLED) && RING_SPACE(chan, 7)) {
70 nouveau_fbcon_gpu_lockup(info);
73 if (info->flags & FBINFO_HWACCEL_DISABLED) {
74 cfb_fillrect(info, rect);
78 BEGIN_RING(chan, NvSubGdiRect, 0x02fc, 1);
79 OUT_RING(chan, (rect->rop != ROP_COPY) ? 1 : 3);
80 BEGIN_RING(chan, NvSubGdiRect, 0x03fc, 1);
81 if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
82 info->fix.visual == FB_VISUAL_DIRECTCOLOR)
83 OUT_RING(chan, ((uint32_t *)info->pseudo_palette)[rect->color]);
85 OUT_RING(chan, rect->color);
86 BEGIN_RING(chan, NvSubGdiRect, 0x0400, 2);
87 OUT_RING(chan, (rect->dx << 16) | rect->dy);
88 OUT_RING(chan, (rect->width << 16) | rect->height);
93 nv04_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)
95 struct nouveau_fbdev *nfbdev = info->par;
96 struct drm_device *dev = nfbdev->dev;
97 struct drm_nouveau_private *dev_priv = dev->dev_private;
98 struct nouveau_channel *chan = dev_priv->channel;
103 uint32_t *data = (uint32_t *)image->data;
105 if (info->state != FBINFO_STATE_RUNNING)
108 if (image->depth != 1) {
109 cfb_imageblit(info, image);
113 if (!(info->flags & FBINFO_HWACCEL_DISABLED) && RING_SPACE(chan, 8)) {
114 nouveau_fbcon_gpu_lockup(info);
117 if (info->flags & FBINFO_HWACCEL_DISABLED) {
118 cfb_imageblit(info, image);
122 width = ALIGN(image->width, 8);
123 dsize = ALIGN(width * image->height, 32) >> 5;
125 if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
126 info->fix.visual == FB_VISUAL_DIRECTCOLOR) {
127 fg = ((uint32_t *) info->pseudo_palette)[image->fg_color];
128 bg = ((uint32_t *) info->pseudo_palette)[image->bg_color];
130 fg = image->fg_color;
131 bg = image->bg_color;
134 BEGIN_RING(chan, NvSubGdiRect, 0x0be4, 7);
135 OUT_RING(chan, (image->dy << 16) | (image->dx & 0xffff));
136 OUT_RING(chan, ((image->dy + image->height) << 16) |
137 ((image->dx + image->width) & 0xffff));
140 OUT_RING(chan, (image->height << 16) | width);
141 OUT_RING(chan, (image->height << 16) | image->width);
142 OUT_RING(chan, (image->dy << 16) | (image->dx & 0xffff));
145 int iter_len = dsize > 128 ? 128 : dsize;
147 if (RING_SPACE(chan, iter_len + 1)) {
148 nouveau_fbcon_gpu_lockup(info);
149 cfb_imageblit(info, image);
153 BEGIN_RING(chan, NvSubGdiRect, 0x0c00, iter_len);
154 OUT_RINGp(chan, data, iter_len);
163 nv04_fbcon_grobj_new(struct drm_device *dev, int class, uint32_t handle)
165 struct drm_nouveau_private *dev_priv = dev->dev_private;
166 struct nouveau_gpuobj *obj = NULL;
169 ret = nouveau_gpuobj_gr_new(dev_priv->channel, class, &obj);
173 ret = nouveau_ramht_insert(dev_priv->channel, handle, obj);
174 nouveau_gpuobj_ref(NULL, &obj);
179 nv04_fbcon_accel_init(struct fb_info *info)
181 struct nouveau_fbdev *nfbdev = info->par;
182 struct drm_device *dev = nfbdev->dev;
183 struct drm_nouveau_private *dev_priv = dev->dev_private;
184 struct nouveau_channel *chan = dev_priv->channel;
185 const int sub = NvSubCtxSurf2D;
186 int surface_fmt, pattern_fmt, rect_fmt;
189 switch (info->var.bits_per_pixel) {
201 switch (info->var.transp.length) {
202 case 0: /* depth 24 */
203 case 8: /* depth 32 */
217 ret = nv04_fbcon_grobj_new(dev, dev_priv->card_type >= NV_10 ?
218 0x0062 : 0x0042, NvCtxSurf2D);
222 ret = nv04_fbcon_grobj_new(dev, 0x0019, NvClipRect);
226 ret = nv04_fbcon_grobj_new(dev, 0x0043, NvRop);
230 ret = nv04_fbcon_grobj_new(dev, 0x0044, NvImagePatt);
234 ret = nv04_fbcon_grobj_new(dev, 0x004a, NvGdiRect);
238 ret = nv04_fbcon_grobj_new(dev, dev_priv->chipset >= 0x11 ?
239 0x009f : 0x005f, NvImageBlit);
243 if (RING_SPACE(chan, 49)) {
244 nouveau_fbcon_gpu_lockup(info);
248 BEGIN_RING(chan, sub, 0x0000, 1);
249 OUT_RING(chan, NvCtxSurf2D);
250 BEGIN_RING(chan, sub, 0x0184, 2);
251 OUT_RING(chan, NvDmaFB);
252 OUT_RING(chan, NvDmaFB);
253 BEGIN_RING(chan, sub, 0x0300, 4);
254 OUT_RING(chan, surface_fmt);
255 OUT_RING(chan, info->fix.line_length | (info->fix.line_length << 16));
256 OUT_RING(chan, info->fix.smem_start - dev->mode_config.fb_base);
257 OUT_RING(chan, info->fix.smem_start - dev->mode_config.fb_base);
259 BEGIN_RING(chan, sub, 0x0000, 1);
260 OUT_RING(chan, NvRop);
261 BEGIN_RING(chan, sub, 0x0300, 1);
262 OUT_RING(chan, 0x55);
264 BEGIN_RING(chan, sub, 0x0000, 1);
265 OUT_RING(chan, NvImagePatt);
266 BEGIN_RING(chan, sub, 0x0300, 8);
267 OUT_RING(chan, pattern_fmt);
280 BEGIN_RING(chan, sub, 0x0000, 1);
281 OUT_RING(chan, NvClipRect);
282 BEGIN_RING(chan, sub, 0x0300, 2);
284 OUT_RING(chan, (info->var.yres_virtual << 16) | info->var.xres_virtual);
286 BEGIN_RING(chan, NvSubImageBlit, 0x0000, 1);
287 OUT_RING(chan, NvImageBlit);
288 BEGIN_RING(chan, NvSubImageBlit, 0x019c, 1);
289 OUT_RING(chan, NvCtxSurf2D);
290 BEGIN_RING(chan, NvSubImageBlit, 0x02fc, 1);
293 BEGIN_RING(chan, NvSubGdiRect, 0x0000, 1);
294 OUT_RING(chan, NvGdiRect);
295 BEGIN_RING(chan, NvSubGdiRect, 0x0198, 1);
296 OUT_RING(chan, NvCtxSurf2D);
297 BEGIN_RING(chan, NvSubGdiRect, 0x0188, 2);
298 OUT_RING(chan, NvImagePatt);
299 OUT_RING(chan, NvRop);
300 BEGIN_RING(chan, NvSubGdiRect, 0x0304, 1);
302 BEGIN_RING(chan, NvSubGdiRect, 0x0300, 1);
303 OUT_RING(chan, rect_fmt);
304 BEGIN_RING(chan, NvSubGdiRect, 0x02fc, 1);