2 * Copyright 2012 Red Hat Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
26 #include <core/client.h>
27 #include <core/gpuobj.h>
28 #include <core/oproxy.h>
29 #include <subdev/mmu.h>
30 #include <engine/dma.h>
32 struct nvkm_fifo_chan_object {
33 struct nvkm_oproxy oproxy;
34 struct nvkm_fifo_chan *chan;
39 nvkm_fifo_chan_child_fini(struct nvkm_oproxy *base, bool suspend)
41 struct nvkm_fifo_chan_object *object =
42 container_of(base, typeof(*object), oproxy);
43 struct nvkm_engine *engine = object->oproxy.object->engine;
44 struct nvkm_fifo_chan *chan = object->chan;
45 struct nvkm_fifo_engn *engn = &chan->engn[engine->subdev.index];
46 const char *name = nvkm_subdev_name[engine->subdev.index];
52 if (chan->func->engine_fini) {
53 ret = chan->func->engine_fini(chan, engine, suspend);
55 nvif_error(&chan->object,
56 "detach %s failed, %d\n", name, ret);
62 ret = nvkm_object_fini(engn->object, suspend);
67 nvif_trace(&chan->object, "detached %s\n", name);
72 nvkm_fifo_chan_child_init(struct nvkm_oproxy *base)
74 struct nvkm_fifo_chan_object *object =
75 container_of(base, typeof(*object), oproxy);
76 struct nvkm_engine *engine = object->oproxy.object->engine;
77 struct nvkm_fifo_chan *chan = object->chan;
78 struct nvkm_fifo_engn *engn = &chan->engn[engine->subdev.index];
79 const char *name = nvkm_subdev_name[engine->subdev.index];
86 ret = nvkm_object_init(engn->object);
91 if (chan->func->engine_init) {
92 ret = chan->func->engine_init(chan, engine);
94 nvif_error(&chan->object,
95 "attach %s failed, %d\n", name, ret);
100 nvif_trace(&chan->object, "attached %s\n", name);
105 nvkm_fifo_chan_child_del(struct nvkm_oproxy *base)
107 struct nvkm_fifo_chan_object *object =
108 container_of(base, typeof(*object), oproxy);
109 struct nvkm_engine *engine = object->oproxy.base.engine;
110 struct nvkm_fifo_chan *chan = object->chan;
111 struct nvkm_fifo_engn *engn = &chan->engn[engine->subdev.index];
113 if (chan->func->object_dtor)
114 chan->func->object_dtor(chan, object->hash);
116 if (!--engn->refcount) {
117 if (chan->func->engine_dtor)
118 chan->func->engine_dtor(chan, engine);
119 nvkm_object_del(&engn->object);
121 atomic_dec(&chan->vm->engref[engine->subdev.index]);
125 static const struct nvkm_oproxy_func
126 nvkm_fifo_chan_child_func = {
127 .dtor[0] = nvkm_fifo_chan_child_del,
128 .init[0] = nvkm_fifo_chan_child_init,
129 .fini[0] = nvkm_fifo_chan_child_fini,
133 nvkm_fifo_chan_child_new(const struct nvkm_oclass *oclass, void *data, u32 size,
134 struct nvkm_object **pobject)
136 struct nvkm_engine *engine = oclass->engine;
137 struct nvkm_fifo_chan *chan = nvkm_fifo_chan(oclass->parent);
138 struct nvkm_fifo_engn *engn = &chan->engn[engine->subdev.index];
139 struct nvkm_fifo_chan_object *object;
142 if (!(object = kzalloc(sizeof(*object), GFP_KERNEL)))
144 nvkm_oproxy_ctor(&nvkm_fifo_chan_child_func, oclass, &object->oproxy);
146 *pobject = &object->oproxy.base;
148 if (!engn->refcount++) {
149 struct nvkm_oclass cclass = {
150 .client = oclass->client,
151 .engine = oclass->engine,
155 atomic_inc(&chan->vm->engref[engine->subdev.index]);
157 if (engine->func->fifo.cclass) {
158 ret = engine->func->fifo.cclass(chan, &cclass,
161 if (engine->func->cclass) {
162 ret = nvkm_object_new_(engine->func->cclass, &cclass,
163 NULL, 0, &engn->object);
168 if (chan->func->engine_ctor) {
169 ret = chan->func->engine_ctor(chan, oclass->engine,
176 ret = oclass->base.ctor(&(const struct nvkm_oclass) {
177 .base = oclass->base,
178 .engn = oclass->engn,
179 .handle = oclass->handle,
180 .object = oclass->object,
181 .client = oclass->client,
182 .parent = engn->object ?
186 }, data, size, &object->oproxy.object);
190 if (chan->func->object_ctor) {
192 chan->func->object_ctor(chan, object->oproxy.object);
193 if (object->hash < 0)
201 nvkm_fifo_chan_child_get(struct nvkm_object *object, int index,
202 struct nvkm_oclass *oclass)
204 struct nvkm_fifo_chan *chan = nvkm_fifo_chan(object);
205 struct nvkm_fifo *fifo = chan->fifo;
206 struct nvkm_device *device = fifo->engine.subdev.device;
207 struct nvkm_engine *engine;
208 u64 mask = chan->engines;
211 for (; c = 0, i = __ffs64(mask), mask; mask &= ~(1ULL << i)) {
212 if (!(engine = nvkm_device_engine(device, i)))
214 oclass->engine = engine;
215 oclass->base.oclass = 0;
217 if (engine->func->fifo.sclass) {
218 ret = engine->func->fifo.sclass(oclass, index);
219 if (oclass->base.oclass) {
220 if (!oclass->base.ctor)
221 oclass->base.ctor = nvkm_object_new;
222 oclass->ctor = nvkm_fifo_chan_child_new;
230 while (engine->func->sclass[c].oclass) {
232 oclass->base = engine->func->sclass[index];
233 if (!oclass->base.ctor)
234 oclass->base.ctor = nvkm_object_new;
235 oclass->ctor = nvkm_fifo_chan_child_new;
246 nvkm_fifo_chan_ntfy(struct nvkm_object *object, u32 type,
247 struct nvkm_event **pevent)
249 struct nvkm_fifo_chan *chan = nvkm_fifo_chan(object);
250 if (chan->func->ntfy)
251 return chan->func->ntfy(chan, type, pevent);
256 nvkm_fifo_chan_map(struct nvkm_object *object, u64 *addr, u32 *size)
258 struct nvkm_fifo_chan *chan = nvkm_fifo_chan(object);
265 nvkm_fifo_chan_rd32(struct nvkm_object *object, u64 addr, u32 *data)
267 struct nvkm_fifo_chan *chan = nvkm_fifo_chan(object);
268 if (unlikely(!chan->user)) {
269 chan->user = ioremap(chan->addr, chan->size);
273 if (unlikely(addr + 4 > chan->size))
275 *data = ioread32_native(chan->user + addr);
280 nvkm_fifo_chan_wr32(struct nvkm_object *object, u64 addr, u32 data)
282 struct nvkm_fifo_chan *chan = nvkm_fifo_chan(object);
283 if (unlikely(!chan->user)) {
284 chan->user = ioremap(chan->addr, chan->size);
288 if (unlikely(addr + 4 > chan->size))
290 iowrite32_native(data, chan->user + addr);
295 nvkm_fifo_chan_fini(struct nvkm_object *object, bool suspend)
297 struct nvkm_fifo_chan *chan = nvkm_fifo_chan(object);
298 chan->func->fini(chan);
303 nvkm_fifo_chan_init(struct nvkm_object *object)
305 struct nvkm_fifo_chan *chan = nvkm_fifo_chan(object);
306 chan->func->init(chan);
311 nvkm_fifo_chan_dtor(struct nvkm_object *object)
313 struct nvkm_fifo_chan *chan = nvkm_fifo_chan(object);
314 struct nvkm_fifo *fifo = chan->fifo;
315 void *data = chan->func->dtor(chan);
318 spin_lock_irqsave(&fifo->lock, flags);
319 if (!list_empty(&chan->head)) {
320 __clear_bit(chan->chid, fifo->mask);
321 list_del(&chan->head);
323 spin_unlock_irqrestore(&fifo->lock, flags);
328 nvkm_vm_ref(NULL, &chan->vm, NULL);
330 nvkm_gpuobj_del(&chan->push);
331 nvkm_gpuobj_del(&chan->inst);
335 static const struct nvkm_object_func
336 nvkm_fifo_chan_func = {
337 .dtor = nvkm_fifo_chan_dtor,
338 .init = nvkm_fifo_chan_init,
339 .fini = nvkm_fifo_chan_fini,
340 .ntfy = nvkm_fifo_chan_ntfy,
341 .map = nvkm_fifo_chan_map,
342 .rd32 = nvkm_fifo_chan_rd32,
343 .wr32 = nvkm_fifo_chan_wr32,
344 .sclass = nvkm_fifo_chan_child_get,
348 nvkm_fifo_chan_ctor(const struct nvkm_fifo_chan_func *func,
349 struct nvkm_fifo *fifo, u32 size, u32 align, bool zero,
350 u64 vm, u64 push, u64 engines, int bar, u32 base, u32 user,
351 const struct nvkm_oclass *oclass,
352 struct nvkm_fifo_chan *chan)
354 struct nvkm_client *client = oclass->client;
355 struct nvkm_device *device = fifo->engine.subdev.device;
356 struct nvkm_mmu *mmu = device->mmu;
357 struct nvkm_dmaobj *dmaobj;
361 nvkm_object_ctor(&nvkm_fifo_chan_func, oclass, &chan->object);
364 chan->engines = engines;
365 INIT_LIST_HEAD(&chan->head);
367 /* instance memory */
368 ret = nvkm_gpuobj_new(device, size, align, zero, NULL, &chan->inst);
372 /* allocate push buffer ctxdma instance */
374 dmaobj = nvkm_dmaobj_search(client, push);
376 return PTR_ERR(dmaobj);
378 ret = nvkm_object_bind(&dmaobj->object, chan->inst, -16,
384 /* channel address space */
386 if (!client->vm || client->vm->mmu == mmu) {
387 ret = nvkm_vm_ref(client->vm, &chan->vm, NULL);
397 /* allocate channel id */
398 spin_lock_irqsave(&fifo->lock, flags);
399 chan->chid = find_first_zero_bit(fifo->mask, NVKM_FIFO_CHID_NR);
400 if (chan->chid >= NVKM_FIFO_CHID_NR) {
401 spin_unlock_irqrestore(&fifo->lock, flags);
404 list_add(&chan->head, &fifo->chan);
405 __set_bit(chan->chid, fifo->mask);
406 spin_unlock_irqrestore(&fifo->lock, flags);
408 /* determine address of this channel's user registers */
409 chan->addr = device->func->resource_addr(device, bar) +
410 base + user * chan->chid;
413 nvkm_event_send(&fifo->cevent, 1, 0, NULL, 0);