1 /* fuc microcode for gf100 PGRAPH/GPC
3 * Copyright 2011 Red Hat Inc.
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27 * - bracket certain functions with scratch writes, useful for debugging
28 * - watchdog timer around ctx operations
32 gpc_mmio_list_head: .b32 #mmio_list_base
34 tpc_mmio_list_head: .b32 #mmio_list_base
36 unk_mmio_list_head: .b32 #mmio_list_base
37 unk_mmio_list_tail: .b32 #mmio_list_base
44 #if NV_PGRAPH_GPCX_UNK__SIZE > 0
55 #define gpc_wr32(addr,reg) /*
56 */ mov b32 $r15 reg /*
57 */ imm32($r14, addr) /*
58 */ or $r14 NV_PGRAPH_GPCX_GPCCS_MMIO_CTRL_BASE_ENABLE /*
61 // reports an exception to the host
63 // In: $r15 error code (see os.h)
67 nv_wr32(NV_PGRAPH_FECS_CC_SCRATCH_VAL(5), $r15)
69 nv_wr32(NV_PGRAPH_FECS_INTR_UP_SET, $r15)
78 nv_iord($r9, NV_PGRAPH_GPCX_GPCCS_TPC_STATUS, 0)
79 bra b32 $r9 0x0 ne #tpc_strand_busy
84 #define tpc_strand_wait() call(tpc_strand_wait)
85 #define tpc_strand_enable() /*
86 */ mov $r15 NV_PGRAPH_GPC0_TPCX_STRAND_CMD_ENABLE /*
87 */ gpc_wr32(NV_PGRAPH_GPC0_TPCX_STRAND_CMD, $r15) /*
89 #define tpc_strand_disable() /*
90 */ mov $r15 NV_PGRAPH_GPC0_TPCX_STRAND_CMD_DISABLE /*
91 */ gpc_wr32(NV_PGRAPH_GPC0_TPCX_STRAND_CMD, $r15) /*
93 #define tpc_strand_seek(p) /*
94 */ mov $r15 NV_PGRAPH_GPC0_TPCX_STRAND_INDEX_ALL /*
95 */ gpc_wr32(NV_PGRAPH_GPC0_TPCX_STRAND_INDEX, $r15) /*
97 */ gpc_wr32(NV_PGRAPH_GPC0_TPCX_STRAND_SELECT, $r15) /*
98 */ mov $r15 NV_PGRAPH_GPC0_TPCX_STRAND_CMD_SEEK /*
100 #define tpc_strand_info(m) /*
101 */ gpc_wr32(NV_PGRAPH_GPC0_TPCX_STRAND_CMD, $r15) /*
103 */ gpc_wr32(NV_PGRAPH_GPC0_TPCX_STRAND_DATA, $r15) /*
104 */ mov $r15 NV_PGRAPH_GPC0_TPCX_STRAND_CMD_GET_INFO /*
105 */ gpc_wr32(NV_PGRAPH_GPC0_TPCX_STRAND_CMD, $r15) /*
110 // GPC fuc initialisation, executed by triggering ucode start, will
111 // fall through to main loop after completion.
114 // CC_SCRATCH[1]: context base
118 // 31:31: set to signal completion
120 // 31:0: GPC context size
126 nv_iord($r1, NV_PGRAPH_GPCX_GPCCS_CAPS, 0)
131 // enable fifo access
132 mov $r2 NV_PGRAPH_GPCX_GPCCS_ACCESS_FIFO
133 nv_iowr(NV_PGRAPH_GPCX_GPCCS_ACCESS, 0, $r2)
135 // setup i0 handler, and route all interrupts to it
138 nv_iowr(NV_PGRAPH_GPCX_GPCCS_INTR_ROUTE, 0, $r0)
140 // enable fifo interrupt
141 mov $r2 NV_PGRAPH_GPCX_GPCCS_INTR_EN_SET_FIFO
142 nv_iowr(NV_PGRAPH_GPCX_GPCCS_INTR_EN_SET, 0, $r2)
147 // how many TPCs do we have?
148 nv_iord($r2, NV_PGRAPH_GPCX_GPCCS_UNITS, 0)
153 st b32 D[$r0 + #tpc_count] $r2
154 st b32 D[$r0 + #tpc_mask] $r3
156 // determine which GPC we are, setup (optional) mmio access offset
157 nv_iord($r2, NV_PGRAPH_GPCX_GPCCS_MYINDEX, 0)
158 st b32 D[$r0 + #gpc_id] $r2
160 nv_iowr(NV_PGRAPH_GPCX_GPCCS_MMIO_BASE, 0, $r2)
162 #if NV_PGRAPH_GPCX_UNK__SIZE > 0
163 // figure out which, and how many, UNKs are actually present
164 imm32($r14, 0x500c30)
179 cmp b32 $r2 NV_PGRAPH_GPCX_UNK__SIZE
180 bra ne #init_unk_loop
182 st b32 D[$r0 + #unk_count] $r3
183 st b32 D[$r0 + #unk_mask] $r4
186 // initialise context base, and size tracking
187 nv_iord($r2, NV_PGRAPH_GPCX_GPCCS_CC_SCRATCH_VAL(1), 0)
188 clear b32 $r3 // track GPC context size here
190 // set mmctx base addresses now so we don't have to do it later,
191 // they don't currently ever change
193 nv_iowr(NV_PGRAPH_GPCX_GPCCS_MMCTX_SAVE_SWBASE, 0, $r5)
194 nv_iowr(NV_PGRAPH_GPCX_GPCCS_MMCTX_LOAD_SWBASE, 0, $r5)
196 // calculate GPC mmio context size
197 ld b32 $r14 D[$r0 + #gpc_mmio_list_head]
198 ld b32 $r15 D[$r0 + #gpc_mmio_list_tail]
203 // calculate per-TPC mmio context size
204 ld b32 $r14 D[$r0 + #tpc_mmio_list_head]
205 ld b32 $r15 D[$r0 + #tpc_mmio_list_tail]
207 ld b32 $r14 D[$r0 + #tpc_count]
212 #if NV_PGRAPH_GPCX_UNK__SIZE > 0
213 // calculate per-UNK mmio context size
214 ld b32 $r14 D[$r0 + #unk_mmio_list_head]
215 ld b32 $r15 D[$r0 + #unk_mmio_list_tail]
217 ld b32 $r14 D[$r0 + #unk_count]
223 // round up base/size to 256 byte boundary (for strand SWBASE)
225 nv_iowr(NV_PGRAPH_GPCX_GPCCS_MMCTX_LOAD_COUNT, 0, $r3) // wtf for?!
233 // calculate size of strand context data
235 call(strand_ctx_init)
240 // calculate size of tpc strand context data
241 mov $r15 NV_PGRAPH_GPC0_TPCX_STRAND_INDEX_ALL
242 gpc_wr32(NV_PGRAPH_GPC0_TPCX_STRAND_INDEX, $r15)
247 ld b32 $r4 D[$r0 + #tpc_count]
248 mov $r5 NV_PGRAPH_GPC0_TPC0
249 ld b32 $r6 D[$r0 + #gpc_id]
252 tpc_strand_init_tpc_loop:
253 add b32 $r14 $r5 NV_TPC_STRAND_CNT
257 tpc_strand_init_idx_loop:
258 add b32 $r14 $r5 NV_TPC_STRAND_INDEX
261 add b32 $r14 $r5 NV_TPC_STRAND_SAVE_SWBASE
264 add b32 $r14 $r5 NV_TPC_STRAND_LOAD_SWBASE
267 add b32 $r14 $r5 NV_TPC_STRAND_WORDS
276 bra nz #tpc_strand_init_idx_loop
277 add b32 $r5 NV_PGRAPH_GPC0_TPC0__SIZE
279 bra nz #tpc_strand_init_tpc_loop
281 mov $r15 NV_PGRAPH_GPC0_TPCX_STRAND_INDEX_ALL
282 gpc_wr32(NV_PGRAPH_GPC0_TPCX_STRAND_INDEX, $r15)
283 tpc_strand_disable();
286 // save context size, and tell HUB we're done
287 nv_iowr(NV_PGRAPH_GPCX_GPCCS_CC_SCRATCH_VAL(1), 0, $r3)
290 nv_iowr(NV_PGRAPH_GPCX_GPCCS_CC_SCRATCH_SET(0), 0, $r2)
292 // Main program loop, very simple, sleeps until woken up by the interrupt
293 // handler, pulls a command from the queue and executes its handler
302 // 0x0000-0x0003 are all context transfers
304 bra nc #main_not_ctx_xfer
305 // fetch $flags and mask off $p1/$p2
310 // set $p1/$p2 according to transfer type
314 // transfer context data
320 or $r15 E_BAD_COMMAND
337 // incoming fifo command?
338 nv_iord($r10, NV_PGRAPH_GPCX_GPCCS_INTR, 0)
339 and $r11 $r10 NV_PGRAPH_GPCX_GPCCS_INTR_FIFO
341 // queue incoming fifo command for later processing
343 nv_iord($r14, NV_PGRAPH_GPCX_GPCCS_FIFO_CMD, 0)
344 nv_iord($r15, NV_PGRAPH_GPCX_GPCCS_FIFO_DATA, 0)
347 nv_iowr(NV_PGRAPH_GPCX_GPCCS_FIFO_ACK, 0, $r14)
349 // ack, and wake up main()
351 nv_iowr(NV_PGRAPH_GPCX_GPCCS_INTR_ACK, 0, $r10)
365 // Set this GPC's bit in HUB_BAR, used to signal completion of various
366 // activities to the HUB fuc
370 ld b32 $r14 D[$r0 + #gpc_id]
372 nv_wr32(0x409418, $r15) // 0x409418 - HUB_BAR_SET
375 // Disables various things, waits a bit, and re-enables them..
377 // Not sure how exactly this helps, perhaps "ENABLE" is not such a
378 // good description for the bits we turn off? Anyways, without this,
379 // funny things happen.
382 mov $r15 NV_PGRAPH_GPCX_GPCCS_RED_SWITCH_POWER
383 nv_iowr(NV_PGRAPH_GPCX_GPCCS_RED_SWITCH, 0, $r15)
387 bra ne #ctx_redswitch_delay
388 or $r15 NV_PGRAPH_GPCX_GPCCS_RED_SWITCH_UNK11
389 or $r15 NV_PGRAPH_GPCX_GPCCS_RED_SWITCH_ENABLE
390 nv_iowr(NV_PGRAPH_GPCX_GPCCS_RED_SWITCH, 0, $r15)
393 // Transfer GPC context data between GPU and storage area
395 // In: $r15 context base address
396 // $p1 clear on save, set on load
397 // $p2 set if opposite direction done/will be done, so:
398 // on save it means: "a load will follow this save"
399 // on load it means: "a save preceeded this load"
402 // set context base address
403 nv_iowr(NV_PGRAPH_GPCX_GPCCS_MEM_BASE, 0, $r15)
405 gpc_wr32(NV_PGRAPH_GPC0_TPCX_STRAND_MEM_BASE, $r15)
407 bra not $p1 #ctx_xfer_not_load
414 nv_iowr(NV_PGRAPH_GPCX_GPCCS_STRAND_SELECT, 0x3f, $r2)
415 xbit $r2 $flags $p1 // SAVE/LOAD
416 add b32 $r2 NV_PGRAPH_GPCX_GPCCS_STRAND_CMD_SAVE
417 nv_iowr(NV_PGRAPH_GPCX_GPCCS_STRAND_CMD, 0x3f, $r2)
422 xbit $r15 $flags $p1 // SAVE/LOAD
423 add b32 $r15 NV_PGRAPH_GPC0_TPCX_STRAND_CMD_SAVE
424 gpc_wr32(NV_PGRAPH_GPC0_TPCX_STRAND_CMD, $r15)
428 xbit $r10 $flags $p1 // direction
431 ld b32 $r12 D[$r0 + #gpc_id]
433 add b32 $r11 $r12 // base = NV_PGRAPH_GPCn
434 ld b32 $r12 D[$r0 + #gpc_mmio_list_head]
435 ld b32 $r13 D[$r0 + #gpc_mmio_list_tail]
436 mov $r14 0 // not multi
439 // per-TPC mmio context
440 xbit $r10 $flags $p1 // direction
441 #if !NV_PGRAPH_GPCX_UNK__SIZE
444 imm32($r11, 0x504000)
445 ld b32 $r12 D[$r0 + #gpc_id]
447 add b32 $r11 $r12 // base = NV_PGRAPH_GPCn_TPC0
448 ld b32 $r12 D[$r0 + #tpc_mmio_list_head]
449 ld b32 $r13 D[$r0 + #tpc_mmio_list_tail]
450 ld b32 $r15 D[$r0 + #tpc_mask]
451 mov $r14 0x800 // stride = 0x800
454 #if NV_PGRAPH_GPCX_UNK__SIZE > 0
455 // per-UNK mmio context
456 xbit $r10 $flags $p1 // direction
458 imm32($r11, 0x503000)
459 ld b32 $r12 D[$r0 + #gpc_id]
461 add b32 $r11 $r12 // base = NV_PGRAPH_GPCn_UNK0
462 ld b32 $r12 D[$r0 + #unk_mmio_list_head]
463 ld b32 $r13 D[$r0 + #unk_mmio_list_tail]
464 ld b32 $r15 D[$r0 + #unk_mask]
465 mov $r14 0x200 // stride = 0x200
469 // wait for strands to finish
475 // if load, or a save without a load following, do some
476 // unknown stuff that's done after finishing a block of
478 bra $p1 #ctx_xfer_post
479 bra not $p2 #ctx_xfer_done
486 // mark completion in HUB's barrier
488 call(hub_barrier_done)