2 * Copyright 2013 Red Hat Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
22 * Authors: Ben Skeggs <bskeggs@redhat.com>
25 #include <subdev/bios.h>
26 #include <subdev/bios/P0260.h>
31 /*******************************************************************************
32 * Graphics object classes
33 ******************************************************************************/
35 static struct nouveau_oclass
36 gm107_graph_sclass[] = {
37 { 0x902d, &nouveau_object_ofuncs },
38 { 0xa140, &nouveau_object_ofuncs },
39 { MAXWELL_A, &nvc0_fermi_ofuncs, nvc0_graph_9097_omthds },
40 { MAXWELL_COMPUTE_A, &nouveau_object_ofuncs, nvc0_graph_90c0_omthds },
44 /*******************************************************************************
45 * PGRAPH register lists
46 ******************************************************************************/
48 static const struct nvc0_graph_init
49 gm107_graph_init_main_0[] = {
50 { 0x400080, 1, 0x04, 0x003003c2 },
51 { 0x400088, 1, 0x04, 0x0001bfe7 },
52 { 0x40008c, 1, 0x04, 0x00060000 },
53 { 0x400090, 1, 0x04, 0x00000030 },
54 { 0x40013c, 1, 0x04, 0x003901f3 },
55 { 0x400140, 1, 0x04, 0x00000100 },
56 { 0x400144, 1, 0x04, 0x00000000 },
57 { 0x400148, 1, 0x04, 0x00000110 },
58 { 0x400138, 1, 0x04, 0x00000000 },
59 { 0x400130, 2, 0x04, 0x00000000 },
60 { 0x400124, 1, 0x04, 0x00000002 },
64 static const struct nvc0_graph_init
65 gm107_graph_init_ds_0[] = {
66 { 0x405844, 1, 0x04, 0x00ffffff },
67 { 0x405850, 1, 0x04, 0x00000000 },
68 { 0x405900, 1, 0x04, 0x00000000 },
69 { 0x405908, 1, 0x04, 0x00000000 },
73 static const struct nvc0_graph_init
74 gm107_graph_init_scc_0[] = {
75 { 0x40803c, 1, 0x04, 0x00000010 },
79 static const struct nvc0_graph_init
80 gm107_graph_init_sked_0[] = {
81 { 0x407010, 1, 0x04, 0x00000000 },
82 { 0x407040, 1, 0x04, 0x40440424 },
83 { 0x407048, 1, 0x04, 0x0000000a },
87 static const struct nvc0_graph_init
88 gm107_graph_init_prop_0[] = {
89 { 0x418408, 1, 0x04, 0x00000000 },
90 { 0x4184a0, 1, 0x04, 0x00000000 },
94 static const struct nvc0_graph_init
95 gm107_graph_init_setup_1[] = {
96 { 0x4188c8, 2, 0x04, 0x00000000 },
97 { 0x4188d0, 1, 0x04, 0x00010000 },
98 { 0x4188d4, 1, 0x04, 0x00010201 },
102 static const struct nvc0_graph_init
103 gm107_graph_init_zcull_0[] = {
104 { 0x418910, 1, 0x04, 0x00010001 },
105 { 0x418914, 1, 0x04, 0x00000301 },
106 { 0x418918, 1, 0x04, 0x00800000 },
107 { 0x418930, 2, 0x04, 0x00000000 },
108 { 0x418980, 1, 0x04, 0x77777770 },
109 { 0x418984, 3, 0x04, 0x77777777 },
113 static const struct nvc0_graph_init
114 gm107_graph_init_gpc_unk_1[] = {
115 { 0x418d00, 1, 0x04, 0x00000000 },
116 { 0x418f00, 1, 0x04, 0x00000400 },
117 { 0x418f08, 1, 0x04, 0x00000000 },
118 { 0x418e08, 1, 0x04, 0x00000000 },
122 static const struct nvc0_graph_init
123 gm107_graph_init_tpccs_0[] = {
124 { 0x419dc4, 1, 0x04, 0x00000000 },
125 { 0x419dc8, 1, 0x04, 0x00000501 },
126 { 0x419dd0, 1, 0x04, 0x00000000 },
127 { 0x419dd4, 1, 0x04, 0x00000100 },
128 { 0x419dd8, 1, 0x04, 0x00000001 },
129 { 0x419ddc, 1, 0x04, 0x00000002 },
130 { 0x419de0, 1, 0x04, 0x00000001 },
131 { 0x419d0c, 1, 0x04, 0x00000000 },
132 { 0x419d10, 1, 0x04, 0x00000014 },
136 static const struct nvc0_graph_init
137 gm107_graph_init_tex_0[] = {
138 { 0x419ab0, 1, 0x04, 0x00000000 },
139 { 0x419ab8, 1, 0x04, 0x000000e7 },
140 { 0x419abc, 1, 0x04, 0x00000000 },
141 { 0x419acc, 1, 0x04, 0x000000ff },
142 { 0x419ac0, 1, 0x04, 0x00000000 },
143 { 0x419aa8, 2, 0x04, 0x00000000 },
144 { 0x419ad0, 2, 0x04, 0x00000000 },
145 { 0x419ae0, 2, 0x04, 0x00000000 },
146 { 0x419af0, 4, 0x04, 0x00000000 },
150 static const struct nvc0_graph_init
151 gm107_graph_init_pe_0[] = {
152 { 0x419900, 1, 0x04, 0x000000ff },
153 { 0x41980c, 1, 0x04, 0x00000010 },
154 { 0x419844, 1, 0x04, 0x00000000 },
155 { 0x419838, 1, 0x04, 0x000000ff },
156 { 0x419850, 1, 0x04, 0x00000004 },
157 { 0x419854, 2, 0x04, 0x00000000 },
158 { 0x419894, 3, 0x04, 0x00100401 },
162 static const struct nvc0_graph_init
163 gm107_graph_init_l1c_0[] = {
164 { 0x419c98, 1, 0x04, 0x00000000 },
165 { 0x419cc0, 2, 0x04, 0x00000000 },
169 static const struct nvc0_graph_init
170 gm107_graph_init_sm_0[] = {
171 { 0x419e30, 1, 0x04, 0x000000ff },
172 { 0x419e00, 1, 0x04, 0x00000000 },
173 { 0x419ea0, 1, 0x04, 0x00000000 },
174 { 0x419ee4, 1, 0x04, 0x00000000 },
175 { 0x419ea4, 1, 0x04, 0x00000100 },
176 { 0x419ea8, 1, 0x04, 0x01000000 },
177 { 0x419ee8, 1, 0x04, 0x00000091 },
178 { 0x419eb4, 1, 0x04, 0x00000000 },
179 { 0x419ebc, 2, 0x04, 0x00000000 },
180 { 0x419edc, 1, 0x04, 0x000c1810 },
181 { 0x419ed8, 1, 0x04, 0x00000000 },
182 { 0x419ee0, 1, 0x04, 0x00000000 },
183 { 0x419f74, 1, 0x04, 0x00005155 },
184 { 0x419f80, 4, 0x04, 0x00000000 },
188 static const struct nvc0_graph_init
189 gm107_graph_init_l1c_1[] = {
190 { 0x419ccc, 2, 0x04, 0x00000000 },
191 { 0x419c80, 1, 0x04, 0x3f006022 },
192 { 0x419c88, 1, 0x04, 0x00000000 },
196 static const struct nvc0_graph_init
197 gm107_graph_init_pes_0[] = {
198 { 0x41be50, 1, 0x04, 0x000000ff },
199 { 0x41be04, 1, 0x04, 0x00000000 },
200 { 0x41be08, 1, 0x04, 0x00000004 },
201 { 0x41be0c, 1, 0x04, 0x00000008 },
202 { 0x41be10, 1, 0x04, 0x0e3b8bc7 },
203 { 0x41be14, 2, 0x04, 0x00000000 },
204 { 0x41be3c, 5, 0x04, 0x00100401 },
208 static const struct nvc0_graph_init
209 gm107_graph_init_wwdx_0[] = {
210 { 0x41bfd4, 1, 0x04, 0x00800000 },
211 { 0x41bfdc, 1, 0x04, 0x00000000 },
215 static const struct nvc0_graph_init
216 gm107_graph_init_cbm_0[] = {
217 { 0x41becc, 1, 0x04, 0x00000000 },
221 static const struct nvc0_graph_init
222 gm107_graph_init_be_0[] = {
223 { 0x408890, 1, 0x04, 0x000000ff },
224 { 0x40880c, 1, 0x04, 0x00000000 },
225 { 0x408850, 1, 0x04, 0x00000004 },
226 { 0x408878, 1, 0x04, 0x00c81603 },
227 { 0x40887c, 1, 0x04, 0x80543432 },
228 { 0x408880, 1, 0x04, 0x0010581e },
229 { 0x408884, 1, 0x04, 0x00001205 },
230 { 0x408974, 1, 0x04, 0x000000ff },
231 { 0x408910, 9, 0x04, 0x00000000 },
232 { 0x408950, 1, 0x04, 0x00000000 },
233 { 0x408954, 1, 0x04, 0x0000ffff },
234 { 0x408958, 1, 0x04, 0x00000034 },
235 { 0x40895c, 1, 0x04, 0x8531a003 },
236 { 0x408960, 1, 0x04, 0x0561985a },
237 { 0x408964, 1, 0x04, 0x04e15c4f },
238 { 0x408968, 1, 0x04, 0x02808833 },
239 { 0x40896c, 1, 0x04, 0x01f02438 },
240 { 0x408970, 1, 0x04, 0x00012c00 },
241 { 0x408984, 1, 0x04, 0x00000000 },
242 { 0x408988, 1, 0x04, 0x08040201 },
243 { 0x40898c, 1, 0x04, 0x80402010 },
247 static const struct nvc0_graph_init
248 gm107_graph_init_sm_1[] = {
249 { 0x419e5c, 1, 0x04, 0x00000000 },
250 { 0x419e58, 1, 0x04, 0x00000000 },
254 static const struct nvc0_graph_pack
255 gm107_graph_pack_mmio[] = {
256 { gm107_graph_init_main_0 },
257 { nvf0_graph_init_fe_0 },
258 { nvc0_graph_init_pri_0 },
259 { nvc0_graph_init_rstr2d_0 },
260 { nvc0_graph_init_pd_0 },
261 { gm107_graph_init_ds_0 },
262 { gm107_graph_init_scc_0 },
263 { gm107_graph_init_sked_0 },
264 { nvf0_graph_init_cwd_0 },
265 { gm107_graph_init_prop_0 },
266 { nv108_graph_init_gpc_unk_0 },
267 { nvc0_graph_init_setup_0 },
268 { nvc0_graph_init_crstr_0 },
269 { gm107_graph_init_setup_1 },
270 { gm107_graph_init_zcull_0 },
271 { nvc0_graph_init_gpm_0 },
272 { gm107_graph_init_gpc_unk_1 },
273 { nvc0_graph_init_gcc_0 },
274 { gm107_graph_init_tpccs_0 },
275 { gm107_graph_init_tex_0 },
276 { gm107_graph_init_pe_0 },
277 { gm107_graph_init_l1c_0 },
278 { nvc0_graph_init_mpc_0 },
279 { gm107_graph_init_sm_0 },
280 { gm107_graph_init_l1c_1 },
281 { gm107_graph_init_pes_0 },
282 { gm107_graph_init_wwdx_0 },
283 { gm107_graph_init_cbm_0 },
284 { gm107_graph_init_be_0 },
285 { gm107_graph_init_sm_1 },
289 /*******************************************************************************
290 * PGRAPH engine/subdev functions
291 ******************************************************************************/
294 gm107_graph_init_bios(struct nvc0_graph_priv *priv)
296 static const struct {
300 { 0x419ed8, 0x419ee0 },
301 { 0x419ad0, 0x419ad4 },
302 { 0x419ae0, 0x419ae4 },
303 { 0x419af0, 0x419af4 },
304 { 0x419af8, 0x419afc },
306 struct nouveau_bios *bios = nouveau_bios(priv);
307 struct nvbios_P0260E infoE;
308 struct nvbios_P0260X infoX;
312 while (nvbios_P0260Ep(bios, ++E, &ver, &hdr, &infoE)) {
313 if (X = -1, E < ARRAY_SIZE(regs)) {
314 nv_wr32(priv, regs[E].ctrl, infoE.data);
315 while (nvbios_P0260Xp(bios, ++X, &ver, &hdr, &infoX))
316 nv_wr32(priv, regs[E].data, infoX.data);
322 gm107_graph_init(struct nouveau_object *object)
324 struct nvc0_graph_oclass *oclass = (void *)object->oclass;
325 struct nvc0_graph_priv *priv = (void *)object;
326 const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, priv->tpc_total);
327 u32 data[TPC_MAX / 8] = {};
329 int gpc, tpc, ppc, rop;
332 ret = nouveau_graph_init(&priv->base);
336 nv_wr32(priv, GPC_BCAST(0x0880), 0x00000000);
337 nv_wr32(priv, GPC_BCAST(0x0890), 0x00000000);
338 nv_wr32(priv, GPC_BCAST(0x0894), 0x00000000);
339 nv_wr32(priv, GPC_BCAST(0x08b4), priv->unk4188b4->addr >> 8);
340 nv_wr32(priv, GPC_BCAST(0x08b8), priv->unk4188b8->addr >> 8);
342 nvc0_graph_mmio(priv, oclass->mmio);
344 gm107_graph_init_bios(priv);
346 nv_wr32(priv, GPC_UNIT(0, 0x3018), 0x00000001);
348 memset(data, 0x00, sizeof(data));
349 memcpy(tpcnr, priv->tpc_nr, sizeof(priv->tpc_nr));
350 for (i = 0, gpc = -1; i < priv->tpc_total; i++) {
352 gpc = (gpc + 1) % priv->gpc_nr;
353 } while (!tpcnr[gpc]);
354 tpc = priv->tpc_nr[gpc] - tpcnr[gpc]--;
356 data[i / 8] |= tpc << ((i % 8) * 4);
359 nv_wr32(priv, GPC_BCAST(0x0980), data[0]);
360 nv_wr32(priv, GPC_BCAST(0x0984), data[1]);
361 nv_wr32(priv, GPC_BCAST(0x0988), data[2]);
362 nv_wr32(priv, GPC_BCAST(0x098c), data[3]);
364 for (gpc = 0; gpc < priv->gpc_nr; gpc++) {
365 nv_wr32(priv, GPC_UNIT(gpc, 0x0914),
366 priv->magic_not_rop_nr << 8 | priv->tpc_nr[gpc]);
367 nv_wr32(priv, GPC_UNIT(gpc, 0x0910), 0x00040000 |
369 nv_wr32(priv, GPC_UNIT(gpc, 0x0918), magicgpc918);
372 nv_wr32(priv, GPC_BCAST(0x3fd4), magicgpc918);
373 nv_wr32(priv, GPC_BCAST(0x08ac), nv_rd32(priv, 0x100800));
375 nv_wr32(priv, 0x400500, 0x00010001);
377 nv_wr32(priv, 0x400100, 0xffffffff);
378 nv_wr32(priv, 0x40013c, 0xffffffff);
379 nv_wr32(priv, 0x400124, 0x00000002);
380 nv_wr32(priv, 0x409c24, 0x000e0000);
382 nv_wr32(priv, 0x404000, 0xc0000000);
383 nv_wr32(priv, 0x404600, 0xc0000000);
384 nv_wr32(priv, 0x408030, 0xc0000000);
385 nv_wr32(priv, 0x404490, 0xc0000000);
386 nv_wr32(priv, 0x406018, 0xc0000000);
387 nv_wr32(priv, 0x407020, 0x40000000);
388 nv_wr32(priv, 0x405840, 0xc0000000);
389 nv_wr32(priv, 0x405844, 0x00ffffff);
390 nv_mask(priv, 0x419cc0, 0x00000008, 0x00000008);
392 for (gpc = 0; gpc < priv->gpc_nr; gpc++) {
393 for (ppc = 0; ppc < 2 /* priv->ppc_nr[gpc] */; ppc++)
394 nv_wr32(priv, PPC_UNIT(gpc, ppc, 0x038), 0xc0000000);
395 nv_wr32(priv, GPC_UNIT(gpc, 0x0420), 0xc0000000);
396 nv_wr32(priv, GPC_UNIT(gpc, 0x0900), 0xc0000000);
397 nv_wr32(priv, GPC_UNIT(gpc, 0x1028), 0xc0000000);
398 nv_wr32(priv, GPC_UNIT(gpc, 0x0824), 0xc0000000);
399 for (tpc = 0; tpc < priv->tpc_nr[gpc]; tpc++) {
400 nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x508), 0xffffffff);
401 nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x50c), 0xffffffff);
402 nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x224), 0xc0000000);
403 nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x48c), 0xc0000000);
404 nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x084), 0xc0000000);
405 nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x430), 0xc0000000);
406 nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x644), 0x00dffffe);
407 nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x64c), 0x00000005);
409 nv_wr32(priv, GPC_UNIT(gpc, 0x2c90), 0xffffffff);
410 nv_wr32(priv, GPC_UNIT(gpc, 0x2c94), 0xffffffff);
413 for (rop = 0; rop < priv->rop_nr; rop++) {
414 nv_wr32(priv, ROP_UNIT(rop, 0x144), 0x40000000);
415 nv_wr32(priv, ROP_UNIT(rop, 0x070), 0x40000000);
416 nv_wr32(priv, ROP_UNIT(rop, 0x204), 0xffffffff);
417 nv_wr32(priv, ROP_UNIT(rop, 0x208), 0xffffffff);
420 nv_wr32(priv, 0x400108, 0xffffffff);
421 nv_wr32(priv, 0x400138, 0xffffffff);
422 nv_wr32(priv, 0x400118, 0xffffffff);
423 nv_wr32(priv, 0x400130, 0xffffffff);
424 nv_wr32(priv, 0x40011c, 0xffffffff);
425 nv_wr32(priv, 0x400134, 0xffffffff);
427 nv_wr32(priv, 0x400054, 0x2c350f63);
429 nvc0_graph_zbc_init(priv);
431 return nvc0_graph_init_ctxctl(priv);
434 #include "fuc/hubgm107.fuc5.h"
436 static struct nvc0_graph_ucode
437 gm107_graph_fecs_ucode = {
438 .code.data = gm107_grhub_code,
439 .code.size = sizeof(gm107_grhub_code),
440 .data.data = gm107_grhub_data,
441 .data.size = sizeof(gm107_grhub_data),
444 #include "fuc/gpcgm107.fuc5.h"
446 static struct nvc0_graph_ucode
447 gm107_graph_gpccs_ucode = {
448 .code.data = gm107_grgpc_code,
449 .code.size = sizeof(gm107_grgpc_code),
450 .data.data = gm107_grgpc_data,
451 .data.size = sizeof(gm107_grgpc_data),
454 struct nouveau_oclass *
455 gm107_graph_oclass = &(struct nvc0_graph_oclass) {
456 .base.handle = NV_ENGINE(GR, 0x07),
457 .base.ofuncs = &(struct nouveau_ofuncs) {
458 .ctor = nvc0_graph_ctor,
459 .dtor = nvc0_graph_dtor,
460 .init = gm107_graph_init,
461 .fini = _nouveau_graph_fini,
463 .cclass = &gm107_grctx_oclass,
464 .sclass = gm107_graph_sclass,
465 .mmio = gm107_graph_pack_mmio,
466 .fecs.ucode = 0 ? &gm107_graph_fecs_ucode : NULL,
467 .gpccs.ucode = &gm107_graph_gpccs_ucode,