2 * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
29 #define to_gk20a_mem(m) container_of(m, struct gk20a_mem, base)
32 gk20a_ram_put(struct nvkm_fb *pfb, struct nvkm_mem **pmem)
34 struct device *dev = nv_device_base(nv_device(pfb));
35 struct gk20a_mem *mem = to_gk20a_mem(*pmem);
38 if (unlikely(mem == NULL))
41 if (likely(mem->cpuaddr))
42 dma_free_coherent(dev, mem->base.size << PAGE_SHIFT,
43 mem->cpuaddr, mem->handle);
45 kfree(mem->base.pages);
50 gk20a_ram_get(struct nvkm_fb *pfb, u64 size, u32 align, u32 ncmin,
51 u32 memtype, struct nvkm_mem **pmem)
53 struct device *dev = nv_device_base(nv_device(pfb));
54 struct gk20a_mem *mem;
55 u32 type = memtype & 0xff;
59 nv_debug(pfb, "%s: size: %llx align: %x, ncmin: %x\n", __func__, size,
62 npages = size >> PAGE_SHIFT;
70 /* round alignment to the next power of 2, if needed */
72 if ((align & (align - 1)) == 0)
76 /* ensure returned address is correctly aligned */
77 npages = max(align, npages);
79 mem = kzalloc(sizeof(*mem), GFP_KERNEL);
83 mem->base.size = npages;
84 mem->base.memtype = type;
86 mem->base.pages = kzalloc(sizeof(dma_addr_t) * npages, GFP_KERNEL);
87 if (!mem->base.pages) {
94 mem->cpuaddr = dma_alloc_coherent(dev, npages << PAGE_SHIFT,
95 &mem->handle, GFP_KERNEL);
97 nv_error(pfb, "%s: cannot allocate memory!\n", __func__);
98 gk20a_ram_put(pfb, pmem);
102 align <<= PAGE_SHIFT;
104 /* alignment check */
105 if (unlikely(mem->handle & (align - 1)))
106 nv_warn(pfb, "memory not aligned as requested: %pad (0x%x)\n",
107 &mem->handle, align);
109 nv_debug(pfb, "alloc size: 0x%x, align: 0x%x, paddr: %pad, vaddr: %p\n",
110 npages << PAGE_SHIFT, align, &mem->handle, mem->cpuaddr);
112 for (i = 0; i < npages; i++)
113 mem->base.pages[i] = mem->handle + (PAGE_SIZE * i);
115 mem->base.offset = (u64)mem->base.pages[0];
120 gk20a_ram_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
121 struct nvkm_oclass *oclass, void *data, u32 datasize,
122 struct nvkm_object **pobject)
124 struct nvkm_ram *ram;
127 ret = nvkm_ram_create(parent, engine, oclass, &ram);
128 *pobject = nv_object(ram);
131 ram->type = NV_MEM_TYPE_STOLEN;
132 ram->size = get_num_physpages() << PAGE_SHIFT;
134 ram->get = gk20a_ram_get;
135 ram->put = gk20a_ram_put;
141 .ofuncs = &(struct nvkm_ofuncs) {
142 .ctor = gk20a_ram_ctor,
143 .dtor = _nvkm_ram_dtor,
144 .init = _nvkm_ram_init,
145 .fini = _nvkm_ram_fini,