2 * linux/drivers/video/omap2/dss/dpi.c
4 * Copyright (C) 2009 Nokia Corporation
5 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
7 * Some code and ideas taken from drivers/video/omap/ driver
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published by
12 * the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 * You should have received a copy of the GNU General Public License along with
20 * this program. If not, see <http://www.gnu.org/licenses/>.
23 #define DSS_SUBSYS_NAME "DPI"
25 #include <linux/kernel.h>
26 #include <linux/delay.h>
27 #include <linux/export.h>
28 #include <linux/err.h>
29 #include <linux/errno.h>
30 #include <linux/platform_device.h>
31 #include <linux/regulator/consumer.h>
32 #include <linux/string.h>
34 #include <linux/clk.h>
35 #include <linux/component.h>
39 #include "dss_features.h"
42 struct platform_device *pdev;
44 struct regulator *vdds_dsi_reg;
45 enum dss_clk_source clk_src;
51 struct dss_lcd_mgr_config mgr_config;
54 struct omap_dss_device output;
56 bool port_initialized;
59 static struct dpi_data *dpi_get_data_from_dssdev(struct omap_dss_device *dssdev)
61 return container_of(dssdev, struct dpi_data, output);
64 /* only used in non-DT mode */
65 static struct dpi_data *dpi_get_data_from_pdev(struct platform_device *pdev)
67 return dev_get_drvdata(&pdev->dev);
70 static enum dss_clk_source dpi_get_clk_src_dra7xx(enum omap_channel channel)
73 * Possible clock sources:
74 * LCD1: FCK/PLL1_1/HDMI_PLL
75 * LCD2: FCK/PLL1_3/HDMI_PLL (DRA74x: PLL2_3)
76 * LCD3: FCK/PLL1_3/HDMI_PLL (DRA74x: PLL2_1)
80 case OMAP_DSS_CHANNEL_LCD:
82 if (dss_pll_find_by_src(DSS_CLK_SRC_PLL1_1))
83 return DSS_CLK_SRC_PLL1_1;
86 case OMAP_DSS_CHANNEL_LCD2:
88 if (dss_pll_find_by_src(DSS_CLK_SRC_PLL1_3))
89 return DSS_CLK_SRC_PLL1_3;
90 if (dss_pll_find_by_src(DSS_CLK_SRC_PLL2_3))
91 return DSS_CLK_SRC_PLL2_3;
94 case OMAP_DSS_CHANNEL_LCD3:
96 if (dss_pll_find_by_src(DSS_CLK_SRC_PLL2_1))
97 return DSS_CLK_SRC_PLL2_1;
98 if (dss_pll_find_by_src(DSS_CLK_SRC_PLL1_3))
99 return DSS_CLK_SRC_PLL1_3;
106 return DSS_CLK_SRC_FCK;
109 static enum dss_clk_source dpi_get_clk_src(enum omap_channel channel)
112 * XXX we can't currently use DSI PLL for DPI with OMAP3, as the DSI PLL
113 * would also be used for DISPC fclk. Meaning, when the DPI output is
114 * disabled, DISPC clock will be disabled, and TV out will stop.
116 switch (omapdss_get_version()) {
117 case OMAPDSS_VER_OMAP24xx:
118 case OMAPDSS_VER_OMAP34xx_ES1:
119 case OMAPDSS_VER_OMAP34xx_ES3:
120 case OMAPDSS_VER_OMAP3630:
121 case OMAPDSS_VER_AM35xx:
122 case OMAPDSS_VER_AM43xx:
123 return DSS_CLK_SRC_FCK;
125 case OMAPDSS_VER_OMAP4430_ES1:
126 case OMAPDSS_VER_OMAP4430_ES2:
127 case OMAPDSS_VER_OMAP4:
129 case OMAP_DSS_CHANNEL_LCD:
130 return DSS_CLK_SRC_PLL1_1;
131 case OMAP_DSS_CHANNEL_LCD2:
132 return DSS_CLK_SRC_PLL2_1;
134 return DSS_CLK_SRC_FCK;
137 case OMAPDSS_VER_OMAP5:
139 case OMAP_DSS_CHANNEL_LCD:
140 return DSS_CLK_SRC_PLL1_1;
141 case OMAP_DSS_CHANNEL_LCD3:
142 return DSS_CLK_SRC_PLL2_1;
143 case OMAP_DSS_CHANNEL_LCD2:
145 return DSS_CLK_SRC_FCK;
148 case OMAPDSS_VER_DRA7xx:
149 return dpi_get_clk_src_dra7xx(channel);
152 return DSS_CLK_SRC_FCK;
156 struct dpi_clk_calc_ctx {
162 unsigned long pck_min, pck_max;
166 struct dss_pll_clock_info pll_cinfo;
168 struct dispc_clock_info dispc_cinfo;
171 static bool dpi_calc_dispc_cb(int lckd, int pckd, unsigned long lck,
172 unsigned long pck, void *data)
174 struct dpi_clk_calc_ctx *ctx = data;
177 * Odd dividers give us uneven duty cycle, causing problem when level
178 * shifted. So skip all odd dividers when the pixel clock is on the
181 if (ctx->pck_min >= 100000000) {
182 if (lckd > 1 && lckd % 2 != 0)
185 if (pckd > 1 && pckd % 2 != 0)
189 ctx->dispc_cinfo.lck_div = lckd;
190 ctx->dispc_cinfo.pck_div = pckd;
191 ctx->dispc_cinfo.lck = lck;
192 ctx->dispc_cinfo.pck = pck;
198 static bool dpi_calc_hsdiv_cb(int m_dispc, unsigned long dispc,
201 struct dpi_clk_calc_ctx *ctx = data;
203 ctx->pll_cinfo.mX[ctx->clkout_idx] = m_dispc;
204 ctx->pll_cinfo.clkout[ctx->clkout_idx] = dispc;
206 return dispc_div_calc(dispc, ctx->pck_min, ctx->pck_max,
207 dpi_calc_dispc_cb, ctx);
211 static bool dpi_calc_pll_cb(int n, int m, unsigned long fint,
212 unsigned long clkdco,
215 struct dpi_clk_calc_ctx *ctx = data;
217 ctx->pll_cinfo.n = n;
218 ctx->pll_cinfo.m = m;
219 ctx->pll_cinfo.fint = fint;
220 ctx->pll_cinfo.clkdco = clkdco;
222 return dss_pll_hsdiv_calc_a(ctx->pll, clkdco,
223 ctx->pck_min, dss_feat_get_param_max(FEAT_PARAM_DSS_FCK),
224 dpi_calc_hsdiv_cb, ctx);
227 static bool dpi_calc_dss_cb(unsigned long fck, void *data)
229 struct dpi_clk_calc_ctx *ctx = data;
233 return dispc_div_calc(fck, ctx->pck_min, ctx->pck_max,
234 dpi_calc_dispc_cb, ctx);
237 static bool dpi_pll_clk_calc(struct dpi_data *dpi, unsigned long pck,
238 struct dpi_clk_calc_ctx *ctx)
242 memset(ctx, 0, sizeof(*ctx));
244 ctx->clkout_idx = dss_pll_get_clkout_idx_for_src(dpi->clk_src);
246 clkin = clk_get_rate(dpi->pll->clkin);
248 if (dpi->pll->hw->type == DSS_PLL_TYPE_A) {
249 unsigned long pll_min, pll_max;
251 ctx->pck_min = pck - 1000;
252 ctx->pck_max = pck + 1000;
257 return dss_pll_calc_a(ctx->pll, clkin,
259 dpi_calc_pll_cb, ctx);
260 } else { /* DSS_PLL_TYPE_B */
261 dss_pll_calc_b(dpi->pll, clkin, pck, &ctx->pll_cinfo);
263 ctx->dispc_cinfo.lck_div = 1;
264 ctx->dispc_cinfo.pck_div = 1;
265 ctx->dispc_cinfo.lck = ctx->pll_cinfo.clkout[0];
266 ctx->dispc_cinfo.pck = ctx->dispc_cinfo.lck;
272 static bool dpi_dss_clk_calc(unsigned long pck, struct dpi_clk_calc_ctx *ctx)
277 * DSS fck gives us very few possibilities, so finding a good pixel
278 * clock may not be possible. We try multiple times to find the clock,
279 * each time widening the pixel clock range we look for, up to
283 for (i = 0; i < 25; ++i) {
286 memset(ctx, 0, sizeof(*ctx));
287 if (pck > 1000 * i * i * i)
288 ctx->pck_min = max(pck - 1000 * i * i * i, 0lu);
291 ctx->pck_max = pck + 1000 * i * i * i;
293 ok = dss_div_calc(pck, ctx->pck_min, dpi_calc_dss_cb, ctx);
303 static int dpi_set_pll_clk(struct dpi_data *dpi, enum omap_channel channel,
304 unsigned long pck_req, unsigned long *fck, int *lck_div,
307 struct dpi_clk_calc_ctx ctx;
311 ok = dpi_pll_clk_calc(dpi, pck_req, &ctx);
315 r = dss_pll_set_config(dpi->pll, &ctx.pll_cinfo);
319 dss_select_lcd_clk_source(channel, dpi->clk_src);
321 dpi->mgr_config.clock_info = ctx.dispc_cinfo;
323 *fck = ctx.pll_cinfo.clkout[ctx.clkout_idx];
324 *lck_div = ctx.dispc_cinfo.lck_div;
325 *pck_div = ctx.dispc_cinfo.pck_div;
330 static int dpi_set_dispc_clk(struct dpi_data *dpi, unsigned long pck_req,
331 unsigned long *fck, int *lck_div, int *pck_div)
333 struct dpi_clk_calc_ctx ctx;
337 ok = dpi_dss_clk_calc(pck_req, &ctx);
341 r = dss_set_fck_rate(ctx.fck);
345 dpi->mgr_config.clock_info = ctx.dispc_cinfo;
348 *lck_div = ctx.dispc_cinfo.lck_div;
349 *pck_div = ctx.dispc_cinfo.pck_div;
354 static int dpi_set_mode(struct dpi_data *dpi)
356 struct omap_dss_device *out = &dpi->output;
357 enum omap_channel channel = out->dispc_channel;
358 struct videomode *vm = &dpi->vm;
359 int lck_div = 0, pck_div = 0;
360 unsigned long fck = 0;
365 r = dpi_set_pll_clk(dpi, channel, vm->pixelclock, &fck,
368 r = dpi_set_dispc_clk(dpi, vm->pixelclock, &fck,
373 pck = fck / lck_div / pck_div;
375 if (pck != vm->pixelclock) {
376 DSSWARN("Could not find exact pixel clock. Requested %lu Hz, got %lu Hz\n",
377 vm->pixelclock, pck);
379 vm->pixelclock = pck;
382 dss_mgr_set_timings(channel, vm);
387 static void dpi_config_lcd_manager(struct dpi_data *dpi)
389 struct omap_dss_device *out = &dpi->output;
390 enum omap_channel channel = out->dispc_channel;
392 dpi->mgr_config.io_pad_mode = DSS_IO_PAD_MODE_BYPASS;
394 dpi->mgr_config.stallmode = false;
395 dpi->mgr_config.fifohandcheck = false;
397 dpi->mgr_config.video_port_width = dpi->data_lines;
399 dpi->mgr_config.lcden_sig_polarity = 0;
401 dss_mgr_set_lcd_config(channel, &dpi->mgr_config);
404 static int dpi_display_enable(struct omap_dss_device *dssdev)
406 struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
407 struct omap_dss_device *out = &dpi->output;
408 enum omap_channel channel = out->dispc_channel;
411 mutex_lock(&dpi->lock);
413 if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI) && !dpi->vdds_dsi_reg) {
414 DSSERR("no VDSS_DSI regulator\n");
419 if (!out->dispc_channel_connected) {
420 DSSERR("failed to enable display: no output/manager\n");
425 if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI)) {
426 r = regulator_enable(dpi->vdds_dsi_reg);
431 r = dispc_runtime_get();
435 r = dss_dpi_select_source(out->port_num, channel);
440 r = dss_pll_enable(dpi->pll);
445 r = dpi_set_mode(dpi);
449 dpi_config_lcd_manager(dpi);
453 r = dss_mgr_enable(channel);
457 mutex_unlock(&dpi->lock);
464 dss_pll_disable(dpi->pll);
469 if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI))
470 regulator_disable(dpi->vdds_dsi_reg);
474 mutex_unlock(&dpi->lock);
478 static void dpi_display_disable(struct omap_dss_device *dssdev)
480 struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
481 enum omap_channel channel = dpi->output.dispc_channel;
483 mutex_lock(&dpi->lock);
485 dss_mgr_disable(channel);
488 dss_select_lcd_clk_source(channel, DSS_CLK_SRC_FCK);
489 dss_pll_disable(dpi->pll);
494 if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI))
495 regulator_disable(dpi->vdds_dsi_reg);
497 mutex_unlock(&dpi->lock);
500 static void dpi_set_timings(struct omap_dss_device *dssdev,
501 struct videomode *vm)
503 struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
505 DSSDBG("dpi_set_timings\n");
507 mutex_lock(&dpi->lock);
511 mutex_unlock(&dpi->lock);
514 static void dpi_get_timings(struct omap_dss_device *dssdev,
515 struct videomode *vm)
517 struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
519 mutex_lock(&dpi->lock);
523 mutex_unlock(&dpi->lock);
526 static int dpi_check_timings(struct omap_dss_device *dssdev,
527 struct videomode *vm)
529 struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
530 enum omap_channel channel = dpi->output.dispc_channel;
531 int lck_div, pck_div;
534 struct dpi_clk_calc_ctx ctx;
537 if (vm->hactive % 8 != 0)
540 if (!dispc_mgr_timings_ok(channel, vm))
543 if (vm->pixelclock == 0)
547 ok = dpi_pll_clk_calc(dpi, vm->pixelclock, &ctx);
551 fck = ctx.pll_cinfo.clkout[ctx.clkout_idx];
553 ok = dpi_dss_clk_calc(vm->pixelclock, &ctx);
560 lck_div = ctx.dispc_cinfo.lck_div;
561 pck_div = ctx.dispc_cinfo.pck_div;
563 pck = fck / lck_div / pck_div;
565 vm->pixelclock = pck;
570 static void dpi_set_data_lines(struct omap_dss_device *dssdev, int data_lines)
572 struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
574 mutex_lock(&dpi->lock);
576 dpi->data_lines = data_lines;
578 mutex_unlock(&dpi->lock);
581 static int dpi_verify_pll(struct dss_pll *pll)
585 /* do initial setup with the PLL to see if it is operational */
587 r = dss_pll_enable(pll);
591 dss_pll_disable(pll);
596 static int dpi_init_regulator(struct dpi_data *dpi)
598 struct regulator *vdds_dsi;
600 if (!dss_has_feature(FEAT_DPI_USES_VDDS_DSI))
603 if (dpi->vdds_dsi_reg)
606 vdds_dsi = devm_regulator_get(&dpi->pdev->dev, "vdds_dsi");
607 if (IS_ERR(vdds_dsi)) {
608 if (PTR_ERR(vdds_dsi) != -EPROBE_DEFER)
609 DSSERR("can't get VDDS_DSI regulator\n");
610 return PTR_ERR(vdds_dsi);
613 dpi->vdds_dsi_reg = vdds_dsi;
618 static void dpi_init_pll(struct dpi_data *dpi)
625 dpi->clk_src = dpi_get_clk_src(dpi->output.dispc_channel);
627 pll = dss_pll_find_by_src(dpi->clk_src);
631 if (dpi_verify_pll(pll)) {
632 DSSWARN("PLL not operational\n");
640 * Return a hardcoded channel for the DPI output. This should work for
641 * current use cases, but this can be later expanded to either resolve
642 * the channel in some more dynamic manner, or get the channel as a user
645 static enum omap_channel dpi_get_channel(int port_num)
647 switch (omapdss_get_version()) {
648 case OMAPDSS_VER_OMAP24xx:
649 case OMAPDSS_VER_OMAP34xx_ES1:
650 case OMAPDSS_VER_OMAP34xx_ES3:
651 case OMAPDSS_VER_OMAP3630:
652 case OMAPDSS_VER_AM35xx:
653 case OMAPDSS_VER_AM43xx:
654 return OMAP_DSS_CHANNEL_LCD;
656 case OMAPDSS_VER_DRA7xx:
659 return OMAP_DSS_CHANNEL_LCD3;
661 return OMAP_DSS_CHANNEL_LCD2;
664 return OMAP_DSS_CHANNEL_LCD;
667 case OMAPDSS_VER_OMAP4430_ES1:
668 case OMAPDSS_VER_OMAP4430_ES2:
669 case OMAPDSS_VER_OMAP4:
670 return OMAP_DSS_CHANNEL_LCD2;
672 case OMAPDSS_VER_OMAP5:
673 return OMAP_DSS_CHANNEL_LCD3;
676 DSSWARN("unsupported DSS version\n");
677 return OMAP_DSS_CHANNEL_LCD;
681 static int dpi_connect(struct omap_dss_device *dssdev,
682 struct omap_dss_device *dst)
684 struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
685 enum omap_channel channel = dpi->output.dispc_channel;
688 r = dpi_init_regulator(dpi);
694 r = dss_mgr_connect(channel, dssdev);
698 r = omapdss_output_set_device(dssdev, dst);
700 DSSERR("failed to connect output to new device: %s\n",
702 dss_mgr_disconnect(channel, dssdev);
709 static void dpi_disconnect(struct omap_dss_device *dssdev,
710 struct omap_dss_device *dst)
712 struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
713 enum omap_channel channel = dpi->output.dispc_channel;
715 WARN_ON(dst != dssdev->dst);
717 if (dst != dssdev->dst)
720 omapdss_output_unset_device(dssdev);
722 dss_mgr_disconnect(channel, dssdev);
725 static const struct omapdss_dpi_ops dpi_ops = {
726 .connect = dpi_connect,
727 .disconnect = dpi_disconnect,
729 .enable = dpi_display_enable,
730 .disable = dpi_display_disable,
732 .check_timings = dpi_check_timings,
733 .set_timings = dpi_set_timings,
734 .get_timings = dpi_get_timings,
736 .set_data_lines = dpi_set_data_lines,
739 static void dpi_init_output(struct platform_device *pdev)
741 struct dpi_data *dpi = dpi_get_data_from_pdev(pdev);
742 struct omap_dss_device *out = &dpi->output;
744 out->dev = &pdev->dev;
745 out->id = OMAP_DSS_OUTPUT_DPI;
746 out->output_type = OMAP_DISPLAY_TYPE_DPI;
748 out->dispc_channel = dpi_get_channel(0);
749 out->ops.dpi = &dpi_ops;
750 out->owner = THIS_MODULE;
752 omapdss_register_output(out);
755 static void dpi_uninit_output(struct platform_device *pdev)
757 struct dpi_data *dpi = dpi_get_data_from_pdev(pdev);
758 struct omap_dss_device *out = &dpi->output;
760 omapdss_unregister_output(out);
763 static void dpi_init_output_port(struct platform_device *pdev,
764 struct device_node *port)
766 struct dpi_data *dpi = port->data;
767 struct omap_dss_device *out = &dpi->output;
771 r = of_property_read_u32(port, "reg", &port_num);
788 out->dev = &pdev->dev;
789 out->id = OMAP_DSS_OUTPUT_DPI;
790 out->output_type = OMAP_DISPLAY_TYPE_DPI;
791 out->dispc_channel = dpi_get_channel(port_num);
792 out->port_num = port_num;
793 out->ops.dpi = &dpi_ops;
794 out->owner = THIS_MODULE;
796 omapdss_register_output(out);
799 static void dpi_uninit_output_port(struct device_node *port)
801 struct dpi_data *dpi = port->data;
802 struct omap_dss_device *out = &dpi->output;
804 omapdss_unregister_output(out);
807 static int dpi_bind(struct device *dev, struct device *master, void *data)
809 struct platform_device *pdev = to_platform_device(dev);
810 struct dpi_data *dpi;
812 dpi = devm_kzalloc(&pdev->dev, sizeof(*dpi), GFP_KERNEL);
818 dev_set_drvdata(&pdev->dev, dpi);
820 mutex_init(&dpi->lock);
822 dpi_init_output(pdev);
827 static void dpi_unbind(struct device *dev, struct device *master, void *data)
829 struct platform_device *pdev = to_platform_device(dev);
831 dpi_uninit_output(pdev);
834 static const struct component_ops dpi_component_ops = {
836 .unbind = dpi_unbind,
839 static int dpi_probe(struct platform_device *pdev)
841 return component_add(&pdev->dev, &dpi_component_ops);
844 static int dpi_remove(struct platform_device *pdev)
846 component_del(&pdev->dev, &dpi_component_ops);
850 static struct platform_driver omap_dpi_driver = {
852 .remove = dpi_remove,
854 .name = "omapdss_dpi",
855 .suppress_bind_attrs = true,
859 int __init dpi_init_platform_driver(void)
861 return platform_driver_register(&omap_dpi_driver);
864 void dpi_uninit_platform_driver(void)
866 platform_driver_unregister(&omap_dpi_driver);
869 int dpi_init_port(struct platform_device *pdev, struct device_node *port)
871 struct dpi_data *dpi;
872 struct device_node *ep;
876 dpi = devm_kzalloc(&pdev->dev, sizeof(*dpi), GFP_KERNEL);
880 ep = omapdss_of_get_next_endpoint(port, NULL);
884 r = of_property_read_u32(ep, "data-lines", &datalines);
886 DSSERR("failed to parse datalines\n");
890 dpi->data_lines = datalines;
897 mutex_init(&dpi->lock);
899 dpi_init_output_port(pdev, port);
901 dpi->port_initialized = true;
911 void dpi_uninit_port(struct device_node *port)
913 struct dpi_data *dpi = port->data;
915 if (!dpi->port_initialized)
918 dpi_uninit_output_port(port);