2 * drivers/gpu/drm/omapdrm/omap_crtc.c
4 * Copyright (C) 2011 Texas Instruments
5 * Author: Rob Clark <rob@ti.com>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
20 #include <linux/completion.h>
22 #include <drm/drm_crtc.h>
23 #include <drm/drm_crtc_helper.h>
24 #include <drm/drm_mode.h>
25 #include <drm/drm_plane_helper.h>
29 #define to_omap_crtc(x) container_of(x, struct omap_crtc, base)
31 enum omap_page_flip_state {
34 OMAP_PAGE_FLIP_QUEUED,
35 OMAP_PAGE_FLIP_CANCELLED,
43 enum omap_channel channel;
44 struct omap_overlay_manager_info info;
45 struct drm_encoder *current_encoder;
48 * Temporary: eventually this will go away, but it is needed
49 * for now to keep the output's happy. (They only need
50 * mgr->id.) Eventually this will be replaced w/ something
51 * more common-panel-framework-y
53 struct omap_overlay_manager *mgr;
55 struct omap_video_timings timings;
58 struct omap_drm_irq vblank_irq;
59 struct omap_drm_irq error_irq;
61 /* list of framebuffers to unpin */
62 struct list_head pending_unpins;
65 * flip_state flag indicates the current page flap state: IDLE if no
66 * page queue has been submitted, WAIT when waiting for GEM async
67 * completion, QUEUED when the page flip has been queued to the hardware
68 * or CANCELLED when the CRTC is turned off before the flip gets queued
69 * to the hardware. The flip event, if any, is stored in flip_event, and
70 * the framebuffer queued for page flip is stored in flip_fb. The
71 * flip_wait wait queue is used to wait for page flip completion.
73 * The flip_work work queue handles page flip requests without caring
74 * about what context the GEM async callback is called from. Possibly we
75 * should just make omap_gem always call the cb from the worker so we
76 * don't have to care about this.
78 enum omap_page_flip_state flip_state;
79 struct drm_pending_vblank_event *flip_event;
80 struct drm_framebuffer *flip_fb;
81 wait_queue_head_t flip_wait;
82 struct work_struct flip_work;
84 struct completion completion;
86 bool ignore_digit_sync_lost;
89 struct omap_framebuffer_unpin {
90 struct list_head list;
91 struct drm_framebuffer *fb;
94 /* -----------------------------------------------------------------------------
98 uint32_t pipe2vbl(struct drm_crtc *crtc)
100 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
102 return dispc_mgr_get_vsync_irq(omap_crtc->channel);
105 const struct omap_video_timings *omap_crtc_timings(struct drm_crtc *crtc)
107 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
108 return &omap_crtc->timings;
111 enum omap_channel omap_crtc_channel(struct drm_crtc *crtc)
113 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
114 return omap_crtc->channel;
117 /* -----------------------------------------------------------------------------
118 * DSS Manager Functions
122 * Manager-ops, callbacks from output when they need to configure
123 * the upstream part of the video pipe.
125 * Most of these we can ignore until we add support for command-mode
126 * panels.. for video-mode the crtc-helpers already do an adequate
127 * job of sequencing the setup of the video pipe in the proper order
130 /* ovl-mgr-id -> crtc */
131 static struct omap_crtc *omap_crtcs[8];
133 /* we can probably ignore these until we support command-mode panels: */
134 static int omap_crtc_connect(struct omap_overlay_manager *mgr,
135 struct omap_dss_device *dst)
140 if ((mgr->supported_outputs & dst->id) == 0)
149 static void omap_crtc_disconnect(struct omap_overlay_manager *mgr,
150 struct omap_dss_device *dst)
152 mgr->output->manager = NULL;
156 static void omap_crtc_start_update(struct omap_overlay_manager *mgr)
160 /* Called only from omap_crtc_setup and suspend/resume handlers. */
161 static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable)
163 struct drm_device *dev = crtc->dev;
164 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
165 enum omap_channel channel = omap_crtc->channel;
166 struct omap_irq_wait *wait;
167 u32 framedone_irq, vsync_irq;
170 if (dispc_mgr_is_enabled(channel) == enable)
173 if (omap_crtc->channel == OMAP_DSS_CHANNEL_DIGIT) {
175 * Digit output produces some sync lost interrupts during the
176 * first frame when enabling, so we need to ignore those.
178 omap_crtc->ignore_digit_sync_lost = true;
181 framedone_irq = dispc_mgr_get_framedone_irq(channel);
182 vsync_irq = dispc_mgr_get_vsync_irq(channel);
185 wait = omap_irq_wait_init(dev, vsync_irq, 1);
188 * When we disable the digit output, we need to wait for
189 * FRAMEDONE to know that DISPC has finished with the output.
191 * OMAP2/3 does not have FRAMEDONE irq for digit output, and in
192 * that case we need to use vsync interrupt, and wait for both
193 * even and odd frames.
197 wait = omap_irq_wait_init(dev, framedone_irq, 1);
199 wait = omap_irq_wait_init(dev, vsync_irq, 2);
202 dispc_mgr_enable(channel, enable);
204 ret = omap_irq_wait(dev, wait, msecs_to_jiffies(100));
206 dev_err(dev->dev, "%s: timeout waiting for %s\n",
207 omap_crtc->name, enable ? "enable" : "disable");
210 if (omap_crtc->channel == OMAP_DSS_CHANNEL_DIGIT) {
211 omap_crtc->ignore_digit_sync_lost = false;
212 /* make sure the irq handler sees the value above */
218 static int omap_crtc_enable(struct omap_overlay_manager *mgr)
220 struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];
222 dispc_mgr_setup(omap_crtc->channel, &omap_crtc->info);
223 dispc_mgr_set_timings(omap_crtc->channel,
224 &omap_crtc->timings);
225 omap_crtc_set_enabled(&omap_crtc->base, true);
230 static void omap_crtc_disable(struct omap_overlay_manager *mgr)
232 struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];
234 omap_crtc_set_enabled(&omap_crtc->base, false);
237 static void omap_crtc_set_timings(struct omap_overlay_manager *mgr,
238 const struct omap_video_timings *timings)
240 struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];
241 DBG("%s", omap_crtc->name);
242 omap_crtc->timings = *timings;
245 static void omap_crtc_set_lcd_config(struct omap_overlay_manager *mgr,
246 const struct dss_lcd_mgr_config *config)
248 struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];
249 DBG("%s", omap_crtc->name);
250 dispc_mgr_set_lcd_config(omap_crtc->channel, config);
253 static int omap_crtc_register_framedone_handler(
254 struct omap_overlay_manager *mgr,
255 void (*handler)(void *), void *data)
260 static void omap_crtc_unregister_framedone_handler(
261 struct omap_overlay_manager *mgr,
262 void (*handler)(void *), void *data)
266 static const struct dss_mgr_ops mgr_ops = {
267 .connect = omap_crtc_connect,
268 .disconnect = omap_crtc_disconnect,
269 .start_update = omap_crtc_start_update,
270 .enable = omap_crtc_enable,
271 .disable = omap_crtc_disable,
272 .set_timings = omap_crtc_set_timings,
273 .set_lcd_config = omap_crtc_set_lcd_config,
274 .register_framedone_handler = omap_crtc_register_framedone_handler,
275 .unregister_framedone_handler = omap_crtc_unregister_framedone_handler,
278 /* -----------------------------------------------------------------------------
279 * Setup, Flush and Page Flip
282 void omap_crtc_cancel_page_flip(struct drm_crtc *crtc, struct drm_file *file)
284 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
285 struct drm_device *dev = crtc->dev;
288 spin_lock_irqsave(&dev->event_lock, flags);
290 /* Only complete events queued for our file handle. */
291 if (omap_crtc->flip_event &&
292 file == omap_crtc->flip_event->base.file_priv) {
293 drm_send_vblank_event(dev, omap_crtc->pipe,
294 omap_crtc->flip_event);
295 omap_crtc->flip_event = NULL;
298 spin_unlock_irqrestore(&dev->event_lock, flags);
301 /* Must be called with dev->event_lock locked. */
302 static void omap_crtc_complete_page_flip(struct drm_crtc *crtc,
303 enum omap_page_flip_state state)
305 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
306 struct drm_device *dev = crtc->dev;
308 if (omap_crtc->flip_event) {
309 drm_send_vblank_event(dev, omap_crtc->pipe,
310 omap_crtc->flip_event);
311 omap_crtc->flip_event = NULL;
314 omap_crtc->flip_state = state;
316 if (state == OMAP_PAGE_FLIP_IDLE)
317 wake_up(&omap_crtc->flip_wait);
320 static bool omap_crtc_page_flip_pending(struct drm_crtc *crtc)
322 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
323 struct drm_device *dev = crtc->dev;
327 spin_lock_irqsave(&dev->event_lock, flags);
328 pending = omap_crtc->flip_state != OMAP_PAGE_FLIP_IDLE;
329 spin_unlock_irqrestore(&dev->event_lock, flags);
334 static void omap_crtc_wait_page_flip(struct drm_crtc *crtc)
336 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
337 struct drm_device *dev = crtc->dev;
338 bool cancelled = false;
342 * If we're still waiting for the GEM async operation to complete just
343 * cancel the page flip, as we're holding the CRTC mutex preventing the
344 * page flip work handler from queueing the page flip.
346 * We can't release the reference to the frame buffer here as the async
347 * operation doesn't keep its own reference to the buffer. We'll just
348 * let the page flip work queue handle that.
350 spin_lock_irqsave(&dev->event_lock, flags);
351 if (omap_crtc->flip_state == OMAP_PAGE_FLIP_WAIT) {
352 omap_crtc_complete_page_flip(crtc, OMAP_PAGE_FLIP_CANCELLED);
355 spin_unlock_irqrestore(&dev->event_lock, flags);
360 if (wait_event_timeout(omap_crtc->flip_wait,
361 !omap_crtc_page_flip_pending(crtc),
362 msecs_to_jiffies(50)))
365 dev_warn(crtc->dev->dev, "page flip timeout!\n");
367 spin_lock_irqsave(&dev->event_lock, flags);
368 omap_crtc_complete_page_flip(crtc, OMAP_PAGE_FLIP_IDLE);
369 spin_unlock_irqrestore(&dev->event_lock, flags);
372 static void omap_crtc_error_irq(struct omap_drm_irq *irq, uint32_t irqstatus)
374 struct omap_crtc *omap_crtc =
375 container_of(irq, struct omap_crtc, error_irq);
377 if (omap_crtc->ignore_digit_sync_lost) {
378 irqstatus &= ~DISPC_IRQ_SYNC_LOST_DIGIT;
383 DRM_ERROR_RATELIMITED("%s: errors: %08x\n", omap_crtc->name, irqstatus);
386 static void omap_crtc_vblank_irq(struct omap_drm_irq *irq, uint32_t irqstatus)
388 struct omap_crtc *omap_crtc =
389 container_of(irq, struct omap_crtc, vblank_irq);
390 struct drm_device *dev = omap_crtc->base.dev;
393 if (dispc_mgr_go_busy(omap_crtc->channel))
396 DBG("%s: apply done", omap_crtc->name);
397 __omap_irq_unregister(dev, &omap_crtc->vblank_irq);
399 /* wakeup userspace */
400 spin_lock_irqsave(&dev->event_lock, flags);
401 omap_crtc_complete_page_flip(&omap_crtc->base, OMAP_PAGE_FLIP_IDLE);
402 spin_unlock_irqrestore(&dev->event_lock, flags);
404 complete(&omap_crtc->completion);
407 int omap_crtc_flush(struct drm_crtc *crtc)
409 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
410 struct omap_framebuffer_unpin *fb, *next;
412 DBG("%s: GO", omap_crtc->name);
414 WARN_ON(!drm_modeset_is_locked(&crtc->mutex));
415 WARN_ON(omap_crtc->vblank_irq.registered);
419 if (dispc_mgr_is_enabled(omap_crtc->channel)) {
420 dispc_mgr_go(omap_crtc->channel);
421 omap_irq_register(crtc->dev, &omap_crtc->vblank_irq);
423 WARN_ON(!wait_for_completion_timeout(&omap_crtc->completion,
424 msecs_to_jiffies(100)));
425 reinit_completion(&omap_crtc->completion);
430 /* Unpin and unreference pending framebuffers. */
431 list_for_each_entry_safe(fb, next, &omap_crtc->pending_unpins, list) {
432 omap_framebuffer_unpin(fb->fb);
433 drm_framebuffer_unreference(fb->fb);
441 int omap_crtc_queue_unpin(struct drm_crtc *crtc, struct drm_framebuffer *fb)
443 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
444 struct omap_framebuffer_unpin *unpin;
446 unpin = kzalloc(sizeof(*unpin), GFP_KERNEL);
451 list_add_tail(&unpin->list, &omap_crtc->pending_unpins);
456 static void omap_crtc_setup(struct drm_crtc *crtc)
458 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
459 struct omap_drm_private *priv = crtc->dev->dev_private;
460 struct drm_encoder *encoder = NULL;
463 DBG("%s: enabled=%d", omap_crtc->name, omap_crtc->enabled);
467 for (i = 0; i < priv->num_encoders; i++) {
468 if (priv->encoders[i]->crtc == crtc) {
469 encoder = priv->encoders[i];
474 if (omap_crtc->current_encoder && encoder != omap_crtc->current_encoder)
475 omap_encoder_set_enabled(omap_crtc->current_encoder, false);
477 omap_crtc->current_encoder = encoder;
479 if (!omap_crtc->enabled) {
481 omap_encoder_set_enabled(encoder, false);
484 omap_encoder_set_enabled(encoder, false);
485 omap_encoder_update(encoder, omap_crtc->mgr,
486 &omap_crtc->timings);
487 omap_encoder_set_enabled(encoder, true);
494 /* -----------------------------------------------------------------------------
498 static void omap_crtc_destroy(struct drm_crtc *crtc)
500 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
502 DBG("%s", omap_crtc->name);
504 WARN_ON(omap_crtc->vblank_irq.registered);
505 omap_irq_unregister(crtc->dev, &omap_crtc->error_irq);
507 drm_crtc_cleanup(crtc);
512 static void omap_crtc_dpms(struct drm_crtc *crtc, int mode)
514 struct omap_drm_private *priv = crtc->dev->dev_private;
515 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
516 bool enable = (mode == DRM_MODE_DPMS_ON);
519 DBG("%s: %d", omap_crtc->name, mode);
521 if (enable == omap_crtc->enabled)
525 omap_crtc_wait_page_flip(crtc);
527 drm_crtc_vblank_off(crtc);
531 /* Enable/disable all planes associated with the CRTC. */
532 for (i = 0; i < priv->num_planes; i++) {
533 struct drm_plane *plane = priv->planes[i];
535 if (plane->crtc == crtc)
536 WARN_ON(omap_plane_set_enable(plane, enable));
539 omap_crtc->enabled = enable;
541 omap_crtc_setup(crtc);
542 omap_crtc_flush(crtc);
546 drm_crtc_vblank_on(crtc);
551 static bool omap_crtc_mode_fixup(struct drm_crtc *crtc,
552 const struct drm_display_mode *mode,
553 struct drm_display_mode *adjusted_mode)
558 static int omap_crtc_mode_set(struct drm_crtc *crtc,
559 struct drm_display_mode *mode,
560 struct drm_display_mode *adjusted_mode,
562 struct drm_framebuffer *old_fb)
564 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
566 mode = adjusted_mode;
568 DBG("%s: set mode: %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
569 omap_crtc->name, mode->base.id, mode->name,
570 mode->vrefresh, mode->clock,
571 mode->hdisplay, mode->hsync_start,
572 mode->hsync_end, mode->htotal,
573 mode->vdisplay, mode->vsync_start,
574 mode->vsync_end, mode->vtotal,
575 mode->type, mode->flags);
577 copy_timings_drm_to_omap(&omap_crtc->timings, mode);
580 * The primary plane CRTC can be reset if the plane is disabled directly
581 * through the universal plane API. Set it again here.
583 crtc->primary->crtc = crtc;
585 return omap_plane_mode_set(crtc->primary, crtc, crtc->primary->fb,
586 0, 0, mode->hdisplay, mode->vdisplay,
587 x, y, mode->hdisplay, mode->vdisplay);
590 static void omap_crtc_prepare(struct drm_crtc *crtc)
592 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
593 DBG("%s", omap_crtc->name);
594 omap_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
597 static void omap_crtc_commit(struct drm_crtc *crtc)
599 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
600 DBG("%s", omap_crtc->name);
601 omap_crtc_dpms(crtc, DRM_MODE_DPMS_ON);
604 static int omap_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
605 struct drm_framebuffer *old_fb)
607 struct drm_plane *plane = crtc->primary;
608 struct drm_display_mode *mode = &crtc->mode;
611 ret = omap_plane_mode_set(plane, crtc, crtc->primary->fb,
612 0, 0, mode->hdisplay, mode->vdisplay,
613 x, y, mode->hdisplay, mode->vdisplay);
617 return omap_crtc_flush(crtc);
620 static void page_flip_worker(struct work_struct *work)
622 struct omap_crtc *omap_crtc =
623 container_of(work, struct omap_crtc, flip_work);
624 struct drm_crtc *crtc = &omap_crtc->base;
625 struct drm_display_mode *mode = &crtc->mode;
626 struct drm_device *dev = crtc->dev;
627 struct drm_framebuffer *fb;
628 struct drm_gem_object *bo;
632 drm_modeset_lock(&crtc->mutex, NULL);
634 spin_lock_irqsave(&dev->event_lock, flags);
637 * The page flip could have been cancelled while waiting for the GEM
638 * async operation to complete. Don't queue the flip in that case.
640 if (omap_crtc->flip_state == OMAP_PAGE_FLIP_WAIT) {
641 omap_crtc->flip_state = OMAP_PAGE_FLIP_QUEUED;
644 omap_crtc->flip_state = OMAP_PAGE_FLIP_IDLE;
648 fb = omap_crtc->flip_fb;
649 omap_crtc->flip_fb = NULL;
651 spin_unlock_irqrestore(&dev->event_lock, flags);
654 omap_plane_mode_set(crtc->primary, crtc, fb,
655 0, 0, mode->hdisplay, mode->vdisplay,
656 crtc->x, crtc->y, mode->hdisplay,
658 omap_crtc_flush(crtc);
661 drm_modeset_unlock(&crtc->mutex);
663 bo = omap_framebuffer_bo(fb, 0);
664 drm_gem_object_unreference_unlocked(bo);
665 drm_framebuffer_unreference(fb);
668 static void page_flip_cb(void *arg)
670 struct drm_crtc *crtc = arg;
671 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
672 struct omap_drm_private *priv = crtc->dev->dev_private;
674 /* avoid assumptions about what ctxt we are called from: */
675 queue_work(priv->wq, &omap_crtc->flip_work);
678 static int omap_crtc_page_flip(struct drm_crtc *crtc,
679 struct drm_framebuffer *fb,
680 struct drm_pending_vblank_event *event,
681 uint32_t page_flip_flags)
683 struct drm_device *dev = crtc->dev;
684 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
685 struct drm_plane *primary = crtc->primary;
686 struct drm_gem_object *bo;
689 DBG("%d -> %d (event=%p)", primary->fb ? primary->fb->base.id : -1,
692 spin_lock_irqsave(&dev->event_lock, flags);
694 if (omap_crtc->flip_state != OMAP_PAGE_FLIP_IDLE) {
695 spin_unlock_irqrestore(&dev->event_lock, flags);
696 dev_err(dev->dev, "already a pending flip\n");
701 * Store a reference to the framebuffer queued for page flip in the CRTC
702 * private structure. We can't rely on crtc->primary->fb in the page
703 * flip worker, as a racing CRTC disable (due for instance to an
704 * explicit framebuffer deletion from userspace) would set that field to
705 * NULL before the worker gets a change to run.
707 drm_framebuffer_reference(fb);
708 omap_crtc->flip_fb = fb;
709 omap_crtc->flip_event = event;
710 omap_crtc->flip_state = OMAP_PAGE_FLIP_WAIT;
714 spin_unlock_irqrestore(&dev->event_lock, flags);
717 * Hold a reference temporarily until the crtc is updated
718 * and takes the reference to the bo. This avoids it
719 * getting freed from under us:
721 bo = omap_framebuffer_bo(fb, 0);
722 drm_gem_object_reference(bo);
724 omap_gem_op_async(bo, OMAP_GEM_READ, page_flip_cb, crtc);
729 static int omap_crtc_set_property(struct drm_crtc *crtc,
730 struct drm_property *property, uint64_t val)
732 if (property == crtc->dev->mode_config.rotation_property) {
733 crtc->invert_dimensions =
734 !!(val & ((1LL << DRM_ROTATE_90) | (1LL << DRM_ROTATE_270)));
737 return omap_plane_set_property(crtc->primary, property, val);
740 static const struct drm_crtc_funcs omap_crtc_funcs = {
741 .set_config = drm_crtc_helper_set_config,
742 .destroy = omap_crtc_destroy,
743 .page_flip = omap_crtc_page_flip,
744 .set_property = omap_crtc_set_property,
747 static const struct drm_crtc_helper_funcs omap_crtc_helper_funcs = {
748 .dpms = omap_crtc_dpms,
749 .mode_fixup = omap_crtc_mode_fixup,
750 .mode_set = omap_crtc_mode_set,
751 .prepare = omap_crtc_prepare,
752 .commit = omap_crtc_commit,
753 .mode_set_base = omap_crtc_mode_set_base,
756 /* -----------------------------------------------------------------------------
760 static const char *channel_names[] = {
761 [OMAP_DSS_CHANNEL_LCD] = "lcd",
762 [OMAP_DSS_CHANNEL_DIGIT] = "tv",
763 [OMAP_DSS_CHANNEL_LCD2] = "lcd2",
764 [OMAP_DSS_CHANNEL_LCD3] = "lcd3",
767 void omap_crtc_pre_init(void)
769 dss_install_mgr_ops(&mgr_ops);
772 void omap_crtc_pre_uninit(void)
774 dss_uninstall_mgr_ops();
777 /* initialize crtc */
778 struct drm_crtc *omap_crtc_init(struct drm_device *dev,
779 struct drm_plane *plane, enum omap_channel channel, int id)
781 struct drm_crtc *crtc = NULL;
782 struct omap_crtc *omap_crtc;
783 struct omap_overlay_manager_info *info;
786 DBG("%s", channel_names[channel]);
788 omap_crtc = kzalloc(sizeof(*omap_crtc), GFP_KERNEL);
792 crtc = &omap_crtc->base;
794 INIT_WORK(&omap_crtc->flip_work, page_flip_worker);
795 init_waitqueue_head(&omap_crtc->flip_wait);
797 INIT_LIST_HEAD(&omap_crtc->pending_unpins);
799 init_completion(&omap_crtc->completion);
801 omap_crtc->channel = channel;
802 omap_crtc->name = channel_names[channel];
803 omap_crtc->pipe = id;
805 omap_crtc->vblank_irq.irqmask = pipe2vbl(crtc);
806 omap_crtc->vblank_irq.irq = omap_crtc_vblank_irq;
808 omap_crtc->error_irq.irqmask =
809 dispc_mgr_get_sync_lost_irq(channel);
810 omap_crtc->error_irq.irq = omap_crtc_error_irq;
811 omap_irq_register(dev, &omap_crtc->error_irq);
814 omap_crtc->mgr = omap_dss_get_overlay_manager(channel);
816 /* TODO: fix hard-coded setup.. add properties! */
817 info = &omap_crtc->info;
818 info->default_color = 0x00000000;
819 info->trans_key = 0x00000000;
820 info->trans_key_type = OMAP_DSS_COLOR_KEY_GFX_DST;
821 info->trans_enabled = false;
823 ret = drm_crtc_init_with_planes(dev, crtc, plane, NULL,
830 drm_crtc_helper_add(crtc, &omap_crtc_helper_funcs);
832 omap_plane_install_properties(crtc->primary, &crtc->base);
834 omap_crtcs[channel] = omap_crtc;