drivers/gpu/drm/omapdrm/omap_crtc.c

   1 /*
   2  * drivers/gpu/drm/omapdrm/omap_crtc.c
   3  *
   4  * Copyright (C) 2011 Texas Instruments
   5  * Author: Rob Clark <rob@ti.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify it
   8  * under the terms of the GNU General Public License version 2 as published by
   9  * the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful, but WITHOUT
  12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14  * more details.
  15  *
  16  * You should have received a copy of the GNU General Public License along with
  17  * this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include <linux/completion.h>
  21
  22 #include <drm/drm_atomic.h>
  23 #include <drm/drm_atomic_helper.h>
  24 #include <drm/drm_crtc.h>
  25 #include <drm/drm_crtc_helper.h>
  26 #include <drm/drm_mode.h>
  27 #include <drm/drm_plane_helper.h>
  28
  29 #include "omap_drv.h"
  30
  31 #define to_omap_crtc(x) container_of(x, struct omap_crtc, base)
  32
  33 struct omap_crtc {
  34         struct drm_crtc base;
  35
  36         const char *name;
  37         enum omap_channel channel;
  38
  39         /*
  40          * Temporary: eventually this will go away, but it is needed
  41          * for now to keep the output's happy.  (They only need
  42          * mgr->id.)  Eventually this will be replaced w/ something
  43          * more common-panel-framework-y
  44          */
  45         struct omap_overlay_manager *mgr;
  46
  47         struct omap_video_timings timings;
  48
  49         struct omap_drm_irq vblank_irq;
  50         struct omap_drm_irq error_irq;
  51
  52         /* pending event */
  53         struct drm_pending_vblank_event *event;
  54         wait_queue_head_t flip_wait;
  55
  56         struct completion completion;
  57
  58         bool ignore_digit_sync_lost;
  59 };
  60
  61 /* -----------------------------------------------------------------------------
  62  * Helper Functions
  63  */
  64
  65 uint32_t pipe2vbl(struct drm_crtc *crtc)
  66 {
  67         struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  68
  69         return dispc_mgr_get_vsync_irq(omap_crtc->channel);
  70 }
  71
  72 struct omap_video_timings *omap_crtc_timings(struct drm_crtc *crtc)
  73 {
  74         struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  75         return &omap_crtc->timings;
  76 }
  77
  78 enum omap_channel omap_crtc_channel(struct drm_crtc *crtc)
  79 {
  80         struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  81         return omap_crtc->channel;
  82 }
  83
  84 /* -----------------------------------------------------------------------------
  85  * DSS Manager Functions
  86  */
  87
  88 /*
  89  * Manager-ops, callbacks from output when they need to configure
  90  * the upstream part of the video pipe.
  91  *
  92  * Most of these we can ignore until we add support for command-mode
  93  * panels.. for video-mode the crtc-helpers already do an adequate
  94  * job of sequencing the setup of the video pipe in the proper order
  95  */
  96
  97 /* ovl-mgr-id -> crtc */
  98 static struct omap_crtc *omap_crtcs[8];
  99
 100 /* we can probably ignore these until we support command-mode panels: */
 101 static int omap_crtc_dss_connect(struct omap_overlay_manager *mgr,
 102                 struct omap_dss_device *dst)
 103 {
 104         if (mgr->output)
 105                 return -EINVAL;
 106
 107         if ((mgr->supported_outputs & dst->id) == 0)
 108                 return -EINVAL;
 109
 110         dst->manager = mgr;
 111         mgr->output = dst;
 112
 113         return 0;
 114 }
 115
 116 static void omap_crtc_dss_disconnect(struct omap_overlay_manager *mgr,
 117                 struct omap_dss_device *dst)
 118 {
 119         mgr->output->manager = NULL;
 120         mgr->output = NULL;
 121 }
 122
 123 static void omap_crtc_dss_start_update(struct omap_overlay_manager *mgr)
 124 {
 125 }
 126
 127 /* Called only from the encoder enable/disable and suspend/resume handlers. */
 128 static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable)
 129 {
 130         struct drm_device *dev = crtc->dev;
 131         struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
 132         enum omap_channel channel = omap_crtc->channel;
 133         struct omap_irq_wait *wait;
 134         u32 framedone_irq, vsync_irq;
 135         int ret;
 136
 137         if (dispc_mgr_is_enabled(channel) == enable)
 138                 return;
 139
 140         if (omap_crtc->channel == OMAP_DSS_CHANNEL_DIGIT) {
 141                 /*
 142                  * Digit output produces some sync lost interrupts during the
 143                  * first frame when enabling, so we need to ignore those.
 144                  */
 145                 omap_crtc->ignore_digit_sync_lost = true;
 146         }
 147
 148         framedone_irq = dispc_mgr_get_framedone_irq(channel);
 149         vsync_irq = dispc_mgr_get_vsync_irq(channel);
 150
 151         if (enable) {
 152                 wait = omap_irq_wait_init(dev, vsync_irq, 1);
 153         } else {
 154                 /*
 155                  * When we disable the digit output, we need to wait for
 156                  * FRAMEDONE to know that DISPC has finished with the output.
 157                  *
 158                  * OMAP2/3 does not have FRAMEDONE irq for digit output, and in
 159                  * that case we need to use vsync interrupt, and wait for both
 160                  * even and odd frames.
 161                  */
 162
 163                 if (framedone_irq)
 164                         wait = omap_irq_wait_init(dev, framedone_irq, 1);
 165                 else
 166                         wait = omap_irq_wait_init(dev, vsync_irq, 2);
 167         }
 168
 169         dispc_mgr_enable(channel, enable);
 170
 171         ret = omap_irq_wait(dev, wait, msecs_to_jiffies(100));
 172         if (ret) {
 173                 dev_err(dev->dev, "%s: timeout waiting for %s\n",
 174                                 omap_crtc->name, enable ? "enable" : "disable");
 175         }
 176
 177         if (omap_crtc->channel == OMAP_DSS_CHANNEL_DIGIT) {
 178                 omap_crtc->ignore_digit_sync_lost = false;
 179                 /* make sure the irq handler sees the value above */
 180                 mb();
 181         }
 182 }
 183
 184
 185 static int omap_crtc_dss_enable(struct omap_overlay_manager *mgr)
 186 {
 187         struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];
 188         struct omap_overlay_manager_info info;
 189
 190         memset(&info, 0, sizeof(info));
 191         info.default_color = 0x00000000;
 192         info.trans_key = 0x00000000;
 193         info.trans_key_type = OMAP_DSS_COLOR_KEY_GFX_DST;
 194         info.trans_enabled = false;
 195
 196         dispc_mgr_setup(omap_crtc->channel, &info);
 197         dispc_mgr_set_timings(omap_crtc->channel,
 198                         &omap_crtc->timings);
 199         omap_crtc_set_enabled(&omap_crtc->base, true);
 200
 201         return 0;
 202 }
 203
 204 static void omap_crtc_dss_disable(struct omap_overlay_manager *mgr)
 205 {
 206         struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];
 207
 208         omap_crtc_set_enabled(&omap_crtc->base, false);
 209 }
 210
 211 static void omap_crtc_dss_set_timings(struct omap_overlay_manager *mgr,
 212                 const struct omap_video_timings *timings)
 213 {
 214         struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];
 215         DBG("%s", omap_crtc->name);
 216         omap_crtc->timings = *timings;
 217 }
 218
 219 static void omap_crtc_dss_set_lcd_config(struct omap_overlay_manager *mgr,
 220                 const struct dss_lcd_mgr_config *config)
 221 {
 222         struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];
 223         DBG("%s", omap_crtc->name);
 224         dispc_mgr_set_lcd_config(omap_crtc->channel, config);
 225 }
 226
 227 static int omap_crtc_dss_register_framedone(
 228                 struct omap_overlay_manager *mgr,
 229                 void (*handler)(void *), void *data)
 230 {
 231         return 0;
 232 }
 233
 234 static void omap_crtc_dss_unregister_framedone(
 235                 struct omap_overlay_manager *mgr,
 236                 void (*handler)(void *), void *data)
 237 {
 238 }
 239
 240 static const struct dss_mgr_ops mgr_ops = {
 241         .connect = omap_crtc_dss_connect,
 242         .disconnect = omap_crtc_dss_disconnect,
 243         .start_update = omap_crtc_dss_start_update,
 244         .enable = omap_crtc_dss_enable,
 245         .disable = omap_crtc_dss_disable,
 246         .set_timings = omap_crtc_dss_set_timings,
 247         .set_lcd_config = omap_crtc_dss_set_lcd_config,
 248         .register_framedone_handler = omap_crtc_dss_register_framedone,
 249         .unregister_framedone_handler = omap_crtc_dss_unregister_framedone,
 250 };
 251
 252 /* -----------------------------------------------------------------------------
 253  * Setup, Flush and Page Flip
 254  */
 255
 256 static void omap_crtc_complete_page_flip(struct drm_crtc *crtc)
 257 {
 258         struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
 259         struct drm_pending_vblank_event *event;
 260         struct drm_device *dev = crtc->dev;
 261         unsigned long flags;
 262
 263         spin_lock_irqsave(&dev->event_lock, flags);
 264
 265         event = omap_crtc->event;
 266         omap_crtc->event = NULL;
 267
 268         if (event) {
 269                 list_del(&event->base.link);
 270
 271                 /*
 272                  * Queue the event for delivery if it's still linked to a file
 273                  * handle, otherwise just destroy it.
 274                  */
 275                 if (event->base.file_priv)
 276                         drm_crtc_send_vblank_event(crtc, event);
 277                 else
 278                         event->base.destroy(&event->base);
 279
 280                 wake_up(&omap_crtc->flip_wait);
 281                 drm_crtc_vblank_put(crtc);
 282         }
 283
 284         spin_unlock_irqrestore(&dev->event_lock, flags);
 285 }
 286
 287 static bool omap_crtc_page_flip_pending(struct drm_crtc *crtc)
 288 {
 289         struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
 290         struct drm_device *dev = crtc->dev;
 291         unsigned long flags;
 292         bool pending;
 293
 294         spin_lock_irqsave(&dev->event_lock, flags);
 295         pending = omap_crtc->event != NULL;
 296         spin_unlock_irqrestore(&dev->event_lock, flags);
 297
 298         return pending;
 299 }
 300
 301 static void omap_crtc_wait_page_flip(struct drm_crtc *crtc)
 302 {
 303         struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
 304
 305         if (wait_event_timeout(omap_crtc->flip_wait,
 306                                !omap_crtc_page_flip_pending(crtc),
 307                                msecs_to_jiffies(50)))
 308                 return;
 309
 310         dev_warn(crtc->dev->dev, "page flip timeout!\n");
 311
 312         omap_crtc_complete_page_flip(crtc);
 313 }
 314
 315 static void omap_crtc_error_irq(struct omap_drm_irq *irq, uint32_t irqstatus)
 316 {
 317         struct omap_crtc *omap_crtc =
 318                         container_of(irq, struct omap_crtc, error_irq);
 319
 320         if (omap_crtc->ignore_digit_sync_lost) {
 321                 irqstatus &= ~DISPC_IRQ_SYNC_LOST_DIGIT;
 322                 if (!irqstatus)
 323                         return;
 324         }
 325
 326         DRM_ERROR_RATELIMITED("%s: errors: %08x\n", omap_crtc->name, irqstatus);
 327 }
 328
 329 static void omap_crtc_vblank_irq(struct omap_drm_irq *irq, uint32_t irqstatus)
 330 {
 331         struct omap_crtc *omap_crtc =
 332                         container_of(irq, struct omap_crtc, vblank_irq);
 333         struct drm_device *dev = omap_crtc->base.dev;
 334
 335         if (dispc_mgr_go_busy(omap_crtc->channel))
 336                 return;
 337
 338         DBG("%s: apply done", omap_crtc->name);
 339         __omap_irq_unregister(dev, &omap_crtc->vblank_irq);
 340
 341         /* wakeup userspace */
 342         omap_crtc_complete_page_flip(&omap_crtc->base);
 343
 344         complete(&omap_crtc->completion);
 345 }
 346
 347 static int omap_crtc_flush(struct drm_crtc *crtc)
 348 {
 349         struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
 350
 351         DBG("%s: GO", omap_crtc->name);
 352
 353         WARN_ON(omap_crtc->vblank_irq.registered);
 354
 355         if (dispc_mgr_is_enabled(omap_crtc->channel)) {
 356                 dispc_mgr_go(omap_crtc->channel);
 357                 omap_irq_register(crtc->dev, &omap_crtc->vblank_irq);
 358
 359                 WARN_ON(!wait_for_completion_timeout(&omap_crtc->completion,
 360                                                      msecs_to_jiffies(100)));
 361                 reinit_completion(&omap_crtc->completion);
 362         }
 363
 364         return 0;
 365 }
 366
 367 /* -----------------------------------------------------------------------------
 368  * CRTC Functions
 369  */
 370
 371 static void omap_crtc_destroy(struct drm_crtc *crtc)
 372 {
 373         struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
 374
 375         DBG("%s", omap_crtc->name);
 376
 377         WARN_ON(omap_crtc->vblank_irq.registered);
 378         omap_irq_unregister(crtc->dev, &omap_crtc->error_irq);
 379
 380         drm_crtc_cleanup(crtc);
 381
 382         kfree(omap_crtc);
 383 }
 384
 385 static bool omap_crtc_mode_fixup(struct drm_crtc *crtc,
 386                 const struct drm_display_mode *mode,
 387                 struct drm_display_mode *adjusted_mode)
 388 {
 389         return true;
 390 }
 391
 392 static void omap_crtc_enable(struct drm_crtc *crtc)
 393 {
 394         struct omap_drm_private *priv = crtc->dev->dev_private;
 395         struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
 396         unsigned int i;
 397
 398         DBG("%s", omap_crtc->name);
 399
 400         /* Enable all planes associated with the CRTC. */
 401         for (i = 0; i < priv->num_planes; i++) {
 402                 struct drm_plane *plane = priv->planes[i];
 403
 404                 if (plane->crtc == crtc)
 405                         WARN_ON(omap_plane_setup(plane));
 406         }
 407
 408         drm_crtc_vblank_on(crtc);
 409 }
 410
 411 static void omap_crtc_disable(struct drm_crtc *crtc)
 412 {
 413         struct omap_drm_private *priv = crtc->dev->dev_private;
 414         struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
 415         unsigned int i;
 416
 417         DBG("%s", omap_crtc->name);
 418
 419         omap_crtc_wait_page_flip(crtc);
 420         drm_crtc_vblank_off(crtc);
 421
 422         /* Disable all planes associated with the CRTC. */
 423         for (i = 0; i < priv->num_planes; i++) {
 424                 struct drm_plane *plane = priv->planes[i];
 425
 426                 if (plane->crtc == crtc)
 427                         WARN_ON(omap_plane_setup(plane));
 428         }
 429 }
 430
 431 static void omap_crtc_mode_set_nofb(struct drm_crtc *crtc)
 432 {
 433         struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
 434         struct drm_display_mode *mode = &crtc->state->adjusted_mode;
 435
 436         DBG("%s: set mode: %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
 437             omap_crtc->name, mode->base.id, mode->name,
 438             mode->vrefresh, mode->clock,
 439             mode->hdisplay, mode->hsync_start, mode->hsync_end, mode->htotal,
 440             mode->vdisplay, mode->vsync_start, mode->vsync_end, mode->vtotal,
 441             mode->type, mode->flags);
 442
 443         copy_timings_drm_to_omap(&omap_crtc->timings, mode);
 444 }
 445
 446 static void omap_crtc_atomic_begin(struct drm_crtc *crtc)
 447 {
 448         struct drm_pending_vblank_event *event = crtc->state->event;
 449         struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
 450         struct drm_device *dev = crtc->dev;
 451         unsigned long flags;
 452
 453         if (event) {
 454                 WARN_ON(omap_crtc->event);
 455                 WARN_ON(drm_crtc_vblank_get(crtc) != 0);
 456
 457                 spin_lock_irqsave(&dev->event_lock, flags);
 458                 omap_crtc->event = event;
 459                 spin_unlock_irqrestore(&dev->event_lock, flags);
 460         }
 461 }
 462
 463 static void omap_crtc_atomic_flush(struct drm_crtc *crtc)
 464 {
 465         omap_crtc_flush(crtc);
 466
 467         crtc->invert_dimensions = !!(crtc->primary->state->rotation &
 468                                     (BIT(DRM_ROTATE_90) | BIT(DRM_ROTATE_270)));
 469 }
 470
 471 static int omap_crtc_atomic_set_property(struct drm_crtc *crtc,
 472                                          struct drm_crtc_state *state,
 473                                          struct drm_property *property,
 474                                          uint64_t val)
 475 {
 476         struct drm_plane_state *plane_state;
 477         struct drm_plane *plane = crtc->primary;
 478
 479         /*
 480          * Delegate property set to the primary plane. Get the plane state and
 481          * set the property directly.
 482          */
 483
 484         plane_state = drm_atomic_get_plane_state(state->state, plane);
 485         if (!plane_state)
 486                 return -EINVAL;
 487
 488         return drm_atomic_plane_set_property(plane, plane_state, property, val);
 489 }
 490
 491 static int omap_crtc_atomic_get_property(struct drm_crtc *crtc,
 492                                          const struct drm_crtc_state *state,
 493                                          struct drm_property *property,
 494                                          uint64_t *val)
 495 {
 496         /*
 497          * Delegate property get to the primary plane. The
 498          * drm_atomic_plane_get_property() function isn't exported, but can be
 499          * called through drm_object_property_get_value() as that will call
 500          * drm_atomic_get_property() for atomic drivers.
 501          */
 502         return drm_object_property_get_value(&crtc->primary->base, property,
 503                                              val);
 504 }
 505
 506 static const struct drm_crtc_funcs omap_crtc_funcs = {
 507         .reset = drm_atomic_helper_crtc_reset,
 508         .set_config = drm_atomic_helper_set_config,
 509         .destroy = omap_crtc_destroy,
 510         .page_flip = drm_atomic_helper_page_flip,
 511         .set_property = drm_atomic_helper_crtc_set_property,
 512         .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
 513         .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
 514         .atomic_set_property = omap_crtc_atomic_set_property,
 515         .atomic_get_property = omap_crtc_atomic_get_property,
 516 };
 517
 518 static const struct drm_crtc_helper_funcs omap_crtc_helper_funcs = {
 519         .mode_fixup = omap_crtc_mode_fixup,
 520         .mode_set_nofb = omap_crtc_mode_set_nofb,
 521         .disable = omap_crtc_disable,
 522         .enable = omap_crtc_enable,
 523         .atomic_begin = omap_crtc_atomic_begin,
 524         .atomic_flush = omap_crtc_atomic_flush,
 525 };
 526
 527 /* -----------------------------------------------------------------------------
 528  * Init and Cleanup
 529  */
 530
 531 static const char *channel_names[] = {
 532         [OMAP_DSS_CHANNEL_LCD] = "lcd",
 533         [OMAP_DSS_CHANNEL_DIGIT] = "tv",
 534         [OMAP_DSS_CHANNEL_LCD2] = "lcd2",
 535         [OMAP_DSS_CHANNEL_LCD3] = "lcd3",
 536 };
 537
 538 void omap_crtc_pre_init(void)
 539 {
 540         dss_install_mgr_ops(&mgr_ops);
 541 }
 542
 543 void omap_crtc_pre_uninit(void)
 544 {
 545         dss_uninstall_mgr_ops();
 546 }
 547
 548 /* initialize crtc */
 549 struct drm_crtc *omap_crtc_init(struct drm_device *dev,
 550                 struct drm_plane *plane, enum omap_channel channel, int id)
 551 {
 552         struct drm_crtc *crtc = NULL;
 553         struct omap_crtc *omap_crtc;
 554         int ret;
 555
 556         DBG("%s", channel_names[channel]);
 557
 558         omap_crtc = kzalloc(sizeof(*omap_crtc), GFP_KERNEL);
 559         if (!omap_crtc)
 560                 return NULL;
 561
 562         crtc = &omap_crtc->base;
 563
 564         init_waitqueue_head(&omap_crtc->flip_wait);
 565         init_completion(&omap_crtc->completion);
 566
 567         omap_crtc->channel = channel;
 568         omap_crtc->name = channel_names[channel];
 569
 570         omap_crtc->vblank_irq.irqmask = pipe2vbl(crtc);
 571         omap_crtc->vblank_irq.irq = omap_crtc_vblank_irq;
 572
 573         omap_crtc->error_irq.irqmask =
 574                         dispc_mgr_get_sync_lost_irq(channel);
 575         omap_crtc->error_irq.irq = omap_crtc_error_irq;
 576         omap_irq_register(dev, &omap_crtc->error_irq);
 577
 578         /* temporary: */
 579         omap_crtc->mgr = omap_dss_get_overlay_manager(channel);
 580
 581         ret = drm_crtc_init_with_planes(dev, crtc, plane, NULL,
 582                                         &omap_crtc_funcs);
 583         if (ret < 0) {
 584                 kfree(omap_crtc);
 585                 return NULL;
 586         }
 587
 588         drm_crtc_helper_add(crtc, &omap_crtc_helper_funcs);
 589
 590         omap_plane_install_properties(crtc->primary, &crtc->base);
 591
 592         omap_crtcs[channel] = omap_crtc;
 593
 594         return crtc;
 595 }