2 * drivers/gpu/drm/omapdrm/omap_crtc.c
4 * Copyright (C) 2011 Texas Instruments
5 * Author: Rob Clark <rob@ti.com>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
20 #include <linux/completion.h>
22 #include <drm/drm_atomic.h>
23 #include <drm/drm_atomic_helper.h>
24 #include <drm/drm_crtc.h>
25 #include <drm/drm_crtc_helper.h>
26 #include <drm/drm_mode.h>
27 #include <drm/drm_plane_helper.h>
31 #define to_omap_crtc(x) container_of(x, struct omap_crtc, base)
37 enum omap_channel channel;
38 struct drm_encoder *current_encoder;
41 * Temporary: eventually this will go away, but it is needed
42 * for now to keep the output's happy. (They only need
43 * mgr->id.) Eventually this will be replaced w/ something
44 * more common-panel-framework-y
46 struct omap_overlay_manager *mgr;
48 struct omap_video_timings timings;
50 struct omap_drm_irq vblank_irq;
51 struct omap_drm_irq error_irq;
54 struct drm_pending_vblank_event *event;
55 wait_queue_head_t flip_wait;
57 struct completion completion;
59 bool ignore_digit_sync_lost;
62 /* -----------------------------------------------------------------------------
66 uint32_t pipe2vbl(struct drm_crtc *crtc)
68 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
70 return dispc_mgr_get_vsync_irq(omap_crtc->channel);
73 const struct omap_video_timings *omap_crtc_timings(struct drm_crtc *crtc)
75 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
76 return &omap_crtc->timings;
79 enum omap_channel omap_crtc_channel(struct drm_crtc *crtc)
81 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
82 return omap_crtc->channel;
85 /* -----------------------------------------------------------------------------
86 * DSS Manager Functions
90 * Manager-ops, callbacks from output when they need to configure
91 * the upstream part of the video pipe.
93 * Most of these we can ignore until we add support for command-mode
94 * panels.. for video-mode the crtc-helpers already do an adequate
95 * job of sequencing the setup of the video pipe in the proper order
98 /* ovl-mgr-id -> crtc */
99 static struct omap_crtc *omap_crtcs[8];
101 /* we can probably ignore these until we support command-mode panels: */
102 static int omap_crtc_dss_connect(struct omap_overlay_manager *mgr,
103 struct omap_dss_device *dst)
108 if ((mgr->supported_outputs & dst->id) == 0)
117 static void omap_crtc_dss_disconnect(struct omap_overlay_manager *mgr,
118 struct omap_dss_device *dst)
120 mgr->output->manager = NULL;
124 static void omap_crtc_dss_start_update(struct omap_overlay_manager *mgr)
128 /* Called only from omap_crtc_encoder_setup and suspend/resume handlers. */
129 static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable)
131 struct drm_device *dev = crtc->dev;
132 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
133 enum omap_channel channel = omap_crtc->channel;
134 struct omap_irq_wait *wait;
135 u32 framedone_irq, vsync_irq;
138 if (dispc_mgr_is_enabled(channel) == enable)
141 if (omap_crtc->channel == OMAP_DSS_CHANNEL_DIGIT) {
143 * Digit output produces some sync lost interrupts during the
144 * first frame when enabling, so we need to ignore those.
146 omap_crtc->ignore_digit_sync_lost = true;
149 framedone_irq = dispc_mgr_get_framedone_irq(channel);
150 vsync_irq = dispc_mgr_get_vsync_irq(channel);
153 wait = omap_irq_wait_init(dev, vsync_irq, 1);
156 * When we disable the digit output, we need to wait for
157 * FRAMEDONE to know that DISPC has finished with the output.
159 * OMAP2/3 does not have FRAMEDONE irq for digit output, and in
160 * that case we need to use vsync interrupt, and wait for both
161 * even and odd frames.
165 wait = omap_irq_wait_init(dev, framedone_irq, 1);
167 wait = omap_irq_wait_init(dev, vsync_irq, 2);
170 dispc_mgr_enable(channel, enable);
172 ret = omap_irq_wait(dev, wait, msecs_to_jiffies(100));
174 dev_err(dev->dev, "%s: timeout waiting for %s\n",
175 omap_crtc->name, enable ? "enable" : "disable");
178 if (omap_crtc->channel == OMAP_DSS_CHANNEL_DIGIT) {
179 omap_crtc->ignore_digit_sync_lost = false;
180 /* make sure the irq handler sees the value above */
186 static int omap_crtc_dss_enable(struct omap_overlay_manager *mgr)
188 struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];
189 struct omap_overlay_manager_info info;
191 memset(&info, 0, sizeof(info));
192 info.default_color = 0x00000000;
193 info.trans_key = 0x00000000;
194 info.trans_key_type = OMAP_DSS_COLOR_KEY_GFX_DST;
195 info.trans_enabled = false;
197 dispc_mgr_setup(omap_crtc->channel, &info);
198 dispc_mgr_set_timings(omap_crtc->channel,
199 &omap_crtc->timings);
200 omap_crtc_set_enabled(&omap_crtc->base, true);
205 static void omap_crtc_dss_disable(struct omap_overlay_manager *mgr)
207 struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];
209 omap_crtc_set_enabled(&omap_crtc->base, false);
212 static void omap_crtc_dss_set_timings(struct omap_overlay_manager *mgr,
213 const struct omap_video_timings *timings)
215 struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];
216 DBG("%s", omap_crtc->name);
217 omap_crtc->timings = *timings;
220 static void omap_crtc_dss_set_lcd_config(struct omap_overlay_manager *mgr,
221 const struct dss_lcd_mgr_config *config)
223 struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];
224 DBG("%s", omap_crtc->name);
225 dispc_mgr_set_lcd_config(omap_crtc->channel, config);
228 static int omap_crtc_dss_register_framedone(
229 struct omap_overlay_manager *mgr,
230 void (*handler)(void *), void *data)
235 static void omap_crtc_dss_unregister_framedone(
236 struct omap_overlay_manager *mgr,
237 void (*handler)(void *), void *data)
241 static const struct dss_mgr_ops mgr_ops = {
242 .connect = omap_crtc_dss_connect,
243 .disconnect = omap_crtc_dss_disconnect,
244 .start_update = omap_crtc_dss_start_update,
245 .enable = omap_crtc_dss_enable,
246 .disable = omap_crtc_dss_disable,
247 .set_timings = omap_crtc_dss_set_timings,
248 .set_lcd_config = omap_crtc_dss_set_lcd_config,
249 .register_framedone_handler = omap_crtc_dss_register_framedone,
250 .unregister_framedone_handler = omap_crtc_dss_unregister_framedone,
253 /* -----------------------------------------------------------------------------
254 * Setup, Flush and Page Flip
257 void omap_crtc_cancel_page_flip(struct drm_crtc *crtc, struct drm_file *file)
259 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
260 struct drm_pending_vblank_event *event;
261 struct drm_device *dev = crtc->dev;
264 /* Destroy the pending vertical blanking event associated with the
265 * pending page flip, if any, and disable vertical blanking interrupts.
268 spin_lock_irqsave(&dev->event_lock, flags);
270 event = omap_crtc->event;
271 omap_crtc->event = NULL;
273 if (event && event->base.file_priv == file) {
274 event->base.destroy(&event->base);
275 drm_crtc_vblank_put(crtc);
278 spin_unlock_irqrestore(&dev->event_lock, flags);
281 static void omap_crtc_complete_page_flip(struct drm_crtc *crtc)
283 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
284 struct drm_pending_vblank_event *event;
285 struct drm_device *dev = crtc->dev;
288 spin_lock_irqsave(&dev->event_lock, flags);
290 event = omap_crtc->event;
291 omap_crtc->event = NULL;
294 drm_crtc_send_vblank_event(crtc, event);
295 wake_up(&omap_crtc->flip_wait);
296 drm_crtc_vblank_put(crtc);
299 spin_unlock_irqrestore(&dev->event_lock, flags);
302 static bool omap_crtc_page_flip_pending(struct drm_crtc *crtc)
304 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
305 struct drm_device *dev = crtc->dev;
309 spin_lock_irqsave(&dev->event_lock, flags);
310 pending = omap_crtc->event != NULL;
311 spin_unlock_irqrestore(&dev->event_lock, flags);
316 static void omap_crtc_wait_page_flip(struct drm_crtc *crtc)
318 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
320 if (wait_event_timeout(omap_crtc->flip_wait,
321 !omap_crtc_page_flip_pending(crtc),
322 msecs_to_jiffies(50)))
325 dev_warn(crtc->dev->dev, "page flip timeout!\n");
327 omap_crtc_complete_page_flip(crtc);
330 static void omap_crtc_error_irq(struct omap_drm_irq *irq, uint32_t irqstatus)
332 struct omap_crtc *omap_crtc =
333 container_of(irq, struct omap_crtc, error_irq);
335 if (omap_crtc->ignore_digit_sync_lost) {
336 irqstatus &= ~DISPC_IRQ_SYNC_LOST_DIGIT;
341 DRM_ERROR_RATELIMITED("%s: errors: %08x\n", omap_crtc->name, irqstatus);
344 static void omap_crtc_vblank_irq(struct omap_drm_irq *irq, uint32_t irqstatus)
346 struct omap_crtc *omap_crtc =
347 container_of(irq, struct omap_crtc, vblank_irq);
348 struct drm_device *dev = omap_crtc->base.dev;
350 if (dispc_mgr_go_busy(omap_crtc->channel))
353 DBG("%s: apply done", omap_crtc->name);
354 __omap_irq_unregister(dev, &omap_crtc->vblank_irq);
356 /* wakeup userspace */
357 omap_crtc_complete_page_flip(&omap_crtc->base);
359 complete(&omap_crtc->completion);
362 static int omap_crtc_flush(struct drm_crtc *crtc)
364 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
366 DBG("%s: GO", omap_crtc->name);
368 WARN_ON(!drm_modeset_is_locked(&crtc->mutex));
369 WARN_ON(omap_crtc->vblank_irq.registered);
371 if (dispc_mgr_is_enabled(omap_crtc->channel)) {
372 dispc_mgr_go(omap_crtc->channel);
373 omap_irq_register(crtc->dev, &omap_crtc->vblank_irq);
375 WARN_ON(!wait_for_completion_timeout(&omap_crtc->completion,
376 msecs_to_jiffies(100)));
377 reinit_completion(&omap_crtc->completion);
383 static void omap_crtc_encoder_setup(struct drm_crtc *crtc, bool enable)
385 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
386 struct omap_drm_private *priv = crtc->dev->dev_private;
387 struct drm_encoder *encoder = NULL;
390 DBG("%s: enable=%d", omap_crtc->name, enable);
394 for (i = 0; i < priv->num_encoders; i++) {
395 if (priv->encoders[i]->crtc == crtc) {
396 encoder = priv->encoders[i];
401 if (omap_crtc->current_encoder && encoder != omap_crtc->current_encoder)
402 omap_encoder_set_enabled(omap_crtc->current_encoder, false);
404 omap_crtc->current_encoder = encoder;
407 omap_encoder_set_enabled(encoder, false);
409 omap_encoder_update(encoder, omap_crtc->mgr,
410 &omap_crtc->timings);
411 omap_encoder_set_enabled(encoder, true);
418 /* -----------------------------------------------------------------------------
422 static void omap_crtc_destroy(struct drm_crtc *crtc)
424 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
426 DBG("%s", omap_crtc->name);
428 WARN_ON(omap_crtc->vblank_irq.registered);
429 omap_irq_unregister(crtc->dev, &omap_crtc->error_irq);
431 drm_crtc_cleanup(crtc);
436 static bool omap_crtc_mode_fixup(struct drm_crtc *crtc,
437 const struct drm_display_mode *mode,
438 struct drm_display_mode *adjusted_mode)
443 static void omap_crtc_enable(struct drm_crtc *crtc)
445 struct omap_drm_private *priv = crtc->dev->dev_private;
446 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
449 DBG("%s", omap_crtc->name);
453 /* Enable all planes associated with the CRTC. */
454 for (i = 0; i < priv->num_planes; i++) {
455 struct drm_plane *plane = priv->planes[i];
457 if (plane->crtc == crtc)
458 WARN_ON(omap_plane_setup(plane));
461 omap_crtc_encoder_setup(crtc, true);
462 omap_crtc_flush(crtc);
464 drm_crtc_vblank_on(crtc);
469 static void omap_crtc_disable(struct drm_crtc *crtc)
471 struct omap_drm_private *priv = crtc->dev->dev_private;
472 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
475 DBG("%s", omap_crtc->name);
477 omap_crtc_wait_page_flip(crtc);
479 drm_crtc_vblank_off(crtc);
481 /* Disable all planes associated with the CRTC. */
482 for (i = 0; i < priv->num_planes; i++) {
483 struct drm_plane *plane = priv->planes[i];
485 if (plane->crtc == crtc)
486 WARN_ON(omap_plane_setup(plane));
489 omap_crtc_encoder_setup(crtc, false);
490 omap_crtc_flush(crtc);
495 static void omap_crtc_mode_set_nofb(struct drm_crtc *crtc)
497 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
498 struct drm_display_mode *mode = &crtc->state->adjusted_mode;
500 DBG("%s: set mode: %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
501 omap_crtc->name, mode->base.id, mode->name,
502 mode->vrefresh, mode->clock,
503 mode->hdisplay, mode->hsync_start, mode->hsync_end, mode->htotal,
504 mode->vdisplay, mode->vsync_start, mode->vsync_end, mode->vtotal,
505 mode->type, mode->flags);
507 copy_timings_drm_to_omap(&omap_crtc->timings, mode);
510 static void omap_crtc_atomic_begin(struct drm_crtc *crtc)
512 struct drm_pending_vblank_event *event = crtc->state->event;
513 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
514 struct drm_device *dev = crtc->dev;
520 WARN_ON(omap_crtc->event);
521 WARN_ON(drm_crtc_vblank_get(crtc) != 0);
523 spin_lock_irqsave(&dev->event_lock, flags);
524 omap_crtc->event = event;
525 spin_unlock_irqrestore(&dev->event_lock, flags);
529 static void omap_crtc_atomic_flush(struct drm_crtc *crtc)
531 omap_crtc_flush(crtc);
535 crtc->invert_dimensions = !!(crtc->primary->state->rotation &
536 (BIT(DRM_ROTATE_90) | BIT(DRM_ROTATE_270)));
539 static int omap_crtc_atomic_set_property(struct drm_crtc *crtc,
540 struct drm_crtc_state *state,
541 struct drm_property *property,
544 struct drm_plane_state *plane_state;
545 struct drm_plane *plane = crtc->primary;
548 * Delegate property set to the primary plane. Get the plane state and
549 * set the property directly.
552 plane_state = drm_atomic_get_plane_state(state->state, plane);
556 return drm_atomic_plane_set_property(plane, plane_state, property, val);
559 static int omap_crtc_atomic_get_property(struct drm_crtc *crtc,
560 const struct drm_crtc_state *state,
561 struct drm_property *property,
565 * Delegate property get to the primary plane. The
566 * drm_atomic_plane_get_property() function isn't exported, but can be
567 * called through drm_object_property_get_value() as that will call
568 * drm_atomic_get_property() for atomic drivers.
570 return drm_object_property_get_value(&crtc->primary->base, property,
574 static const struct drm_crtc_funcs omap_crtc_funcs = {
575 .reset = drm_atomic_helper_crtc_reset,
576 .set_config = drm_atomic_helper_set_config,
577 .destroy = omap_crtc_destroy,
578 .page_flip = drm_atomic_helper_page_flip,
579 .set_property = drm_atomic_helper_crtc_set_property,
580 .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
581 .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
582 .atomic_set_property = omap_crtc_atomic_set_property,
583 .atomic_get_property = omap_crtc_atomic_get_property,
586 static const struct drm_crtc_helper_funcs omap_crtc_helper_funcs = {
587 .mode_fixup = omap_crtc_mode_fixup,
588 .mode_set_nofb = omap_crtc_mode_set_nofb,
589 .disable = omap_crtc_disable,
590 .enable = omap_crtc_enable,
591 .atomic_begin = omap_crtc_atomic_begin,
592 .atomic_flush = omap_crtc_atomic_flush,
595 /* -----------------------------------------------------------------------------
599 static const char *channel_names[] = {
600 [OMAP_DSS_CHANNEL_LCD] = "lcd",
601 [OMAP_DSS_CHANNEL_DIGIT] = "tv",
602 [OMAP_DSS_CHANNEL_LCD2] = "lcd2",
603 [OMAP_DSS_CHANNEL_LCD3] = "lcd3",
606 void omap_crtc_pre_init(void)
608 dss_install_mgr_ops(&mgr_ops);
611 void omap_crtc_pre_uninit(void)
613 dss_uninstall_mgr_ops();
616 /* initialize crtc */
617 struct drm_crtc *omap_crtc_init(struct drm_device *dev,
618 struct drm_plane *plane, enum omap_channel channel, int id)
620 struct drm_crtc *crtc = NULL;
621 struct omap_crtc *omap_crtc;
624 DBG("%s", channel_names[channel]);
626 omap_crtc = kzalloc(sizeof(*omap_crtc), GFP_KERNEL);
630 crtc = &omap_crtc->base;
632 init_waitqueue_head(&omap_crtc->flip_wait);
633 init_completion(&omap_crtc->completion);
635 omap_crtc->channel = channel;
636 omap_crtc->name = channel_names[channel];
638 omap_crtc->vblank_irq.irqmask = pipe2vbl(crtc);
639 omap_crtc->vblank_irq.irq = omap_crtc_vblank_irq;
641 omap_crtc->error_irq.irqmask =
642 dispc_mgr_get_sync_lost_irq(channel);
643 omap_crtc->error_irq.irq = omap_crtc_error_irq;
644 omap_irq_register(dev, &omap_crtc->error_irq);
647 omap_crtc->mgr = omap_dss_get_overlay_manager(channel);
649 ret = drm_crtc_init_with_planes(dev, crtc, plane, NULL,
656 drm_crtc_helper_add(crtc, &omap_crtc_helper_funcs);
658 omap_plane_install_properties(crtc->primary, &crtc->base);
660 omap_crtcs[channel] = omap_crtc;