drivers/gpu/drm/omapdrm/omap_crtc.c

   1 /*
   2  * drivers/gpu/drm/omapdrm/omap_crtc.c
   3  *
   4  * Copyright (C) 2011 Texas Instruments
   5  * Author: Rob Clark <rob@ti.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify it
   8  * under the terms of the GNU General Public License version 2 as published by
   9  * the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful, but WITHOUT
  12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14  * more details.
  15  *
  16  * You should have received a copy of the GNU General Public License along with
  17  * this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include <linux/completion.h>
  21
  22 #include "omap_drv.h"
  23
  24 #include <drm/drm_mode.h>
  25 #include <drm/drm_plane_helper.h>
  26 #include "drm_crtc.h"
  27 #include "drm_crtc_helper.h"
  28
  29 #define to_omap_crtc(x) container_of(x, struct omap_crtc, base)
  30
  31 struct omap_crtc {
  32         struct drm_crtc base;
  33
  34         const char *name;
  35         int pipe;
  36         enum omap_channel channel;
  37         struct omap_overlay_manager_info info;
  38         struct drm_encoder *current_encoder;
  39
  40         /*
  41          * Temporary: eventually this will go away, but it is needed
  42          * for now to keep the output's happy.  (They only need
  43          * mgr->id.)  Eventually this will be replaced w/ something
  44          * more common-panel-framework-y
  45          */
  46         struct omap_overlay_manager *mgr;
  47
  48         struct omap_video_timings timings;
  49         bool enabled;
  50
  51         struct omap_drm_irq vblank_irq;
  52         struct omap_drm_irq error_irq;
  53
  54         /* list of framebuffers to unpin */
  55         struct list_head pending_unpins;
  56
  57         /*
  58          * The flip_pending flag indicates if a page flip has been queued and
  59          * hasn't completed yet. The flip event, if any, is stored in
  60          * flip_event.
  61          *
  62          * The flip_work work queue handles page flip requests without caring
  63          * about what context the GEM async callback is called from. Possibly we
  64          * should just make omap_gem always call the cb from the worker so we
  65          * don't have to care about this.
  66          */
  67         bool flip_pending;
  68         struct drm_pending_vblank_event *flip_event;
  69         struct work_struct flip_work;
  70
  71         struct completion completion;
  72
  73         bool ignore_digit_sync_lost;
  74 };
  75
  76 struct omap_framebuffer_unpin {
  77         struct list_head list;
  78         struct drm_framebuffer *fb;
  79 };
  80
  81 /* -----------------------------------------------------------------------------
  82  * Helper Functions
  83  */
  84
  85 uint32_t pipe2vbl(struct drm_crtc *crtc)
  86 {
  87         struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  88
  89         return dispc_mgr_get_vsync_irq(omap_crtc->channel);
  90 }
  91
  92 const struct omap_video_timings *omap_crtc_timings(struct drm_crtc *crtc)
  93 {
  94         struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  95         return &omap_crtc->timings;
  96 }
  97
  98 enum omap_channel omap_crtc_channel(struct drm_crtc *crtc)
  99 {
 100         struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
 101         return omap_crtc->channel;
 102 }
 103
 104 /* -----------------------------------------------------------------------------
 105  * DSS Manager Functions
 106  */
 107
 108 /*
 109  * Manager-ops, callbacks from output when they need to configure
 110  * the upstream part of the video pipe.
 111  *
 112  * Most of these we can ignore until we add support for command-mode
 113  * panels.. for video-mode the crtc-helpers already do an adequate
 114  * job of sequencing the setup of the video pipe in the proper order
 115  */
 116
 117 /* ovl-mgr-id -> crtc */
 118 static struct omap_crtc *omap_crtcs[8];
 119
 120 /* we can probably ignore these until we support command-mode panels: */
 121 static int omap_crtc_connect(struct omap_overlay_manager *mgr,
 122                 struct omap_dss_device *dst)
 123 {
 124         if (mgr->output)
 125                 return -EINVAL;
 126
 127         if ((mgr->supported_outputs & dst->id) == 0)
 128                 return -EINVAL;
 129
 130         dst->manager = mgr;
 131         mgr->output = dst;
 132
 133         return 0;
 134 }
 135
 136 static void omap_crtc_disconnect(struct omap_overlay_manager *mgr,
 137                 struct omap_dss_device *dst)
 138 {
 139         mgr->output->manager = NULL;
 140         mgr->output = NULL;
 141 }
 142
 143 static void omap_crtc_start_update(struct omap_overlay_manager *mgr)
 144 {
 145 }
 146
 147 /* Called only from omap_crtc_setup and suspend/resume handlers. */
 148 static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable)
 149 {
 150         struct drm_device *dev = crtc->dev;
 151         struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
 152         enum omap_channel channel = omap_crtc->channel;
 153         struct omap_irq_wait *wait;
 154         u32 framedone_irq, vsync_irq;
 155         int ret;
 156
 157         if (dispc_mgr_is_enabled(channel) == enable)
 158                 return;
 159
 160         if (omap_crtc->channel == OMAP_DSS_CHANNEL_DIGIT) {
 161                 /*
 162                  * Digit output produces some sync lost interrupts during the
 163                  * first frame when enabling, so we need to ignore those.
 164                  */
 165                 omap_crtc->ignore_digit_sync_lost = true;
 166         }
 167
 168         framedone_irq = dispc_mgr_get_framedone_irq(channel);
 169         vsync_irq = dispc_mgr_get_vsync_irq(channel);
 170
 171         if (enable) {
 172                 wait = omap_irq_wait_init(dev, vsync_irq, 1);
 173         } else {
 174                 /*
 175                  * When we disable the digit output, we need to wait for
 176                  * FRAMEDONE to know that DISPC has finished with the output.
 177                  *
 178                  * OMAP2/3 does not have FRAMEDONE irq for digit output, and in
 179                  * that case we need to use vsync interrupt, and wait for both
 180                  * even and odd frames.
 181                  */
 182
 183                 if (framedone_irq)
 184                         wait = omap_irq_wait_init(dev, framedone_irq, 1);
 185                 else
 186                         wait = omap_irq_wait_init(dev, vsync_irq, 2);
 187         }
 188
 189         dispc_mgr_enable(channel, enable);
 190
 191         ret = omap_irq_wait(dev, wait, msecs_to_jiffies(100));
 192         if (ret) {
 193                 dev_err(dev->dev, "%s: timeout waiting for %s\n",
 194                                 omap_crtc->name, enable ? "enable" : "disable");
 195         }
 196
 197         if (omap_crtc->channel == OMAP_DSS_CHANNEL_DIGIT) {
 198                 omap_crtc->ignore_digit_sync_lost = false;
 199                 /* make sure the irq handler sees the value above */
 200                 mb();
 201         }
 202 }
 203
 204
 205 static int omap_crtc_enable(struct omap_overlay_manager *mgr)
 206 {
 207         struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];
 208
 209         dispc_mgr_setup(omap_crtc->channel, &omap_crtc->info);
 210         dispc_mgr_set_timings(omap_crtc->channel,
 211                         &omap_crtc->timings);
 212         omap_crtc_set_enabled(&omap_crtc->base, true);
 213
 214         return 0;
 215 }
 216
 217 static void omap_crtc_disable(struct omap_overlay_manager *mgr)
 218 {
 219         struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];
 220
 221         omap_crtc_set_enabled(&omap_crtc->base, false);
 222 }
 223
 224 static void omap_crtc_set_timings(struct omap_overlay_manager *mgr,
 225                 const struct omap_video_timings *timings)
 226 {
 227         struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];
 228         DBG("%s", omap_crtc->name);
 229         omap_crtc->timings = *timings;
 230 }
 231
 232 static void omap_crtc_set_lcd_config(struct omap_overlay_manager *mgr,
 233                 const struct dss_lcd_mgr_config *config)
 234 {
 235         struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];
 236         DBG("%s", omap_crtc->name);
 237         dispc_mgr_set_lcd_config(omap_crtc->channel, config);
 238 }
 239
 240 static int omap_crtc_register_framedone_handler(
 241                 struct omap_overlay_manager *mgr,
 242                 void (*handler)(void *), void *data)
 243 {
 244         return 0;
 245 }
 246
 247 static void omap_crtc_unregister_framedone_handler(
 248                 struct omap_overlay_manager *mgr,
 249                 void (*handler)(void *), void *data)
 250 {
 251 }
 252
 253 static const struct dss_mgr_ops mgr_ops = {
 254         .connect = omap_crtc_connect,
 255         .disconnect = omap_crtc_disconnect,
 256         .start_update = omap_crtc_start_update,
 257         .enable = omap_crtc_enable,
 258         .disable = omap_crtc_disable,
 259         .set_timings = omap_crtc_set_timings,
 260         .set_lcd_config = omap_crtc_set_lcd_config,
 261         .register_framedone_handler = omap_crtc_register_framedone_handler,
 262         .unregister_framedone_handler = omap_crtc_unregister_framedone_handler,
 263 };
 264
 265 /* -----------------------------------------------------------------------------
 266  * Setup, Flush and Page Flip
 267  */
 268
 269 void omap_crtc_cancel_page_flip(struct drm_crtc *crtc, struct drm_file *file)
 270 {
 271         struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
 272         struct drm_device *dev = crtc->dev;
 273         unsigned long flags;
 274
 275         spin_lock_irqsave(&dev->event_lock, flags);
 276
 277         /* Only complete events queued for our file handle. */
 278         if (omap_crtc->flip_event &&
 279             file == omap_crtc->flip_event->base.file_priv) {
 280                 drm_send_vblank_event(dev, omap_crtc->pipe,
 281                                       omap_crtc->flip_event);
 282                 omap_crtc->flip_event = NULL;
 283         }
 284
 285         spin_unlock_irqrestore(&dev->event_lock, flags);
 286 }
 287
 288 static void omap_crtc_error_irq(struct omap_drm_irq *irq, uint32_t irqstatus)
 289 {
 290         struct omap_crtc *omap_crtc =
 291                         container_of(irq, struct omap_crtc, error_irq);
 292
 293         if (omap_crtc->ignore_digit_sync_lost) {
 294                 irqstatus &= ~DISPC_IRQ_SYNC_LOST_DIGIT;
 295                 if (!irqstatus)
 296                         return;
 297         }
 298
 299         DRM_ERROR_RATELIMITED("%s: errors: %08x\n", omap_crtc->name, irqstatus);
 300 }
 301
 302 static void omap_crtc_vblank_irq(struct omap_drm_irq *irq, uint32_t irqstatus)
 303 {
 304         struct omap_crtc *omap_crtc =
 305                         container_of(irq, struct omap_crtc, vblank_irq);
 306         struct drm_device *dev = omap_crtc->base.dev;
 307         unsigned long flags;
 308
 309         if (dispc_mgr_go_busy(omap_crtc->channel))
 310                 return;
 311
 312         DBG("%s: apply done", omap_crtc->name);
 313         __omap_irq_unregister(dev, &omap_crtc->vblank_irq);
 314
 315         spin_lock_irqsave(&dev->event_lock, flags);
 316
 317         /* wakeup userspace */
 318         if (omap_crtc->flip_event)
 319                 drm_send_vblank_event(dev, omap_crtc->pipe,
 320                                       omap_crtc->flip_event);
 321
 322         omap_crtc->flip_event = NULL;
 323         omap_crtc->flip_pending = false;
 324
 325         spin_unlock_irqrestore(&dev->event_lock, flags);
 326
 327         complete(&omap_crtc->completion);
 328 }
 329
 330 int omap_crtc_flush(struct drm_crtc *crtc)
 331 {
 332         struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
 333         struct omap_framebuffer_unpin *fb, *next;
 334
 335         DBG("%s: GO", omap_crtc->name);
 336
 337         WARN_ON(!drm_modeset_is_locked(&crtc->mutex));
 338         WARN_ON(omap_crtc->vblank_irq.registered);
 339
 340         dispc_runtime_get();
 341
 342         if (dispc_mgr_is_enabled(omap_crtc->channel)) {
 343                 dispc_mgr_go(omap_crtc->channel);
 344                 omap_irq_register(crtc->dev, &omap_crtc->vblank_irq);
 345
 346                 WARN_ON(!wait_for_completion_timeout(&omap_crtc->completion,
 347                                                      msecs_to_jiffies(100)));
 348                 reinit_completion(&omap_crtc->completion);
 349         }
 350
 351         dispc_runtime_put();
 352
 353         /* Unpin and unreference pending framebuffers. */
 354         list_for_each_entry_safe(fb, next, &omap_crtc->pending_unpins, list) {
 355                 omap_framebuffer_unpin(fb->fb);
 356                 drm_framebuffer_unreference(fb->fb);
 357                 list_del(&fb->list);
 358                 kfree(fb);
 359         }
 360
 361         return 0;
 362 }
 363
 364 int omap_crtc_queue_unpin(struct drm_crtc *crtc, struct drm_framebuffer *fb)
 365 {
 366         struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
 367         struct omap_framebuffer_unpin *unpin;
 368
 369         unpin = kzalloc(sizeof(*unpin), GFP_KERNEL);
 370         if (!unpin)
 371                 return -ENOMEM;
 372
 373         unpin->fb = fb;
 374         list_add_tail(&unpin->list, &omap_crtc->pending_unpins);
 375
 376         return 0;
 377 }
 378
 379 static void omap_crtc_setup(struct drm_crtc *crtc)
 380 {
 381         struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
 382         struct omap_drm_private *priv = crtc->dev->dev_private;
 383         struct drm_encoder *encoder = NULL;
 384         unsigned int i;
 385
 386         DBG("%s: enabled=%d", omap_crtc->name, omap_crtc->enabled);
 387
 388         dispc_runtime_get();
 389
 390         for (i = 0; i < priv->num_encoders; i++) {
 391                 if (priv->encoders[i]->crtc == crtc) {
 392                         encoder = priv->encoders[i];
 393                         break;
 394                 }
 395         }
 396
 397         if (omap_crtc->current_encoder && encoder != omap_crtc->current_encoder)
 398                 omap_encoder_set_enabled(omap_crtc->current_encoder, false);
 399
 400         omap_crtc->current_encoder = encoder;
 401
 402         if (!omap_crtc->enabled) {
 403                 if (encoder)
 404                         omap_encoder_set_enabled(encoder, false);
 405         } else {
 406                 if (encoder) {
 407                         omap_encoder_set_enabled(encoder, false);
 408                         omap_encoder_update(encoder, omap_crtc->mgr,
 409                                         &omap_crtc->timings);
 410                         omap_encoder_set_enabled(encoder, true);
 411                 }
 412         }
 413
 414         dispc_runtime_put();
 415 }
 416
 417 /* -----------------------------------------------------------------------------
 418  * CRTC Functions
 419  */
 420
 421 static void omap_crtc_destroy(struct drm_crtc *crtc)
 422 {
 423         struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
 424
 425         DBG("%s", omap_crtc->name);
 426
 427         WARN_ON(omap_crtc->vblank_irq.registered);
 428         omap_irq_unregister(crtc->dev, &omap_crtc->error_irq);
 429
 430         drm_crtc_cleanup(crtc);
 431
 432         kfree(omap_crtc);
 433 }
 434
 435 static void omap_crtc_dpms(struct drm_crtc *crtc, int mode)
 436 {
 437         struct omap_drm_private *priv = crtc->dev->dev_private;
 438         struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
 439         bool enabled = (mode == DRM_MODE_DPMS_ON);
 440         int i;
 441
 442         DBG("%s: %d", omap_crtc->name, mode);
 443
 444         if (enabled == omap_crtc->enabled)
 445                 return;
 446
 447         /* Enable/disable all planes associated with the CRTC. */
 448         for (i = 0; i < priv->num_planes; i++) {
 449                 struct drm_plane *plane = priv->planes[i];
 450
 451                 if (plane->crtc == crtc)
 452                         WARN_ON(omap_plane_set_enable(plane, enabled));
 453         }
 454
 455         omap_crtc->enabled = enabled;
 456
 457         omap_crtc_setup(crtc);
 458         omap_crtc_flush(crtc);
 459 }
 460
 461 static bool omap_crtc_mode_fixup(struct drm_crtc *crtc,
 462                 const struct drm_display_mode *mode,
 463                 struct drm_display_mode *adjusted_mode)
 464 {
 465         return true;
 466 }
 467
 468 static int omap_crtc_mode_set(struct drm_crtc *crtc,
 469                 struct drm_display_mode *mode,
 470                 struct drm_display_mode *adjusted_mode,
 471                 int x, int y,
 472                 struct drm_framebuffer *old_fb)
 473 {
 474         struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
 475
 476         mode = adjusted_mode;
 477
 478         DBG("%s: set mode: %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
 479                         omap_crtc->name, mode->base.id, mode->name,
 480                         mode->vrefresh, mode->clock,
 481                         mode->hdisplay, mode->hsync_start,
 482                         mode->hsync_end, mode->htotal,
 483                         mode->vdisplay, mode->vsync_start,
 484                         mode->vsync_end, mode->vtotal,
 485                         mode->type, mode->flags);
 486
 487         copy_timings_drm_to_omap(&omap_crtc->timings, mode);
 488
 489         /*
 490          * The primary plane CRTC can be reset if the plane is disabled directly
 491          * through the universal plane API. Set it again here.
 492          */
 493         crtc->primary->crtc = crtc;
 494
 495         return omap_plane_mode_set(crtc->primary, crtc, crtc->primary->fb,
 496                                    0, 0, mode->hdisplay, mode->vdisplay,
 497                                    x, y, mode->hdisplay, mode->vdisplay);
 498 }
 499
 500 static void omap_crtc_prepare(struct drm_crtc *crtc)
 501 {
 502         struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
 503         DBG("%s", omap_crtc->name);
 504         omap_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
 505 }
 506
 507 static void omap_crtc_commit(struct drm_crtc *crtc)
 508 {
 509         struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
 510         DBG("%s", omap_crtc->name);
 511         omap_crtc_dpms(crtc, DRM_MODE_DPMS_ON);
 512 }
 513
 514 static int omap_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
 515                 struct drm_framebuffer *old_fb)
 516 {
 517         struct drm_plane *plane = crtc->primary;
 518         struct drm_display_mode *mode = &crtc->mode;
 519         int ret;
 520
 521         ret = omap_plane_mode_set(plane, crtc, crtc->primary->fb,
 522                                   0, 0, mode->hdisplay, mode->vdisplay,
 523                                   x, y, mode->hdisplay, mode->vdisplay);
 524         if (ret < 0)
 525                 return ret;
 526
 527         return omap_crtc_flush(crtc);
 528 }
 529
 530 static void page_flip_worker(struct work_struct *work)
 531 {
 532         struct omap_crtc *omap_crtc =
 533                         container_of(work, struct omap_crtc, flip_work);
 534         struct drm_crtc *crtc = &omap_crtc->base;
 535         struct drm_display_mode *mode = &crtc->mode;
 536         struct drm_gem_object *bo;
 537
 538         drm_modeset_lock(&crtc->mutex, NULL);
 539         omap_plane_mode_set(crtc->primary, crtc, crtc->primary->fb,
 540                             0, 0, mode->hdisplay, mode->vdisplay,
 541                             crtc->x, crtc->y, mode->hdisplay, mode->vdisplay);
 542         omap_crtc_flush(crtc);
 543         drm_modeset_unlock(&crtc->mutex);
 544
 545         bo = omap_framebuffer_bo(crtc->primary->fb, 0);
 546         drm_gem_object_unreference_unlocked(bo);
 547         drm_framebuffer_unreference(crtc->primary->fb);
 548 }
 549
 550 static void page_flip_cb(void *arg)
 551 {
 552         struct drm_crtc *crtc = arg;
 553         struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
 554         struct omap_drm_private *priv = crtc->dev->dev_private;
 555
 556         /* avoid assumptions about what ctxt we are called from: */
 557         queue_work(priv->wq, &omap_crtc->flip_work);
 558 }
 559
 560 static int omap_crtc_page_flip(struct drm_crtc *crtc,
 561                                struct drm_framebuffer *fb,
 562                                struct drm_pending_vblank_event *event,
 563                                uint32_t page_flip_flags)
 564 {
 565         struct drm_device *dev = crtc->dev;
 566         struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
 567         struct drm_plane *primary = crtc->primary;
 568         struct drm_gem_object *bo;
 569         unsigned long flags;
 570
 571         DBG("%d -> %d (event=%p)", primary->fb ? primary->fb->base.id : -1,
 572                         fb->base.id, event);
 573
 574         spin_lock_irqsave(&dev->event_lock, flags);
 575
 576         if (omap_crtc->flip_pending) {
 577                 spin_unlock_irqrestore(&dev->event_lock, flags);
 578                 dev_err(dev->dev, "already a pending flip\n");
 579                 return -EBUSY;
 580         }
 581
 582         omap_crtc->flip_event = event;
 583         omap_crtc->flip_pending = true;
 584         primary->fb = fb;
 585         drm_framebuffer_reference(fb);
 586
 587         spin_unlock_irqrestore(&dev->event_lock, flags);
 588
 589         /*
 590          * Hold a reference temporarily until the crtc is updated
 591          * and takes the reference to the bo.  This avoids it
 592          * getting freed from under us:
 593          */
 594         bo = omap_framebuffer_bo(fb, 0);
 595         drm_gem_object_reference(bo);
 596
 597         omap_gem_op_async(bo, OMAP_GEM_READ, page_flip_cb, crtc);
 598
 599         return 0;
 600 }
 601
 602 static int omap_crtc_set_property(struct drm_crtc *crtc,
 603                 struct drm_property *property, uint64_t val)
 604 {
 605         if (property == crtc->dev->mode_config.rotation_property) {
 606                 crtc->invert_dimensions =
 607                                 !!(val & ((1LL << DRM_ROTATE_90) | (1LL << DRM_ROTATE_270)));
 608         }
 609
 610         return omap_plane_set_property(crtc->primary, property, val);
 611 }
 612
 613 static const struct drm_crtc_funcs omap_crtc_funcs = {
 614         .set_config = drm_crtc_helper_set_config,
 615         .destroy = omap_crtc_destroy,
 616         .page_flip = omap_crtc_page_flip,
 617         .set_property = omap_crtc_set_property,
 618 };
 619
 620 static const struct drm_crtc_helper_funcs omap_crtc_helper_funcs = {
 621         .dpms = omap_crtc_dpms,
 622         .mode_fixup = omap_crtc_mode_fixup,
 623         .mode_set = omap_crtc_mode_set,
 624         .prepare = omap_crtc_prepare,
 625         .commit = omap_crtc_commit,
 626         .mode_set_base = omap_crtc_mode_set_base,
 627 };
 628
 629 /* -----------------------------------------------------------------------------
 630  * Init and Cleanup
 631  */
 632
 633 static const char *channel_names[] = {
 634         [OMAP_DSS_CHANNEL_LCD] = "lcd",
 635         [OMAP_DSS_CHANNEL_DIGIT] = "tv",
 636         [OMAP_DSS_CHANNEL_LCD2] = "lcd2",
 637         [OMAP_DSS_CHANNEL_LCD3] = "lcd3",
 638 };
 639
 640 void omap_crtc_pre_init(void)
 641 {
 642         dss_install_mgr_ops(&mgr_ops);
 643 }
 644
 645 void omap_crtc_pre_uninit(void)
 646 {
 647         dss_uninstall_mgr_ops();
 648 }
 649
 650 /* initialize crtc */
 651 struct drm_crtc *omap_crtc_init(struct drm_device *dev,
 652                 struct drm_plane *plane, enum omap_channel channel, int id)
 653 {
 654         struct drm_crtc *crtc = NULL;
 655         struct omap_crtc *omap_crtc;
 656         struct omap_overlay_manager_info *info;
 657         int ret;
 658
 659         DBG("%s", channel_names[channel]);
 660
 661         omap_crtc = kzalloc(sizeof(*omap_crtc), GFP_KERNEL);
 662         if (!omap_crtc)
 663                 return NULL;
 664
 665         crtc = &omap_crtc->base;
 666
 667         INIT_WORK(&omap_crtc->flip_work, page_flip_worker);
 668
 669         INIT_LIST_HEAD(&omap_crtc->pending_unpins);
 670
 671         init_completion(&omap_crtc->completion);
 672
 673         omap_crtc->channel = channel;
 674         omap_crtc->name = channel_names[channel];
 675         omap_crtc->pipe = id;
 676
 677         omap_crtc->vblank_irq.irqmask = pipe2vbl(crtc);
 678         omap_crtc->vblank_irq.irq = omap_crtc_vblank_irq;
 679
 680         omap_crtc->error_irq.irqmask =
 681                         dispc_mgr_get_sync_lost_irq(channel);
 682         omap_crtc->error_irq.irq = omap_crtc_error_irq;
 683         omap_irq_register(dev, &omap_crtc->error_irq);
 684
 685         /* temporary: */
 686         omap_crtc->mgr = omap_dss_get_overlay_manager(channel);
 687
 688         /* TODO: fix hard-coded setup.. add properties! */
 689         info = &omap_crtc->info;
 690         info->default_color = 0x00000000;
 691         info->trans_key = 0x00000000;
 692         info->trans_key_type = OMAP_DSS_COLOR_KEY_GFX_DST;
 693         info->trans_enabled = false;
 694
 695         ret = drm_crtc_init_with_planes(dev, crtc, plane, NULL,
 696                                         &omap_crtc_funcs);
 697         if (ret < 0) {
 698                 kfree(omap_crtc);
 699                 return NULL;
 700         }
 701
 702         drm_crtc_helper_add(crtc, &omap_crtc_helper_funcs);
 703
 704         omap_plane_install_properties(crtc->primary, &crtc->base);
 705
 706         omap_crtcs[channel] = omap_crtc;
 707
 708         return crtc;
 709 }