2 * drivers/gpu/drm/omapdrm/omap_drv.c
4 * Copyright (C) 2011 Texas Instruments
5 * Author: Rob Clark <rob@ti.com>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
20 #include <linux/wait.h>
22 #include <drm/drm_atomic.h>
23 #include <drm/drm_atomic_helper.h>
24 #include <drm/drm_crtc_helper.h>
25 #include <drm/drm_fb_helper.h>
27 #include "omap_dmm_tiler.h"
30 #define DRIVER_NAME MODULE_NAME
31 #define DRIVER_DESC "OMAP DRM"
32 #define DRIVER_DATE "20110917"
33 #define DRIVER_MAJOR 1
34 #define DRIVER_MINOR 0
35 #define DRIVER_PATCHLEVEL 0
37 static int num_crtc = CONFIG_DRM_OMAP_NUM_CRTCS;
39 MODULE_PARM_DESC(num_crtc, "Number of overlays to use as CRTCs");
40 module_param(num_crtc, int, 0600);
46 /* Notes about mapping DSS and DRM entities:
48 * encoder: manager.. with some extension to allow one primary CRTC
49 * and zero or more video CRTC's to be mapped to one encoder?
50 * connector: dssdev.. manager can be attached/detached from different
54 static void omap_fb_output_poll_changed(struct drm_device *dev)
56 struct omap_drm_private *priv = dev->dev_private;
59 drm_fb_helper_hotplug_event(priv->fbdev);
62 struct omap_atomic_state_commit {
63 struct work_struct work;
64 struct drm_device *dev;
65 struct drm_atomic_state *state;
69 static void omap_atomic_complete(struct omap_atomic_state_commit *commit)
71 struct drm_device *dev = commit->dev;
72 struct omap_drm_private *priv = dev->dev_private;
73 struct drm_atomic_state *old_state = commit->state;
75 /* Apply the atomic update. */
76 drm_atomic_helper_commit_modeset_disables(dev, old_state);
77 drm_atomic_helper_commit_planes(dev, old_state);
78 drm_atomic_helper_commit_modeset_enables(dev, old_state);
80 drm_atomic_helper_wait_for_vblanks(dev, old_state);
82 drm_atomic_helper_cleanup_planes(dev, old_state);
84 drm_atomic_state_free(old_state);
86 /* Complete the commit, wake up any waiter. */
87 spin_lock(&priv->commit.lock);
88 priv->commit.pending &= ~commit->crtcs;
89 spin_unlock(&priv->commit.lock);
91 wake_up_all(&priv->commit.wait);
96 static void omap_atomic_work(struct work_struct *work)
98 struct omap_atomic_state_commit *commit =
99 container_of(work, struct omap_atomic_state_commit, work);
101 omap_atomic_complete(commit);
104 static bool omap_atomic_is_pending(struct omap_drm_private *priv,
105 struct omap_atomic_state_commit *commit)
109 spin_lock(&priv->commit.lock);
110 pending = priv->commit.pending & commit->crtcs;
111 spin_unlock(&priv->commit.lock);
116 static int omap_atomic_commit(struct drm_device *dev,
117 struct drm_atomic_state *state, bool async)
119 struct omap_drm_private *priv = dev->dev_private;
120 struct omap_atomic_state_commit *commit;
125 ret = drm_atomic_helper_prepare_planes(dev, state);
129 /* Allocate the commit object. */
130 commit = kzalloc(sizeof(*commit), GFP_KERNEL);
131 if (commit == NULL) {
136 INIT_WORK(&commit->work, omap_atomic_work);
138 commit->state = state;
140 /* Wait until all affected CRTCs have completed previous commits and
141 * mark them as pending.
143 for (i = 0; i < dev->mode_config.num_crtc; ++i) {
145 commit->crtcs |= 1 << drm_crtc_index(state->crtcs[i]);
148 wait_event(priv->commit.wait, !omap_atomic_is_pending(priv, commit));
150 spin_lock(&priv->commit.lock);
151 priv->commit.pending |= commit->crtcs;
152 spin_unlock(&priv->commit.lock);
154 /* Keep track of all CRTC events to unlink them in preclose(). */
155 spin_lock_irqsave(&dev->event_lock, flags);
156 for (i = 0; i < dev->mode_config.num_crtc; ++i) {
157 struct drm_crtc_state *cstate = state->crtc_states[i];
159 if (cstate && cstate->event)
160 list_add_tail(&cstate->event->base.link,
161 &priv->commit.events);
163 spin_unlock_irqrestore(&dev->event_lock, flags);
165 /* Swap the state, this is the point of no return. */
166 drm_atomic_helper_swap_state(dev, state);
169 schedule_work(&commit->work);
171 omap_atomic_complete(commit);
176 drm_atomic_helper_cleanup_planes(dev, state);
180 static const struct drm_mode_config_funcs omap_mode_config_funcs = {
181 .fb_create = omap_framebuffer_create,
182 .output_poll_changed = omap_fb_output_poll_changed,
183 .atomic_check = drm_atomic_helper_check,
184 .atomic_commit = omap_atomic_commit,
187 static int get_connector_type(struct omap_dss_device *dssdev)
189 switch (dssdev->type) {
190 case OMAP_DISPLAY_TYPE_HDMI:
191 return DRM_MODE_CONNECTOR_HDMIA;
192 case OMAP_DISPLAY_TYPE_DVI:
193 return DRM_MODE_CONNECTOR_DVID;
195 return DRM_MODE_CONNECTOR_Unknown;
199 static bool channel_used(struct drm_device *dev, enum omap_channel channel)
201 struct omap_drm_private *priv = dev->dev_private;
204 for (i = 0; i < priv->num_crtcs; i++) {
205 struct drm_crtc *crtc = priv->crtcs[i];
207 if (omap_crtc_channel(crtc) == channel)
213 static void omap_disconnect_dssdevs(void)
215 struct omap_dss_device *dssdev = NULL;
217 for_each_dss_dev(dssdev)
218 dssdev->driver->disconnect(dssdev);
221 static int omap_connect_dssdevs(void)
224 struct omap_dss_device *dssdev = NULL;
225 bool no_displays = true;
227 for_each_dss_dev(dssdev) {
228 r = dssdev->driver->connect(dssdev);
229 if (r == -EPROBE_DEFER) {
230 omap_dss_put_device(dssdev);
233 dev_warn(dssdev->dev, "could not connect display: %s\n",
241 return -EPROBE_DEFER;
247 * if we are deferring probe, we disconnect the devices we previously
250 omap_disconnect_dssdevs();
255 static int omap_modeset_create_crtc(struct drm_device *dev, int id,
256 enum omap_channel channel)
258 struct omap_drm_private *priv = dev->dev_private;
259 struct drm_plane *plane;
260 struct drm_crtc *crtc;
262 plane = omap_plane_init(dev, id, DRM_PLANE_TYPE_PRIMARY);
264 return PTR_ERR(plane);
266 crtc = omap_crtc_init(dev, plane, channel, id);
268 BUG_ON(priv->num_crtcs >= ARRAY_SIZE(priv->crtcs));
269 priv->crtcs[id] = crtc;
272 priv->planes[id] = plane;
278 static int omap_modeset_init_properties(struct drm_device *dev)
280 struct omap_drm_private *priv = dev->dev_private;
283 dev->mode_config.rotation_property =
284 drm_mode_create_rotation_property(dev,
285 BIT(DRM_ROTATE_0) | BIT(DRM_ROTATE_90) |
286 BIT(DRM_ROTATE_180) | BIT(DRM_ROTATE_270) |
287 BIT(DRM_REFLECT_X) | BIT(DRM_REFLECT_Y));
288 if (!dev->mode_config.rotation_property)
292 priv->zorder_prop = drm_property_create_range(dev, 0, "zorder", 0, 3);
293 if (!priv->zorder_prop)
299 static int omap_modeset_init(struct drm_device *dev)
301 struct omap_drm_private *priv = dev->dev_private;
302 struct omap_dss_device *dssdev = NULL;
303 int num_ovls = dss_feat_get_num_ovls();
304 int num_mgrs = dss_feat_get_num_mgrs();
309 drm_mode_config_init(dev);
311 omap_drm_irq_install(dev);
313 ret = omap_modeset_init_properties(dev);
318 * We usually don't want to create a CRTC for each manager, at least
319 * not until we have a way to expose private planes to userspace.
320 * Otherwise there would not be enough video pipes left for drm planes.
321 * We use the num_crtc argument to limit the number of crtcs we create.
323 num_crtcs = min3(num_crtc, num_mgrs, num_ovls);
327 for_each_dss_dev(dssdev) {
328 struct drm_connector *connector;
329 struct drm_encoder *encoder;
330 enum omap_channel channel;
331 struct omap_overlay_manager *mgr;
333 if (!omapdss_device_is_connected(dssdev))
336 encoder = omap_encoder_init(dev, dssdev);
339 dev_err(dev->dev, "could not create encoder: %s\n",
344 connector = omap_connector_init(dev,
345 get_connector_type(dssdev), dssdev, encoder);
348 dev_err(dev->dev, "could not create connector: %s\n",
353 BUG_ON(priv->num_encoders >= ARRAY_SIZE(priv->encoders));
354 BUG_ON(priv->num_connectors >= ARRAY_SIZE(priv->connectors));
356 priv->encoders[priv->num_encoders++] = encoder;
357 priv->connectors[priv->num_connectors++] = connector;
359 drm_mode_connector_attach_encoder(connector, encoder);
362 * if we have reached the limit of the crtcs we are allowed to
363 * create, let's not try to look for a crtc for this
364 * panel/encoder and onwards, we will, of course, populate the
365 * the possible_crtcs field for all the encoders with the final
366 * set of crtcs we create
372 * get the recommended DISPC channel for this encoder. For now,
373 * we only try to get create a crtc out of the recommended, the
374 * other possible channels to which the encoder can connect are
378 mgr = omapdss_find_mgr_from_display(dssdev);
381 * if this channel hasn't already been taken by a previously
382 * allocated crtc, we create a new crtc for it
384 if (!channel_used(dev, channel)) {
385 ret = omap_modeset_create_crtc(dev, id, channel);
388 "could not create CRTC (channel %u)\n",
398 * we have allocated crtcs according to the need of the panels/encoders,
399 * adding more crtcs here if needed
401 for (; id < num_crtcs; id++) {
403 /* find a free manager for this crtc */
404 for (i = 0; i < num_mgrs; i++) {
405 if (!channel_used(dev, i))
410 /* this shouldn't really happen */
411 dev_err(dev->dev, "no managers left for crtc\n");
415 ret = omap_modeset_create_crtc(dev, id, i);
418 "could not create CRTC (channel %u)\n", i);
424 * Create normal planes for the remaining overlays:
426 for (; id < num_ovls; id++) {
427 struct drm_plane *plane;
429 plane = omap_plane_init(dev, id, DRM_PLANE_TYPE_OVERLAY);
431 return PTR_ERR(plane);
433 BUG_ON(priv->num_planes >= ARRAY_SIZE(priv->planes));
434 priv->planes[priv->num_planes++] = plane;
437 for (i = 0; i < priv->num_encoders; i++) {
438 struct drm_encoder *encoder = priv->encoders[i];
439 struct omap_dss_device *dssdev =
440 omap_encoder_get_dssdev(encoder);
441 struct omap_dss_device *output;
443 output = omapdss_find_output_from_display(dssdev);
445 /* figure out which crtc's we can connect the encoder to: */
446 encoder->possible_crtcs = 0;
447 for (id = 0; id < priv->num_crtcs; id++) {
448 struct drm_crtc *crtc = priv->crtcs[id];
449 enum omap_channel crtc_channel;
451 crtc_channel = omap_crtc_channel(crtc);
453 if (output->dispc_channel == crtc_channel) {
454 encoder->possible_crtcs |= (1 << id);
459 omap_dss_put_device(output);
462 DBG("registered %d planes, %d crtcs, %d encoders and %d connectors\n",
463 priv->num_planes, priv->num_crtcs, priv->num_encoders,
464 priv->num_connectors);
466 dev->mode_config.min_width = 32;
467 dev->mode_config.min_height = 32;
469 /* note: eventually will need some cpu_is_omapXYZ() type stuff here
470 * to fill in these limits properly on different OMAP generations..
472 dev->mode_config.max_width = 2048;
473 dev->mode_config.max_height = 2048;
475 dev->mode_config.funcs = &omap_mode_config_funcs;
477 drm_mode_config_reset(dev);
482 static void omap_modeset_free(struct drm_device *dev)
484 drm_mode_config_cleanup(dev);
492 static int ioctl_get_param(struct drm_device *dev, void *data,
493 struct drm_file *file_priv)
495 struct omap_drm_private *priv = dev->dev_private;
496 struct drm_omap_param *args = data;
498 DBG("%p: param=%llu", dev, args->param);
500 switch (args->param) {
501 case OMAP_PARAM_CHIPSET_ID:
502 args->value = priv->omaprev;
505 DBG("unknown parameter %lld", args->param);
512 static int ioctl_set_param(struct drm_device *dev, void *data,
513 struct drm_file *file_priv)
515 struct drm_omap_param *args = data;
517 switch (args->param) {
519 DBG("unknown parameter %lld", args->param);
526 static int ioctl_gem_new(struct drm_device *dev, void *data,
527 struct drm_file *file_priv)
529 struct drm_omap_gem_new *args = data;
530 VERB("%p:%p: size=0x%08x, flags=%08x", dev, file_priv,
531 args->size.bytes, args->flags);
532 return omap_gem_new_handle(dev, file_priv, args->size,
533 args->flags, &args->handle);
536 static int ioctl_gem_cpu_prep(struct drm_device *dev, void *data,
537 struct drm_file *file_priv)
539 struct drm_omap_gem_cpu_prep *args = data;
540 struct drm_gem_object *obj;
543 VERB("%p:%p: handle=%d, op=%x", dev, file_priv, args->handle, args->op);
545 obj = drm_gem_object_lookup(dev, file_priv, args->handle);
549 ret = omap_gem_op_sync(obj, args->op);
552 ret = omap_gem_op_start(obj, args->op);
554 drm_gem_object_unreference_unlocked(obj);
559 static int ioctl_gem_cpu_fini(struct drm_device *dev, void *data,
560 struct drm_file *file_priv)
562 struct drm_omap_gem_cpu_fini *args = data;
563 struct drm_gem_object *obj;
566 VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
568 obj = drm_gem_object_lookup(dev, file_priv, args->handle);
572 /* XXX flushy, flushy */
576 ret = omap_gem_op_finish(obj, args->op);
578 drm_gem_object_unreference_unlocked(obj);
583 static int ioctl_gem_info(struct drm_device *dev, void *data,
584 struct drm_file *file_priv)
586 struct drm_omap_gem_info *args = data;
587 struct drm_gem_object *obj;
590 VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
592 obj = drm_gem_object_lookup(dev, file_priv, args->handle);
596 args->size = omap_gem_mmap_size(obj);
597 args->offset = omap_gem_mmap_offset(obj);
599 drm_gem_object_unreference_unlocked(obj);
604 static const struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
605 DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param, DRM_UNLOCKED|DRM_AUTH),
606 DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, ioctl_set_param, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
607 DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new, DRM_UNLOCKED|DRM_AUTH),
608 DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, ioctl_gem_cpu_prep, DRM_UNLOCKED|DRM_AUTH),
609 DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, ioctl_gem_cpu_fini, DRM_UNLOCKED|DRM_AUTH),
610 DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info, DRM_UNLOCKED|DRM_AUTH),
618 * load - setup chip and create an initial config
620 * @flags: startup flags
622 * The driver load routine has to do several things:
623 * - initialize the memory manager
624 * - allocate initial config memory
625 * - setup the DRM framebuffer with the allocated memory
627 static int dev_load(struct drm_device *dev, unsigned long flags)
629 struct omap_drm_platform_data *pdata = dev->dev->platform_data;
630 struct omap_drm_private *priv;
634 DBG("load: dev=%p", dev);
636 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
640 priv->omaprev = pdata->omaprev;
642 dev->dev_private = priv;
644 priv->wq = alloc_ordered_workqueue("omapdrm", 0);
645 init_waitqueue_head(&priv->commit.wait);
646 spin_lock_init(&priv->commit.lock);
647 INIT_LIST_HEAD(&priv->commit.events);
649 spin_lock_init(&priv->list_lock);
650 INIT_LIST_HEAD(&priv->obj_list);
654 ret = omap_modeset_init(dev);
656 dev_err(dev->dev, "omap_modeset_init failed: ret=%d\n", ret);
657 dev->dev_private = NULL;
662 /* Initialize vblank handling, start with all CRTCs disabled. */
663 ret = drm_vblank_init(dev, priv->num_crtcs);
665 dev_warn(dev->dev, "could not init vblank\n");
667 for (i = 0; i < priv->num_crtcs; i++)
668 drm_crtc_vblank_off(priv->crtcs[i]);
670 priv->fbdev = omap_fbdev_init(dev);
672 dev_warn(dev->dev, "omap_fbdev_init failed\n");
673 /* well, limp along without an fbdev.. maybe X11 will work? */
676 /* store off drm_device for use in pm ops */
677 dev_set_drvdata(dev->dev, dev);
679 drm_kms_helper_poll_init(dev);
684 static int dev_unload(struct drm_device *dev)
686 struct omap_drm_private *priv = dev->dev_private;
688 DBG("unload: dev=%p", dev);
690 drm_kms_helper_poll_fini(dev);
693 omap_fbdev_free(dev);
695 omap_modeset_free(dev);
696 omap_gem_deinit(dev);
698 destroy_workqueue(priv->wq);
700 drm_vblank_cleanup(dev);
701 omap_drm_irq_uninstall(dev);
703 kfree(dev->dev_private);
704 dev->dev_private = NULL;
706 dev_set_drvdata(dev->dev, NULL);
711 static int dev_open(struct drm_device *dev, struct drm_file *file)
713 file->driver_priv = NULL;
715 DBG("open: dev=%p, file=%p", dev, file);
721 * lastclose - clean up after all DRM clients have exited
724 * Take care of cleaning up after all DRM clients have exited. In the
725 * mode setting case, we want to restore the kernel's initial mode (just
726 * in case the last client left us in a bad state).
728 static void dev_lastclose(struct drm_device *dev)
732 /* we don't support vga-switcheroo.. so just make sure the fbdev
735 struct omap_drm_private *priv = dev->dev_private;
738 DBG("lastclose: dev=%p", dev);
740 if (dev->mode_config.rotation_property) {
741 /* need to restore default rotation state.. not sure
742 * if there is a cleaner way to restore properties to
743 * default state? Maybe a flag that properties should
744 * automatically be restored to default state on
747 for (i = 0; i < priv->num_crtcs; i++) {
748 drm_object_property_set_value(&priv->crtcs[i]->base,
749 dev->mode_config.rotation_property, 0);
752 for (i = 0; i < priv->num_planes; i++) {
753 drm_object_property_set_value(&priv->planes[i]->base,
754 dev->mode_config.rotation_property, 0);
759 ret = drm_fb_helper_restore_fbdev_mode_unlocked(priv->fbdev);
761 DBG("failed to restore crtc mode");
765 static void dev_preclose(struct drm_device *dev, struct drm_file *file)
767 struct omap_drm_private *priv = dev->dev_private;
768 struct drm_pending_event *event;
771 DBG("preclose: dev=%p", dev);
774 * Unlink all pending CRTC events to make sure they won't be queued up
775 * by a pending asynchronous commit.
777 spin_lock_irqsave(&dev->event_lock, flags);
778 list_for_each_entry(event, &priv->commit.events, link) {
779 if (event->file_priv == file) {
780 file->event_space += event->event->length;
781 event->file_priv = NULL;
784 spin_unlock_irqrestore(&dev->event_lock, flags);
787 static void dev_postclose(struct drm_device *dev, struct drm_file *file)
789 DBG("postclose: dev=%p, file=%p", dev, file);
792 static const struct vm_operations_struct omap_gem_vm_ops = {
793 .fault = omap_gem_fault,
794 .open = drm_gem_vm_open,
795 .close = drm_gem_vm_close,
798 static const struct file_operations omapdriver_fops = {
799 .owner = THIS_MODULE,
801 .unlocked_ioctl = drm_ioctl,
802 .release = drm_release,
803 .mmap = omap_gem_mmap,
806 .llseek = noop_llseek,
809 static struct drm_driver omap_drm_driver = {
810 .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME,
812 .unload = dev_unload,
814 .lastclose = dev_lastclose,
815 .preclose = dev_preclose,
816 .postclose = dev_postclose,
817 .set_busid = drm_platform_set_busid,
818 .get_vblank_counter = drm_vblank_count,
819 .enable_vblank = omap_irq_enable_vblank,
820 .disable_vblank = omap_irq_disable_vblank,
821 #ifdef CONFIG_DEBUG_FS
822 .debugfs_init = omap_debugfs_init,
823 .debugfs_cleanup = omap_debugfs_cleanup,
825 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
826 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
827 .gem_prime_export = omap_gem_prime_export,
828 .gem_prime_import = omap_gem_prime_import,
829 .gem_free_object = omap_gem_free_object,
830 .gem_vm_ops = &omap_gem_vm_ops,
831 .dumb_create = omap_gem_dumb_create,
832 .dumb_map_offset = omap_gem_dumb_map_offset,
833 .dumb_destroy = drm_gem_dumb_destroy,
835 .num_ioctls = DRM_OMAP_NUM_IOCTLS,
836 .fops = &omapdriver_fops,
840 .major = DRIVER_MAJOR,
841 .minor = DRIVER_MINOR,
842 .patchlevel = DRIVER_PATCHLEVEL,
845 static int pdev_probe(struct platform_device *device)
849 if (omapdss_is_initialized() == false)
850 return -EPROBE_DEFER;
852 omap_crtc_pre_init();
854 r = omap_connect_dssdevs();
856 omap_crtc_pre_uninit();
860 DBG("%s", device->name);
861 return drm_platform_init(&omap_drm_driver, device);
864 static int pdev_remove(struct platform_device *device)
868 drm_put_dev(platform_get_drvdata(device));
870 omap_disconnect_dssdevs();
871 omap_crtc_pre_uninit();
876 #ifdef CONFIG_PM_SLEEP
877 static int omap_drm_suspend(struct device *dev)
879 struct drm_device *drm_dev = dev_get_drvdata(dev);
881 drm_kms_helper_poll_disable(drm_dev);
886 static int omap_drm_resume(struct device *dev)
888 struct drm_device *drm_dev = dev_get_drvdata(dev);
890 drm_kms_helper_poll_enable(drm_dev);
892 return omap_gem_resume(dev);
896 static SIMPLE_DEV_PM_OPS(omapdrm_pm_ops, omap_drm_suspend, omap_drm_resume);
898 static struct platform_driver pdev = {
901 .pm = &omapdrm_pm_ops,
904 .remove = pdev_remove,
907 static int __init omap_drm_init(void)
913 r = platform_driver_register(&omap_dmm_driver);
915 pr_err("DMM driver registration failed\n");
919 r = platform_driver_register(&pdev);
921 pr_err("omapdrm driver registration failed\n");
922 platform_driver_unregister(&omap_dmm_driver);
929 static void __exit omap_drm_fini(void)
933 platform_driver_unregister(&pdev);
935 platform_driver_unregister(&omap_dmm_driver);
938 /* need late_initcall() so we load after dss_driver's are loaded */
939 late_initcall(omap_drm_init);
940 module_exit(omap_drm_fini);
942 MODULE_AUTHOR("Rob Clark <rob@ti.com>");
943 MODULE_DESCRIPTION("OMAP DRM Display Driver");
944 MODULE_ALIAS("platform:" DRIVER_NAME);
945 MODULE_LICENSE("GPL v2");