drivers/gpu/drm/omapdrm/omap_drv.c

   1 /*
   2  * drivers/gpu/drm/omapdrm/omap_drv.c
   3  *
   4  * Copyright (C) 2011 Texas Instruments
   5  * Author: Rob Clark <rob@ti.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify it
   8  * under the terms of the GNU General Public License version 2 as published by
   9  * the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful, but WITHOUT
  12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14  * more details.
  15  *
  16  * You should have received a copy of the GNU General Public License along with
  17  * this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include <linux/wait.h>
  21
  22 #include <drm/drm_atomic.h>
  23 #include <drm/drm_atomic_helper.h>
  24 #include <drm/drm_crtc_helper.h>
  25 #include <drm/drm_fb_helper.h>
  26
  27 #include "omap_dmm_tiler.h"
  28 #include "omap_drv.h"
  29
  30 #define DRIVER_NAME             MODULE_NAME
  31 #define DRIVER_DESC             "OMAP DRM"
  32 #define DRIVER_DATE             "20110917"
  33 #define DRIVER_MAJOR            1
  34 #define DRIVER_MINOR            0
  35 #define DRIVER_PATCHLEVEL       0
  36
  37 static int num_crtc = CONFIG_DRM_OMAP_NUM_CRTCS;
  38
  39 MODULE_PARM_DESC(num_crtc, "Number of overlays to use as CRTCs");
  40 module_param(num_crtc, int, 0600);
  41
  42 /*
  43  * mode config funcs
  44  */
  45
  46 /* Notes about mapping DSS and DRM entities:
  47  *    CRTC:        overlay
  48  *    encoder:     manager.. with some extension to allow one primary CRTC
  49  *                 and zero or more video CRTC's to be mapped to one encoder?
  50  *    connector:   dssdev.. manager can be attached/detached from different
  51  *                 devices
  52  */
  53
  54 static void omap_fb_output_poll_changed(struct drm_device *dev)
  55 {
  56         struct omap_drm_private *priv = dev->dev_private;
  57         DBG("dev=%p", dev);
  58         if (priv->fbdev)
  59                 drm_fb_helper_hotplug_event(priv->fbdev);
  60 }
  61
  62 struct omap_atomic_state_commit {
  63         struct work_struct work;
  64         struct drm_device *dev;
  65         struct drm_atomic_state *state;
  66         u32 crtcs;
  67 };
  68
  69 static void omap_atomic_wait_for_completion(struct drm_device *dev,
  70                                             struct drm_atomic_state *old_state)
  71 {
  72         struct drm_crtc_state *old_crtc_state;
  73         struct drm_crtc *crtc;
  74         unsigned int i;
  75         int ret;
  76
  77         for_each_crtc_in_state(old_state, crtc, old_crtc_state, i) {
  78                 if (!crtc->state->enable)
  79                         continue;
  80
  81                 ret = omap_crtc_wait_pending(crtc);
  82
  83                 if (!ret)
  84                         dev_warn(dev->dev,
  85                                  "atomic complete timeout (pipe %u)!\n", i);
  86         }
  87 }
  88
  89 static void omap_atomic_complete(struct omap_atomic_state_commit *commit)
  90 {
  91         struct drm_device *dev = commit->dev;
  92         struct omap_drm_private *priv = dev->dev_private;
  93         struct drm_atomic_state *old_state = commit->state;
  94
  95         /* Apply the atomic update. */
  96         dispc_runtime_get();
  97
  98         drm_atomic_helper_commit_modeset_disables(dev, old_state);
  99         drm_atomic_helper_commit_planes(dev, old_state, false);
 100         drm_atomic_helper_commit_modeset_enables(dev, old_state);
 101
 102         omap_atomic_wait_for_completion(dev, old_state);
 103
 104         drm_atomic_helper_cleanup_planes(dev, old_state);
 105
 106         dispc_runtime_put();
 107
 108         drm_atomic_state_free(old_state);
 109
 110         /* Complete the commit, wake up any waiter. */
 111         spin_lock(&priv->commit.lock);
 112         priv->commit.pending &= ~commit->crtcs;
 113         spin_unlock(&priv->commit.lock);
 114
 115         wake_up_all(&priv->commit.wait);
 116
 117         kfree(commit);
 118 }
 119
 120 static void omap_atomic_work(struct work_struct *work)
 121 {
 122         struct omap_atomic_state_commit *commit =
 123                 container_of(work, struct omap_atomic_state_commit, work);
 124
 125         omap_atomic_complete(commit);
 126 }
 127
 128 static bool omap_atomic_is_pending(struct omap_drm_private *priv,
 129                                    struct omap_atomic_state_commit *commit)
 130 {
 131         bool pending;
 132
 133         spin_lock(&priv->commit.lock);
 134         pending = priv->commit.pending & commit->crtcs;
 135         spin_unlock(&priv->commit.lock);
 136
 137         return pending;
 138 }
 139
 140 static int omap_atomic_commit(struct drm_device *dev,
 141                               struct drm_atomic_state *state, bool async)
 142 {
 143         struct omap_drm_private *priv = dev->dev_private;
 144         struct omap_atomic_state_commit *commit;
 145         unsigned int i;
 146         int ret;
 147
 148         ret = drm_atomic_helper_prepare_planes(dev, state);
 149         if (ret)
 150                 return ret;
 151
 152         /* Allocate the commit object. */
 153         commit = kzalloc(sizeof(*commit), GFP_KERNEL);
 154         if (commit == NULL) {
 155                 ret = -ENOMEM;
 156                 goto error;
 157         }
 158
 159         INIT_WORK(&commit->work, omap_atomic_work);
 160         commit->dev = dev;
 161         commit->state = state;
 162
 163         /* Wait until all affected CRTCs have completed previous commits and
 164          * mark them as pending.
 165          */
 166         for (i = 0; i < dev->mode_config.num_crtc; ++i) {
 167                 if (state->crtcs[i])
 168                         commit->crtcs |= 1 << drm_crtc_index(state->crtcs[i]);
 169         }
 170
 171         wait_event(priv->commit.wait, !omap_atomic_is_pending(priv, commit));
 172
 173         spin_lock(&priv->commit.lock);
 174         priv->commit.pending |= commit->crtcs;
 175         spin_unlock(&priv->commit.lock);
 176
 177         /* Swap the state, this is the point of no return. */
 178         drm_atomic_helper_swap_state(dev, state);
 179
 180         if (async)
 181                 schedule_work(&commit->work);
 182         else
 183                 omap_atomic_complete(commit);
 184
 185         return 0;
 186
 187 error:
 188         drm_atomic_helper_cleanup_planes(dev, state);
 189         return ret;
 190 }
 191
 192 static const struct drm_mode_config_funcs omap_mode_config_funcs = {
 193         .fb_create = omap_framebuffer_create,
 194         .output_poll_changed = omap_fb_output_poll_changed,
 195         .atomic_check = drm_atomic_helper_check,
 196         .atomic_commit = omap_atomic_commit,
 197 };
 198
 199 static int get_connector_type(struct omap_dss_device *dssdev)
 200 {
 201         switch (dssdev->type) {
 202         case OMAP_DISPLAY_TYPE_HDMI:
 203                 return DRM_MODE_CONNECTOR_HDMIA;
 204         case OMAP_DISPLAY_TYPE_DVI:
 205                 return DRM_MODE_CONNECTOR_DVID;
 206         default:
 207                 return DRM_MODE_CONNECTOR_Unknown;
 208         }
 209 }
 210
 211 static bool channel_used(struct drm_device *dev, enum omap_channel channel)
 212 {
 213         struct omap_drm_private *priv = dev->dev_private;
 214         int i;
 215
 216         for (i = 0; i < priv->num_crtcs; i++) {
 217                 struct drm_crtc *crtc = priv->crtcs[i];
 218
 219                 if (omap_crtc_channel(crtc) == channel)
 220                         return true;
 221         }
 222
 223         return false;
 224 }
 225 static void omap_disconnect_dssdevs(void)
 226 {
 227         struct omap_dss_device *dssdev = NULL;
 228
 229         for_each_dss_dev(dssdev)
 230                 dssdev->driver->disconnect(dssdev);
 231 }
 232
 233 static int omap_connect_dssdevs(void)
 234 {
 235         int r;
 236         struct omap_dss_device *dssdev = NULL;
 237         bool no_displays = true;
 238
 239         for_each_dss_dev(dssdev) {
 240                 r = dssdev->driver->connect(dssdev);
 241                 if (r == -EPROBE_DEFER) {
 242                         omap_dss_put_device(dssdev);
 243                         goto cleanup;
 244                 } else if (r) {
 245                         dev_warn(dssdev->dev, "could not connect display: %s\n",
 246                                 dssdev->name);
 247                 } else {
 248                         no_displays = false;
 249                 }
 250         }
 251
 252         if (no_displays)
 253                 return -EPROBE_DEFER;
 254
 255         return 0;
 256
 257 cleanup:
 258         /*
 259          * if we are deferring probe, we disconnect the devices we previously
 260          * connected
 261          */
 262         omap_disconnect_dssdevs();
 263
 264         return r;
 265 }
 266
 267 static int omap_modeset_create_crtc(struct drm_device *dev, int id,
 268                                     enum omap_channel channel)
 269 {
 270         struct omap_drm_private *priv = dev->dev_private;
 271         struct drm_plane *plane;
 272         struct drm_crtc *crtc;
 273
 274         plane = omap_plane_init(dev, id, DRM_PLANE_TYPE_PRIMARY);
 275         if (IS_ERR(plane))
 276                 return PTR_ERR(plane);
 277
 278         crtc = omap_crtc_init(dev, plane, channel, id);
 279
 280         BUG_ON(priv->num_crtcs >= ARRAY_SIZE(priv->crtcs));
 281         priv->crtcs[id] = crtc;
 282         priv->num_crtcs++;
 283
 284         priv->planes[id] = plane;
 285         priv->num_planes++;
 286
 287         return 0;
 288 }
 289
 290 static int omap_modeset_init_properties(struct drm_device *dev)
 291 {
 292         struct omap_drm_private *priv = dev->dev_private;
 293
 294         if (priv->has_dmm) {
 295                 dev->mode_config.rotation_property =
 296                         drm_mode_create_rotation_property(dev,
 297                                 BIT(DRM_ROTATE_0) | BIT(DRM_ROTATE_90) |
 298                                 BIT(DRM_ROTATE_180) | BIT(DRM_ROTATE_270) |
 299                                 BIT(DRM_REFLECT_X) | BIT(DRM_REFLECT_Y));
 300                 if (!dev->mode_config.rotation_property)
 301                         return -ENOMEM;
 302         }
 303
 304         priv->zorder_prop = drm_property_create_range(dev, 0, "zorder", 0, 3);
 305         if (!priv->zorder_prop)
 306                 return -ENOMEM;
 307
 308         return 0;
 309 }
 310
 311 static int omap_modeset_init(struct drm_device *dev)
 312 {
 313         struct omap_drm_private *priv = dev->dev_private;
 314         struct omap_dss_device *dssdev = NULL;
 315         int num_ovls = dss_feat_get_num_ovls();
 316         int num_mgrs = dss_feat_get_num_mgrs();
 317         int num_crtcs;
 318         int i, id = 0;
 319         int ret;
 320
 321         drm_mode_config_init(dev);
 322
 323         omap_drm_irq_install(dev);
 324
 325         ret = omap_modeset_init_properties(dev);
 326         if (ret < 0)
 327                 return ret;
 328
 329         /*
 330          * We usually don't want to create a CRTC for each manager, at least
 331          * not until we have a way to expose private planes to userspace.
 332          * Otherwise there would not be enough video pipes left for drm planes.
 333          * We use the num_crtc argument to limit the number of crtcs we create.
 334          */
 335         num_crtcs = min3(num_crtc, num_mgrs, num_ovls);
 336
 337         dssdev = NULL;
 338
 339         for_each_dss_dev(dssdev) {
 340                 struct drm_connector *connector;
 341                 struct drm_encoder *encoder;
 342                 enum omap_channel channel;
 343                 struct omap_overlay_manager *mgr;
 344
 345                 if (!omapdss_device_is_connected(dssdev))
 346                         continue;
 347
 348                 encoder = omap_encoder_init(dev, dssdev);
 349
 350                 if (!encoder) {
 351                         dev_err(dev->dev, "could not create encoder: %s\n",
 352                                         dssdev->name);
 353                         return -ENOMEM;
 354                 }
 355
 356                 connector = omap_connector_init(dev,
 357                                 get_connector_type(dssdev), dssdev, encoder);
 358
 359                 if (!connector) {
 360                         dev_err(dev->dev, "could not create connector: %s\n",
 361                                         dssdev->name);
 362                         return -ENOMEM;
 363                 }
 364
 365                 BUG_ON(priv->num_encoders >= ARRAY_SIZE(priv->encoders));
 366                 BUG_ON(priv->num_connectors >= ARRAY_SIZE(priv->connectors));
 367
 368                 priv->encoders[priv->num_encoders++] = encoder;
 369                 priv->connectors[priv->num_connectors++] = connector;
 370
 371                 drm_mode_connector_attach_encoder(connector, encoder);
 372
 373                 /*
 374                  * if we have reached the limit of the crtcs we are allowed to
 375                  * create, let's not try to look for a crtc for this
 376                  * panel/encoder and onwards, we will, of course, populate the
 377                  * the possible_crtcs field for all the encoders with the final
 378                  * set of crtcs we create
 379                  */
 380                 if (id == num_crtcs)
 381                         continue;
 382
 383                 /*
 384                  * get the recommended DISPC channel for this encoder. For now,
 385                  * we only try to get create a crtc out of the recommended, the
 386                  * other possible channels to which the encoder can connect are
 387                  * not considered.
 388                  */
 389
 390                 mgr = omapdss_find_mgr_from_display(dssdev);
 391                 channel = mgr->id;
 392                 /*
 393                  * if this channel hasn't already been taken by a previously
 394                  * allocated crtc, we create a new crtc for it
 395                  */
 396                 if (!channel_used(dev, channel)) {
 397                         ret = omap_modeset_create_crtc(dev, id, channel);
 398                         if (ret < 0) {
 399                                 dev_err(dev->dev,
 400                                         "could not create CRTC (channel %u)\n",
 401                                         channel);
 402                                 return ret;
 403                         }
 404
 405                         id++;
 406                 }
 407         }
 408
 409         /*
 410          * we have allocated crtcs according to the need of the panels/encoders,
 411          * adding more crtcs here if needed
 412          */
 413         for (; id < num_crtcs; id++) {
 414
 415                 /* find a free manager for this crtc */
 416                 for (i = 0; i < num_mgrs; i++) {
 417                         if (!channel_used(dev, i))
 418                                 break;
 419                 }
 420
 421                 if (i == num_mgrs) {
 422                         /* this shouldn't really happen */
 423                         dev_err(dev->dev, "no managers left for crtc\n");
 424                         return -ENOMEM;
 425                 }
 426
 427                 ret = omap_modeset_create_crtc(dev, id, i);
 428                 if (ret < 0) {
 429                         dev_err(dev->dev,
 430                                 "could not create CRTC (channel %u)\n", i);
 431                         return ret;
 432                 }
 433         }
 434
 435         /*
 436          * Create normal planes for the remaining overlays:
 437          */
 438         for (; id < num_ovls; id++) {
 439                 struct drm_plane *plane;
 440
 441                 plane = omap_plane_init(dev, id, DRM_PLANE_TYPE_OVERLAY);
 442                 if (IS_ERR(plane))
 443                         return PTR_ERR(plane);
 444
 445                 BUG_ON(priv->num_planes >= ARRAY_SIZE(priv->planes));
 446                 priv->planes[priv->num_planes++] = plane;
 447         }
 448
 449         for (i = 0; i < priv->num_encoders; i++) {
 450                 struct drm_encoder *encoder = priv->encoders[i];
 451                 struct omap_dss_device *dssdev =
 452                                         omap_encoder_get_dssdev(encoder);
 453                 struct omap_dss_device *output;
 454
 455                 output = omapdss_find_output_from_display(dssdev);
 456
 457                 /* figure out which crtc's we can connect the encoder to: */
 458                 encoder->possible_crtcs = 0;
 459                 for (id = 0; id < priv->num_crtcs; id++) {
 460                         struct drm_crtc *crtc = priv->crtcs[id];
 461                         enum omap_channel crtc_channel;
 462
 463                         crtc_channel = omap_crtc_channel(crtc);
 464
 465                         if (output->dispc_channel == crtc_channel) {
 466                                 encoder->possible_crtcs |= (1 << id);
 467                                 break;
 468                         }
 469                 }
 470
 471                 omap_dss_put_device(output);
 472         }
 473
 474         DBG("registered %d planes, %d crtcs, %d encoders and %d connectors\n",
 475                 priv->num_planes, priv->num_crtcs, priv->num_encoders,
 476                 priv->num_connectors);
 477
 478         dev->mode_config.min_width = 32;
 479         dev->mode_config.min_height = 32;
 480
 481         /* note: eventually will need some cpu_is_omapXYZ() type stuff here
 482          * to fill in these limits properly on different OMAP generations..
 483          */
 484         dev->mode_config.max_width = 2048;
 485         dev->mode_config.max_height = 2048;
 486
 487         dev->mode_config.funcs = &omap_mode_config_funcs;
 488
 489         drm_mode_config_reset(dev);
 490
 491         return 0;
 492 }
 493
 494 static void omap_modeset_free(struct drm_device *dev)
 495 {
 496         drm_mode_config_cleanup(dev);
 497 }
 498
 499 /*
 500  * drm ioctl funcs
 501  */
 502
 503
 504 static int ioctl_get_param(struct drm_device *dev, void *data,
 505                 struct drm_file *file_priv)
 506 {
 507         struct omap_drm_private *priv = dev->dev_private;
 508         struct drm_omap_param *args = data;
 509
 510         DBG("%p: param=%llu", dev, args->param);
 511
 512         switch (args->param) {
 513         case OMAP_PARAM_CHIPSET_ID:
 514                 args->value = priv->omaprev;
 515                 break;
 516         default:
 517                 DBG("unknown parameter %lld", args->param);
 518                 return -EINVAL;
 519         }
 520
 521         return 0;
 522 }
 523
 524 static int ioctl_set_param(struct drm_device *dev, void *data,
 525                 struct drm_file *file_priv)
 526 {
 527         struct drm_omap_param *args = data;
 528
 529         switch (args->param) {
 530         default:
 531                 DBG("unknown parameter %lld", args->param);
 532                 return -EINVAL;
 533         }
 534
 535         return 0;
 536 }
 537
 538 #define OMAP_BO_USER_MASK       0x00ffffff      /* flags settable by userspace */
 539
 540 static int ioctl_gem_new(struct drm_device *dev, void *data,
 541                 struct drm_file *file_priv)
 542 {
 543         struct drm_omap_gem_new *args = data;
 544         u32 flags = args->flags & OMAP_BO_USER_MASK;
 545
 546         VERB("%p:%p: size=0x%08x, flags=%08x", dev, file_priv,
 547              args->size.bytes, flags);
 548
 549         return omap_gem_new_handle(dev, file_priv, args->size, flags,
 550                                    &args->handle);
 551 }
 552
 553 static int ioctl_gem_cpu_prep(struct drm_device *dev, void *data,
 554                 struct drm_file *file_priv)
 555 {
 556         struct drm_omap_gem_cpu_prep *args = data;
 557         struct drm_gem_object *obj;
 558         int ret;
 559
 560         VERB("%p:%p: handle=%d, op=%x", dev, file_priv, args->handle, args->op);
 561
 562         obj = drm_gem_object_lookup(dev, file_priv, args->handle);
 563         if (!obj)
 564                 return -ENOENT;
 565
 566         ret = omap_gem_op_sync(obj, args->op);
 567
 568         if (!ret)
 569                 ret = omap_gem_op_start(obj, args->op);
 570
 571         drm_gem_object_unreference_unlocked(obj);
 572
 573         return ret;
 574 }
 575
 576 static int ioctl_gem_cpu_fini(struct drm_device *dev, void *data,
 577                 struct drm_file *file_priv)
 578 {
 579         struct drm_omap_gem_cpu_fini *args = data;
 580         struct drm_gem_object *obj;
 581         int ret;
 582
 583         VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
 584
 585         obj = drm_gem_object_lookup(dev, file_priv, args->handle);
 586         if (!obj)
 587                 return -ENOENT;
 588
 589         /* XXX flushy, flushy */
 590         ret = 0;
 591
 592         if (!ret)
 593                 ret = omap_gem_op_finish(obj, args->op);
 594
 595         drm_gem_object_unreference_unlocked(obj);
 596
 597         return ret;
 598 }
 599
 600 static int ioctl_gem_info(struct drm_device *dev, void *data,
 601                 struct drm_file *file_priv)
 602 {
 603         struct drm_omap_gem_info *args = data;
 604         struct drm_gem_object *obj;
 605         int ret = 0;
 606
 607         VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
 608
 609         obj = drm_gem_object_lookup(dev, file_priv, args->handle);
 610         if (!obj)
 611                 return -ENOENT;
 612
 613         args->size = omap_gem_mmap_size(obj);
 614         args->offset = omap_gem_mmap_offset(obj);
 615
 616         drm_gem_object_unreference_unlocked(obj);
 617
 618         return ret;
 619 }
 620
 621 static const struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
 622         DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param, DRM_AUTH),
 623         DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, ioctl_set_param, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
 624         DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new, DRM_AUTH),
 625         DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, ioctl_gem_cpu_prep, DRM_AUTH),
 626         DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, ioctl_gem_cpu_fini, DRM_AUTH),
 627         DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info, DRM_AUTH),
 628 };
 629
 630 /*
 631  * drm driver funcs
 632  */
 633
 634 /**
 635  * load - setup chip and create an initial config
 636  * @dev: DRM device
 637  * @flags: startup flags
 638  *
 639  * The driver load routine has to do several things:
 640  *   - initialize the memory manager
 641  *   - allocate initial config memory
 642  *   - setup the DRM framebuffer with the allocated memory
 643  */
 644 static int dev_load(struct drm_device *dev, unsigned long flags)
 645 {
 646         struct omap_drm_platform_data *pdata = dev->dev->platform_data;
 647         struct omap_drm_private *priv;
 648         unsigned int i;
 649         int ret;
 650
 651         DBG("load: dev=%p", dev);
 652
 653         priv = kzalloc(sizeof(*priv), GFP_KERNEL);
 654         if (!priv)
 655                 return -ENOMEM;
 656
 657         priv->omaprev = pdata->omaprev;
 658
 659         dev->dev_private = priv;
 660
 661         priv->wq = alloc_ordered_workqueue("omapdrm", 0);
 662         init_waitqueue_head(&priv->commit.wait);
 663         spin_lock_init(&priv->commit.lock);
 664
 665         spin_lock_init(&priv->list_lock);
 666         INIT_LIST_HEAD(&priv->obj_list);
 667
 668         omap_gem_init(dev);
 669
 670         ret = omap_modeset_init(dev);
 671         if (ret) {
 672                 dev_err(dev->dev, "omap_modeset_init failed: ret=%d\n", ret);
 673                 dev->dev_private = NULL;
 674                 kfree(priv);
 675                 return ret;
 676         }
 677
 678         /* Initialize vblank handling, start with all CRTCs disabled. */
 679         ret = drm_vblank_init(dev, priv->num_crtcs);
 680         if (ret)
 681                 dev_warn(dev->dev, "could not init vblank\n");
 682
 683         for (i = 0; i < priv->num_crtcs; i++)
 684                 drm_crtc_vblank_off(priv->crtcs[i]);
 685
 686         priv->fbdev = omap_fbdev_init(dev);
 687
 688         /* store off drm_device for use in pm ops */
 689         dev_set_drvdata(dev->dev, dev);
 690
 691         drm_kms_helper_poll_init(dev);
 692
 693         return 0;
 694 }
 695
 696 static int dev_unload(struct drm_device *dev)
 697 {
 698         struct omap_drm_private *priv = dev->dev_private;
 699
 700         DBG("unload: dev=%p", dev);
 701
 702         drm_kms_helper_poll_fini(dev);
 703
 704         if (priv->fbdev)
 705                 omap_fbdev_free(dev);
 706
 707         omap_modeset_free(dev);
 708         omap_gem_deinit(dev);
 709
 710         destroy_workqueue(priv->wq);
 711
 712         drm_vblank_cleanup(dev);
 713         omap_drm_irq_uninstall(dev);
 714
 715         kfree(dev->dev_private);
 716         dev->dev_private = NULL;
 717
 718         dev_set_drvdata(dev->dev, NULL);
 719
 720         return 0;
 721 }
 722
 723 static int dev_open(struct drm_device *dev, struct drm_file *file)
 724 {
 725         file->driver_priv = NULL;
 726
 727         DBG("open: dev=%p, file=%p", dev, file);
 728
 729         return 0;
 730 }
 731
 732 /**
 733  * lastclose - clean up after all DRM clients have exited
 734  * @dev: DRM device
 735  *
 736  * Take care of cleaning up after all DRM clients have exited.  In the
 737  * mode setting case, we want to restore the kernel's initial mode (just
 738  * in case the last client left us in a bad state).
 739  */
 740 static void dev_lastclose(struct drm_device *dev)
 741 {
 742         int i;
 743
 744         /* we don't support vga_switcheroo.. so just make sure the fbdev
 745          * mode is active
 746          */
 747         struct omap_drm_private *priv = dev->dev_private;
 748         int ret;
 749
 750         DBG("lastclose: dev=%p", dev);
 751
 752         if (dev->mode_config.rotation_property) {
 753                 /* need to restore default rotation state.. not sure
 754                  * if there is a cleaner way to restore properties to
 755                  * default state?  Maybe a flag that properties should
 756                  * automatically be restored to default state on
 757                  * lastclose?
 758                  */
 759                 for (i = 0; i < priv->num_crtcs; i++) {
 760                         drm_object_property_set_value(&priv->crtcs[i]->base,
 761                                         dev->mode_config.rotation_property, 0);
 762                 }
 763
 764                 for (i = 0; i < priv->num_planes; i++) {
 765                         drm_object_property_set_value(&priv->planes[i]->base,
 766                                         dev->mode_config.rotation_property, 0);
 767                 }
 768         }
 769
 770         if (priv->fbdev) {
 771                 ret = drm_fb_helper_restore_fbdev_mode_unlocked(priv->fbdev);
 772                 if (ret)
 773                         DBG("failed to restore crtc mode");
 774         }
 775 }
 776
 777 static const struct vm_operations_struct omap_gem_vm_ops = {
 778         .fault = omap_gem_fault,
 779         .open = drm_gem_vm_open,
 780         .close = drm_gem_vm_close,
 781 };
 782
 783 static const struct file_operations omapdriver_fops = {
 784         .owner = THIS_MODULE,
 785         .open = drm_open,
 786         .unlocked_ioctl = drm_ioctl,
 787         .release = drm_release,
 788         .mmap = omap_gem_mmap,
 789         .poll = drm_poll,
 790         .read = drm_read,
 791         .llseek = noop_llseek,
 792 };
 793
 794 static struct drm_driver omap_drm_driver = {
 795         .driver_features = DRIVER_MODESET | DRIVER_GEM  | DRIVER_PRIME |
 796                 DRIVER_ATOMIC,
 797         .load = dev_load,
 798         .unload = dev_unload,
 799         .open = dev_open,
 800         .lastclose = dev_lastclose,
 801         .set_busid = drm_platform_set_busid,
 802         .get_vblank_counter = drm_vblank_no_hw_counter,
 803         .enable_vblank = omap_irq_enable_vblank,
 804         .disable_vblank = omap_irq_disable_vblank,
 805 #ifdef CONFIG_DEBUG_FS
 806         .debugfs_init = omap_debugfs_init,
 807         .debugfs_cleanup = omap_debugfs_cleanup,
 808 #endif
 809         .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
 810         .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
 811         .gem_prime_export = omap_gem_prime_export,
 812         .gem_prime_import = omap_gem_prime_import,
 813         .gem_free_object = omap_gem_free_object,
 814         .gem_vm_ops = &omap_gem_vm_ops,
 815         .dumb_create = omap_gem_dumb_create,
 816         .dumb_map_offset = omap_gem_dumb_map_offset,
 817         .dumb_destroy = drm_gem_dumb_destroy,
 818         .ioctls = ioctls,
 819         .num_ioctls = DRM_OMAP_NUM_IOCTLS,
 820         .fops = &omapdriver_fops,
 821         .name = DRIVER_NAME,
 822         .desc = DRIVER_DESC,
 823         .date = DRIVER_DATE,
 824         .major = DRIVER_MAJOR,
 825         .minor = DRIVER_MINOR,
 826         .patchlevel = DRIVER_PATCHLEVEL,
 827 };
 828
 829 static int pdev_probe(struct platform_device *device)
 830 {
 831         int r;
 832
 833         if (omapdss_is_initialized() == false)
 834                 return -EPROBE_DEFER;
 835
 836         omap_crtc_pre_init();
 837
 838         r = omap_connect_dssdevs();
 839         if (r) {
 840                 omap_crtc_pre_uninit();
 841                 return r;
 842         }
 843
 844         DBG("%s", device->name);
 845         return drm_platform_init(&omap_drm_driver, device);
 846 }
 847
 848 static int pdev_remove(struct platform_device *device)
 849 {
 850         DBG("");
 851
 852         drm_put_dev(platform_get_drvdata(device));
 853
 854         omap_disconnect_dssdevs();
 855         omap_crtc_pre_uninit();
 856
 857         return 0;
 858 }
 859
 860 #ifdef CONFIG_PM_SLEEP
 861 static int omap_drm_suspend(struct device *dev)
 862 {
 863         struct drm_device *drm_dev = dev_get_drvdata(dev);
 864
 865         drm_kms_helper_poll_disable(drm_dev);
 866
 867         return 0;
 868 }
 869
 870 static int omap_drm_resume(struct device *dev)
 871 {
 872         struct drm_device *drm_dev = dev_get_drvdata(dev);
 873
 874         drm_kms_helper_poll_enable(drm_dev);
 875
 876         return omap_gem_resume(dev);
 877 }
 878 #endif
 879
 880 static SIMPLE_DEV_PM_OPS(omapdrm_pm_ops, omap_drm_suspend, omap_drm_resume);
 881
 882 static struct platform_driver pdev = {
 883         .driver = {
 884                 .name = DRIVER_NAME,
 885                 .pm = &omapdrm_pm_ops,
 886         },
 887         .probe = pdev_probe,
 888         .remove = pdev_remove,
 889 };
 890
 891 static struct platform_driver * const drivers[] = {
 892         &omap_dmm_driver,
 893         &pdev,
 894 };
 895
 896 static int __init omap_drm_init(void)
 897 {
 898         DBG("init");
 899
 900         return platform_register_drivers(drivers, ARRAY_SIZE(drivers));
 901 }
 902
 903 static void __exit omap_drm_fini(void)
 904 {
 905         DBG("fini");
 906
 907         platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
 908 }
 909
 910 /* need late_initcall() so we load after dss_driver's are loaded */
 911 late_initcall(omap_drm_init);
 912 module_exit(omap_drm_fini);
 913
 914 MODULE_AUTHOR("Rob Clark <rob@ti.com>");
 915 MODULE_DESCRIPTION("OMAP DRM Display Driver");
 916 MODULE_ALIAS("platform:" DRIVER_NAME);
 917 MODULE_LICENSE("GPL v2");