2 * drivers/gpu/drm/omapdrm/omap_drv.c
4 * Copyright (C) 2011 Texas Instruments
5 * Author: Rob Clark <rob@ti.com>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
22 #include "drm_crtc_helper.h"
23 #include "drm_fb_helper.h"
24 #include "omap_dmm_tiler.h"
26 #define DRIVER_NAME MODULE_NAME
27 #define DRIVER_DESC "OMAP DRM"
28 #define DRIVER_DATE "20110917"
29 #define DRIVER_MAJOR 1
30 #define DRIVER_MINOR 0
31 #define DRIVER_PATCHLEVEL 0
33 static int num_crtc = CONFIG_DRM_OMAP_NUM_CRTCS;
35 MODULE_PARM_DESC(num_crtc, "Number of overlays to use as CRTCs");
36 module_param(num_crtc, int, 0600);
42 /* Notes about mapping DSS and DRM entities:
44 * encoder: manager.. with some extension to allow one primary CRTC
45 * and zero or more video CRTC's to be mapped to one encoder?
46 * connector: dssdev.. manager can be attached/detached from different
50 static void omap_fb_output_poll_changed(struct drm_device *dev)
52 struct omap_drm_private *priv = dev->dev_private;
55 drm_fb_helper_hotplug_event(priv->fbdev);
58 static const struct drm_mode_config_funcs omap_mode_config_funcs = {
59 .fb_create = omap_framebuffer_create,
60 .output_poll_changed = omap_fb_output_poll_changed,
63 static int get_connector_type(struct omap_dss_device *dssdev)
65 switch (dssdev->type) {
66 case OMAP_DISPLAY_TYPE_HDMI:
67 return DRM_MODE_CONNECTOR_HDMIA;
68 case OMAP_DISPLAY_TYPE_DVI:
69 return DRM_MODE_CONNECTOR_DVID;
71 return DRM_MODE_CONNECTOR_Unknown;
75 static bool channel_used(struct drm_device *dev, enum omap_channel channel)
77 struct omap_drm_private *priv = dev->dev_private;
80 for (i = 0; i < priv->num_crtcs; i++) {
81 struct drm_crtc *crtc = priv->crtcs[i];
83 if (omap_crtc_channel(crtc) == channel)
89 static void omap_disconnect_dssdevs(void)
91 struct omap_dss_device *dssdev = NULL;
93 for_each_dss_dev(dssdev)
94 dssdev->driver->disconnect(dssdev);
97 static int omap_connect_dssdevs(void)
100 struct omap_dss_device *dssdev = NULL;
101 bool no_displays = true;
103 for_each_dss_dev(dssdev) {
104 r = dssdev->driver->connect(dssdev);
105 if (r == -EPROBE_DEFER) {
106 omap_dss_put_device(dssdev);
109 dev_warn(dssdev->dev, "could not connect display: %s\n",
117 return -EPROBE_DEFER;
123 * if we are deferring probe, we disconnect the devices we previously
126 omap_disconnect_dssdevs();
131 static int omap_modeset_create_crtc(struct drm_device *dev, int id,
132 enum omap_channel channel)
134 struct omap_drm_private *priv = dev->dev_private;
135 struct drm_plane *plane;
136 struct drm_crtc *crtc;
138 plane = omap_plane_init(dev, id, DRM_PLANE_TYPE_PRIMARY);
140 return PTR_ERR(plane);
142 crtc = omap_crtc_init(dev, plane, channel, id);
144 BUG_ON(priv->num_crtcs >= ARRAY_SIZE(priv->crtcs));
145 priv->crtcs[id] = crtc;
148 priv->planes[id] = plane;
154 static int omap_modeset_init_properties(struct drm_device *dev)
156 struct omap_drm_private *priv = dev->dev_private;
159 dev->mode_config.rotation_property =
160 drm_mode_create_rotation_property(dev,
161 BIT(DRM_ROTATE_0) | BIT(DRM_ROTATE_90) |
162 BIT(DRM_ROTATE_180) | BIT(DRM_ROTATE_270) |
163 BIT(DRM_REFLECT_X) | BIT(DRM_REFLECT_Y));
164 if (!dev->mode_config.rotation_property)
168 priv->zorder_prop = drm_property_create_range(dev, 0, "zorder", 0, 3);
169 if (!priv->zorder_prop)
175 static int omap_modeset_init(struct drm_device *dev)
177 struct omap_drm_private *priv = dev->dev_private;
178 struct omap_dss_device *dssdev = NULL;
179 int num_ovls = dss_feat_get_num_ovls();
180 int num_mgrs = dss_feat_get_num_mgrs();
185 drm_mode_config_init(dev);
187 omap_drm_irq_install(dev);
189 ret = omap_modeset_init_properties(dev);
194 * We usually don't want to create a CRTC for each manager, at least
195 * not until we have a way to expose private planes to userspace.
196 * Otherwise there would not be enough video pipes left for drm planes.
197 * We use the num_crtc argument to limit the number of crtcs we create.
199 num_crtcs = min3(num_crtc, num_mgrs, num_ovls);
203 for_each_dss_dev(dssdev) {
204 struct drm_connector *connector;
205 struct drm_encoder *encoder;
206 enum omap_channel channel;
207 struct omap_overlay_manager *mgr;
209 if (!omapdss_device_is_connected(dssdev))
212 encoder = omap_encoder_init(dev, dssdev);
215 dev_err(dev->dev, "could not create encoder: %s\n",
220 connector = omap_connector_init(dev,
221 get_connector_type(dssdev), dssdev, encoder);
224 dev_err(dev->dev, "could not create connector: %s\n",
229 BUG_ON(priv->num_encoders >= ARRAY_SIZE(priv->encoders));
230 BUG_ON(priv->num_connectors >= ARRAY_SIZE(priv->connectors));
232 priv->encoders[priv->num_encoders++] = encoder;
233 priv->connectors[priv->num_connectors++] = connector;
235 drm_mode_connector_attach_encoder(connector, encoder);
238 * if we have reached the limit of the crtcs we are allowed to
239 * create, let's not try to look for a crtc for this
240 * panel/encoder and onwards, we will, of course, populate the
241 * the possible_crtcs field for all the encoders with the final
242 * set of crtcs we create
248 * get the recommended DISPC channel for this encoder. For now,
249 * we only try to get create a crtc out of the recommended, the
250 * other possible channels to which the encoder can connect are
254 mgr = omapdss_find_mgr_from_display(dssdev);
257 * if this channel hasn't already been taken by a previously
258 * allocated crtc, we create a new crtc for it
260 if (!channel_used(dev, channel)) {
261 ret = omap_modeset_create_crtc(dev, id, channel);
264 "could not create CRTC (channel %u)\n",
274 * we have allocated crtcs according to the need of the panels/encoders,
275 * adding more crtcs here if needed
277 for (; id < num_crtcs; id++) {
279 /* find a free manager for this crtc */
280 for (i = 0; i < num_mgrs; i++) {
281 if (!channel_used(dev, i))
286 /* this shouldn't really happen */
287 dev_err(dev->dev, "no managers left for crtc\n");
291 ret = omap_modeset_create_crtc(dev, id, i);
294 "could not create CRTC (channel %u)\n", i);
300 * Create normal planes for the remaining overlays:
302 for (; id < num_ovls; id++) {
303 struct drm_plane *plane;
305 plane = omap_plane_init(dev, id, DRM_PLANE_TYPE_OVERLAY);
307 return PTR_ERR(plane);
309 BUG_ON(priv->num_planes >= ARRAY_SIZE(priv->planes));
310 priv->planes[priv->num_planes++] = plane;
313 for (i = 0; i < priv->num_encoders; i++) {
314 struct drm_encoder *encoder = priv->encoders[i];
315 struct omap_dss_device *dssdev =
316 omap_encoder_get_dssdev(encoder);
317 struct omap_dss_device *output;
319 output = omapdss_find_output_from_display(dssdev);
321 /* figure out which crtc's we can connect the encoder to: */
322 encoder->possible_crtcs = 0;
323 for (id = 0; id < priv->num_crtcs; id++) {
324 struct drm_crtc *crtc = priv->crtcs[id];
325 enum omap_channel crtc_channel;
327 crtc_channel = omap_crtc_channel(crtc);
329 if (output->dispc_channel == crtc_channel) {
330 encoder->possible_crtcs |= (1 << id);
335 omap_dss_put_device(output);
338 DBG("registered %d planes, %d crtcs, %d encoders and %d connectors\n",
339 priv->num_planes, priv->num_crtcs, priv->num_encoders,
340 priv->num_connectors);
342 dev->mode_config.min_width = 32;
343 dev->mode_config.min_height = 32;
345 /* note: eventually will need some cpu_is_omapXYZ() type stuff here
346 * to fill in these limits properly on different OMAP generations..
348 dev->mode_config.max_width = 2048;
349 dev->mode_config.max_height = 2048;
351 dev->mode_config.funcs = &omap_mode_config_funcs;
356 static void omap_modeset_free(struct drm_device *dev)
358 drm_mode_config_cleanup(dev);
366 static int ioctl_get_param(struct drm_device *dev, void *data,
367 struct drm_file *file_priv)
369 struct omap_drm_private *priv = dev->dev_private;
370 struct drm_omap_param *args = data;
372 DBG("%p: param=%llu", dev, args->param);
374 switch (args->param) {
375 case OMAP_PARAM_CHIPSET_ID:
376 args->value = priv->omaprev;
379 DBG("unknown parameter %lld", args->param);
386 static int ioctl_set_param(struct drm_device *dev, void *data,
387 struct drm_file *file_priv)
389 struct drm_omap_param *args = data;
391 switch (args->param) {
393 DBG("unknown parameter %lld", args->param);
400 static int ioctl_gem_new(struct drm_device *dev, void *data,
401 struct drm_file *file_priv)
403 struct drm_omap_gem_new *args = data;
404 VERB("%p:%p: size=0x%08x, flags=%08x", dev, file_priv,
405 args->size.bytes, args->flags);
406 return omap_gem_new_handle(dev, file_priv, args->size,
407 args->flags, &args->handle);
410 static int ioctl_gem_cpu_prep(struct drm_device *dev, void *data,
411 struct drm_file *file_priv)
413 struct drm_omap_gem_cpu_prep *args = data;
414 struct drm_gem_object *obj;
417 VERB("%p:%p: handle=%d, op=%x", dev, file_priv, args->handle, args->op);
419 obj = drm_gem_object_lookup(dev, file_priv, args->handle);
423 ret = omap_gem_op_sync(obj, args->op);
426 ret = omap_gem_op_start(obj, args->op);
428 drm_gem_object_unreference_unlocked(obj);
433 static int ioctl_gem_cpu_fini(struct drm_device *dev, void *data,
434 struct drm_file *file_priv)
436 struct drm_omap_gem_cpu_fini *args = data;
437 struct drm_gem_object *obj;
440 VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
442 obj = drm_gem_object_lookup(dev, file_priv, args->handle);
446 /* XXX flushy, flushy */
450 ret = omap_gem_op_finish(obj, args->op);
452 drm_gem_object_unreference_unlocked(obj);
457 static int ioctl_gem_info(struct drm_device *dev, void *data,
458 struct drm_file *file_priv)
460 struct drm_omap_gem_info *args = data;
461 struct drm_gem_object *obj;
464 VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
466 obj = drm_gem_object_lookup(dev, file_priv, args->handle);
470 args->size = omap_gem_mmap_size(obj);
471 args->offset = omap_gem_mmap_offset(obj);
473 drm_gem_object_unreference_unlocked(obj);
478 static const struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
479 DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param, DRM_UNLOCKED|DRM_AUTH),
480 DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, ioctl_set_param, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
481 DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new, DRM_UNLOCKED|DRM_AUTH),
482 DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, ioctl_gem_cpu_prep, DRM_UNLOCKED|DRM_AUTH),
483 DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, ioctl_gem_cpu_fini, DRM_UNLOCKED|DRM_AUTH),
484 DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info, DRM_UNLOCKED|DRM_AUTH),
492 * load - setup chip and create an initial config
494 * @flags: startup flags
496 * The driver load routine has to do several things:
497 * - initialize the memory manager
498 * - allocate initial config memory
499 * - setup the DRM framebuffer with the allocated memory
501 static int dev_load(struct drm_device *dev, unsigned long flags)
503 struct omap_drm_platform_data *pdata = dev->dev->platform_data;
504 struct omap_drm_private *priv;
508 DBG("load: dev=%p", dev);
510 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
514 priv->omaprev = pdata->omaprev;
516 dev->dev_private = priv;
518 priv->wq = alloc_ordered_workqueue("omapdrm", 0);
520 spin_lock_init(&priv->list_lock);
521 INIT_LIST_HEAD(&priv->obj_list);
525 ret = omap_modeset_init(dev);
527 dev_err(dev->dev, "omap_modeset_init failed: ret=%d\n", ret);
528 dev->dev_private = NULL;
533 /* Initialize vblank handling, start with all CRTCs disabled. */
534 ret = drm_vblank_init(dev, priv->num_crtcs);
536 dev_warn(dev->dev, "could not init vblank\n");
538 for (i = 0; i < priv->num_crtcs; i++)
539 drm_crtc_vblank_off(priv->crtcs[i]);
541 priv->fbdev = omap_fbdev_init(dev);
543 dev_warn(dev->dev, "omap_fbdev_init failed\n");
544 /* well, limp along without an fbdev.. maybe X11 will work? */
547 /* store off drm_device for use in pm ops */
548 dev_set_drvdata(dev->dev, dev);
550 drm_kms_helper_poll_init(dev);
555 static int dev_unload(struct drm_device *dev)
557 struct omap_drm_private *priv = dev->dev_private;
559 DBG("unload: dev=%p", dev);
561 drm_kms_helper_poll_fini(dev);
564 omap_fbdev_free(dev);
566 omap_modeset_free(dev);
567 omap_gem_deinit(dev);
569 destroy_workqueue(priv->wq);
571 drm_vblank_cleanup(dev);
572 omap_drm_irq_uninstall(dev);
574 kfree(dev->dev_private);
575 dev->dev_private = NULL;
577 dev_set_drvdata(dev->dev, NULL);
582 static int dev_open(struct drm_device *dev, struct drm_file *file)
584 file->driver_priv = NULL;
586 DBG("open: dev=%p, file=%p", dev, file);
592 * lastclose - clean up after all DRM clients have exited
595 * Take care of cleaning up after all DRM clients have exited. In the
596 * mode setting case, we want to restore the kernel's initial mode (just
597 * in case the last client left us in a bad state).
599 static void dev_lastclose(struct drm_device *dev)
603 /* we don't support vga-switcheroo.. so just make sure the fbdev
606 struct omap_drm_private *priv = dev->dev_private;
609 DBG("lastclose: dev=%p", dev);
611 if (dev->mode_config.rotation_property) {
612 /* need to restore default rotation state.. not sure
613 * if there is a cleaner way to restore properties to
614 * default state? Maybe a flag that properties should
615 * automatically be restored to default state on
618 for (i = 0; i < priv->num_crtcs; i++) {
619 drm_object_property_set_value(&priv->crtcs[i]->base,
620 dev->mode_config.rotation_property, 0);
623 for (i = 0; i < priv->num_planes; i++) {
624 drm_object_property_set_value(&priv->planes[i]->base,
625 dev->mode_config.rotation_property, 0);
630 ret = drm_fb_helper_restore_fbdev_mode_unlocked(priv->fbdev);
632 DBG("failed to restore crtc mode");
636 static void dev_preclose(struct drm_device *dev, struct drm_file *file)
638 struct omap_drm_private *priv = dev->dev_private;
641 DBG("preclose: dev=%p", dev);
643 for (i = 0; i < priv->num_crtcs; ++i)
644 omap_crtc_cancel_page_flip(priv->crtcs[i], file);
647 static void dev_postclose(struct drm_device *dev, struct drm_file *file)
649 DBG("postclose: dev=%p, file=%p", dev, file);
652 static const struct vm_operations_struct omap_gem_vm_ops = {
653 .fault = omap_gem_fault,
654 .open = drm_gem_vm_open,
655 .close = drm_gem_vm_close,
658 static const struct file_operations omapdriver_fops = {
659 .owner = THIS_MODULE,
661 .unlocked_ioctl = drm_ioctl,
662 .release = drm_release,
663 .mmap = omap_gem_mmap,
666 .llseek = noop_llseek,
669 static struct drm_driver omap_drm_driver = {
670 .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME,
672 .unload = dev_unload,
674 .lastclose = dev_lastclose,
675 .preclose = dev_preclose,
676 .postclose = dev_postclose,
677 .set_busid = drm_platform_set_busid,
678 .get_vblank_counter = drm_vblank_count,
679 .enable_vblank = omap_irq_enable_vblank,
680 .disable_vblank = omap_irq_disable_vblank,
681 #ifdef CONFIG_DEBUG_FS
682 .debugfs_init = omap_debugfs_init,
683 .debugfs_cleanup = omap_debugfs_cleanup,
685 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
686 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
687 .gem_prime_export = omap_gem_prime_export,
688 .gem_prime_import = omap_gem_prime_import,
689 .gem_free_object = omap_gem_free_object,
690 .gem_vm_ops = &omap_gem_vm_ops,
691 .dumb_create = omap_gem_dumb_create,
692 .dumb_map_offset = omap_gem_dumb_map_offset,
693 .dumb_destroy = drm_gem_dumb_destroy,
695 .num_ioctls = DRM_OMAP_NUM_IOCTLS,
696 .fops = &omapdriver_fops,
700 .major = DRIVER_MAJOR,
701 .minor = DRIVER_MINOR,
702 .patchlevel = DRIVER_PATCHLEVEL,
705 static int pdev_probe(struct platform_device *device)
709 if (omapdss_is_initialized() == false)
710 return -EPROBE_DEFER;
712 omap_crtc_pre_init();
714 r = omap_connect_dssdevs();
716 omap_crtc_pre_uninit();
720 DBG("%s", device->name);
721 return drm_platform_init(&omap_drm_driver, device);
724 static int pdev_remove(struct platform_device *device)
728 drm_put_dev(platform_get_drvdata(device));
730 omap_disconnect_dssdevs();
731 omap_crtc_pre_uninit();
736 #ifdef CONFIG_PM_SLEEP
737 static int omap_drm_suspend(struct device *dev)
739 struct drm_device *drm_dev = dev_get_drvdata(dev);
741 drm_kms_helper_poll_disable(drm_dev);
746 static int omap_drm_resume(struct device *dev)
748 struct drm_device *drm_dev = dev_get_drvdata(dev);
750 drm_kms_helper_poll_enable(drm_dev);
752 return omap_gem_resume(dev);
756 static SIMPLE_DEV_PM_OPS(omapdrm_pm_ops, omap_drm_suspend, omap_drm_resume);
758 static struct platform_driver pdev = {
761 .pm = &omapdrm_pm_ops,
764 .remove = pdev_remove,
767 static int __init omap_drm_init(void)
773 r = platform_driver_register(&omap_dmm_driver);
775 pr_err("DMM driver registration failed\n");
779 r = platform_driver_register(&pdev);
781 pr_err("omapdrm driver registration failed\n");
782 platform_driver_unregister(&omap_dmm_driver);
789 static void __exit omap_drm_fini(void)
793 platform_driver_unregister(&pdev);
795 platform_driver_unregister(&omap_dmm_driver);
798 /* need late_initcall() so we load after dss_driver's are loaded */
799 late_initcall(omap_drm_init);
800 module_exit(omap_drm_fini);
802 MODULE_AUTHOR("Rob Clark <rob@ti.com>");
803 MODULE_DESCRIPTION("OMAP DRM Display Driver");
804 MODULE_ALIAS("platform:" DRIVER_NAME);
805 MODULE_LICENSE("GPL v2");