2 * Copyright 2011 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
22 * Authors: Alex Deucher
26 #include <drm/radeon_drm.h>
30 #define TARGET_HW_I2C_CLOCK 50
32 /* these are a limitation of ProcessI2cChannelTransaction not the hw */
33 #define ATOM_MAX_HW_I2C_WRITE 3
34 #define ATOM_MAX_HW_I2C_READ 255
36 static int radeon_process_i2c_ch(struct radeon_i2c_chan *chan,
37 u8 slave_addr, u8 flags,
40 struct drm_device *dev = chan->dev;
41 struct radeon_device *rdev = dev->dev_private;
42 PROCESS_I2C_CHANNEL_TRANSACTION_PS_ALLOCATION args;
43 int index = GetIndexIntoMasterTable(COMMAND, ProcessI2cChannelTransaction);
45 u16 out = cpu_to_le16(0);
48 memset(&args, 0, sizeof(args));
50 mutex_lock(&chan->mutex);
51 mutex_lock(&rdev->mode_info.atom_context->scratch_mutex);
53 base = (unsigned char *)rdev->mode_info.atom_context->scratch;
55 if (flags & HW_I2C_WRITE) {
56 if (num > ATOM_MAX_HW_I2C_WRITE) {
57 DRM_ERROR("hw i2c: tried to write too many bytes (%d vs 3)\n", num);
64 args.ucRegIndex = buf[0];
68 memcpy(&out, &buf[1], num);
69 args.lpI2CDataOut = cpu_to_le16(out);
71 if (num > ATOM_MAX_HW_I2C_READ) {
72 DRM_ERROR("hw i2c: tried to read too many bytes (%d vs 255)\n", num);
77 args.lpI2CDataOut = 0;
81 args.ucI2CSpeed = TARGET_HW_I2C_CLOCK;
82 args.ucTransBytes = num;
83 args.ucSlaveAddr = slave_addr << 1;
84 args.ucLineNumber = chan->rec.i2c_id;
86 atom_execute_table_scratch_unlocked(rdev->mode_info.atom_context, index, (uint32_t *)&args);
89 if (args.ucStatus != HW_ASSISTED_I2C_STATUS_SUCCESS) {
90 DRM_DEBUG_KMS("hw_i2c error\n");
95 if (!(flags & HW_I2C_WRITE))
96 radeon_atom_copy_swap(buf, base, num, false);
99 mutex_unlock(&rdev->mode_info.atom_context->scratch_mutex);
100 mutex_unlock(&chan->mutex);
105 int radeon_atom_hw_i2c_xfer(struct i2c_adapter *i2c_adap,
106 struct i2c_msg *msgs, int num)
108 struct radeon_i2c_chan *i2c = i2c_get_adapdata(i2c_adap);
110 int i, remaining, current_count, buffer_offset, max_bytes, ret;
113 /* check for bus probe */
115 if ((num == 1) && (p->len == 0)) {
116 ret = radeon_process_i2c_ch(i2c,
117 p->addr, HW_I2C_WRITE,
125 for (i = 0; i < num; i++) {
129 /* max_bytes are a limitation of ProcessI2cChannelTransaction not the hw */
130 if (p->flags & I2C_M_RD) {
131 max_bytes = ATOM_MAX_HW_I2C_READ;
134 max_bytes = ATOM_MAX_HW_I2C_WRITE;
135 flags = HW_I2C_WRITE;
138 if (remaining > max_bytes)
139 current_count = max_bytes;
141 current_count = remaining;
142 ret = radeon_process_i2c_ch(i2c,
144 &p->buf[buffer_offset], current_count);
147 remaining -= current_count;
148 buffer_offset += current_count;
155 u32 radeon_atom_hw_i2c_func(struct i2c_adapter *adap)
157 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;