2 * Copyright 2009 Jerome Glisse.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
16 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
17 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
18 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
19 * USE OR OTHER DEALINGS IN THE SOFTWARE.
21 * The above copyright notice and this permission notice (including the
22 * next paragraph) shall be included in all copies or substantial portions
28 * Jerome Glisse <glisse@freedesktop.org>
31 #include <linux/seq_file.h>
32 #include <linux/atomic.h>
33 #include <linux/wait.h>
34 #include <linux/list.h>
35 #include <linux/kref.h>
36 #include <linux/slab.h>
39 #include "radeon_reg.h"
41 #include "radeon_trace.h"
43 static void radeon_fence_write(struct radeon_device *rdev, u32 seq, int ring)
45 if (rdev->wb.enabled) {
46 *rdev->fence_drv[ring].cpu_addr = cpu_to_le32(seq);
48 WREG32(rdev->fence_drv[ring].scratch_reg, seq);
52 static u32 radeon_fence_read(struct radeon_device *rdev, int ring)
56 if (rdev->wb.enabled) {
57 seq = le32_to_cpu(*rdev->fence_drv[ring].cpu_addr);
59 seq = RREG32(rdev->fence_drv[ring].scratch_reg);
64 int radeon_fence_emit(struct radeon_device *rdev, struct radeon_fence *fence)
66 /* we are protected by the ring emission mutex */
67 if (fence->seq && fence->seq < RADEON_FENCE_NOTEMITED_SEQ) {
70 fence->seq = ++rdev->fence_drv[fence->ring].seq;
71 radeon_fence_ring_emit(rdev, fence->ring, fence);
72 trace_radeon_fence_emit(rdev->ddev, fence->seq);
76 void radeon_fence_process(struct radeon_device *rdev, int ring)
78 uint64_t seq, last_seq;
79 unsigned count_loop = 0;
82 /* Note there is a scenario here for an infinite loop but it's
83 * very unlikely to happen. For it to happen, the current polling
84 * process need to be interrupted by another process and another
85 * process needs to update the last_seq btw the atomic read and
86 * xchg of the current process.
88 * More over for this to go in infinite loop there need to be
89 * continuously new fence signaled ie radeon_fence_read needs
90 * to return a different value each time for both the currently
91 * polling process and the other process that xchg the last_seq
92 * btw atomic read and xchg of the current process. And the
93 * value the other process set as last seq must be higher than
94 * the seq value we just read. Which means that current process
95 * need to be interrupted after radeon_fence_read and before
98 * To be even more safe we count the number of time we loop and
99 * we bail after 10 loop just accepting the fact that we might
100 * have temporarly set the last_seq not to the true real last
101 * seq but to an older one.
103 last_seq = atomic64_read(&rdev->fence_drv[ring].last_seq);
105 seq = radeon_fence_read(rdev, ring);
106 seq |= last_seq & 0xffffffff00000000LL;
107 if (seq < last_seq) {
108 seq += 0x100000000LL;
111 if (seq == last_seq) {
114 /* If we loop over we don't want to return without
115 * checking if a fence is signaled as it means that the
116 * seq we just read is different from the previous on.
120 if ((count_loop++) > 10) {
121 /* We looped over too many time leave with the
122 * fact that we might have set an older fence
123 * seq then the current real last seq as signaled
128 } while (atomic64_xchg(&rdev->fence_drv[ring].last_seq, seq) > seq);
131 rdev->fence_drv[ring].last_activity = jiffies;
132 wake_up_all(&rdev->fence_queue);
136 static void radeon_fence_destroy(struct kref *kref)
138 struct radeon_fence *fence;
140 fence = container_of(kref, struct radeon_fence, kref);
141 fence->seq = RADEON_FENCE_NOTEMITED_SEQ;
142 if (fence->semaphore)
143 radeon_semaphore_free(fence->rdev, fence->semaphore);
147 int radeon_fence_create(struct radeon_device *rdev,
148 struct radeon_fence **fence,
151 *fence = kmalloc(sizeof(struct radeon_fence), GFP_KERNEL);
152 if ((*fence) == NULL) {
155 kref_init(&((*fence)->kref));
156 (*fence)->rdev = rdev;
157 (*fence)->seq = RADEON_FENCE_NOTEMITED_SEQ;
158 (*fence)->ring = ring;
159 (*fence)->semaphore = NULL;
163 static bool radeon_fence_seq_signaled(struct radeon_device *rdev,
164 u64 seq, unsigned ring)
166 if (atomic64_read(&rdev->fence_drv[ring].last_seq) >= seq) {
169 /* poll new last sequence at least once */
170 radeon_fence_process(rdev, ring);
171 if (atomic64_read(&rdev->fence_drv[ring].last_seq) >= seq) {
177 bool radeon_fence_signaled(struct radeon_fence *fence)
182 if (fence->seq == RADEON_FENCE_NOTEMITED_SEQ) {
183 WARN(1, "Querying an unemitted fence : %p !\n", fence);
186 if (fence->seq == RADEON_FENCE_SIGNALED_SEQ) {
189 if (radeon_fence_seq_signaled(fence->rdev, fence->seq, fence->ring)) {
190 fence->seq = RADEON_FENCE_SIGNALED_SEQ;
196 static int radeon_fence_wait_seq(struct radeon_device *rdev, u64 target_seq,
197 unsigned ring, bool intr, bool lock_ring)
199 unsigned long timeout, last_activity;
205 while (target_seq > atomic64_read(&rdev->fence_drv[ring].last_seq)) {
206 if (!rdev->ring[ring].ready) {
210 timeout = jiffies - RADEON_FENCE_JIFFIES_TIMEOUT;
211 if (time_after(rdev->fence_drv[ring].last_activity, timeout)) {
212 /* the normal case, timeout is somewhere before last_activity */
213 timeout = rdev->fence_drv[ring].last_activity - timeout;
215 /* either jiffies wrapped around, or no fence was signaled in the last 500ms
216 * anyway we will just wait for the minimum amount and then check for a lockup
220 seq = atomic64_read(&rdev->fence_drv[ring].last_seq);
221 /* Save current last activity valuee, used to check for GPU lockups */
222 last_activity = rdev->fence_drv[ring].last_activity;
224 trace_radeon_fence_wait_begin(rdev->ddev, seq);
225 radeon_irq_kms_sw_irq_get(rdev, ring);
227 r = wait_event_interruptible_timeout(rdev->fence_queue,
228 (signaled = radeon_fence_seq_signaled(rdev, target_seq, ring)),
231 r = wait_event_timeout(rdev->fence_queue,
232 (signaled = radeon_fence_seq_signaled(rdev, target_seq, ring)),
235 radeon_irq_kms_sw_irq_put(rdev, ring);
236 if (unlikely(r < 0)) {
239 trace_radeon_fence_wait_end(rdev->ddev, seq);
241 if (unlikely(!signaled)) {
242 /* we were interrupted for some reason and fence
243 * isn't signaled yet, resume waiting */
248 /* check if sequence value has changed since last_activity */
249 if (seq != atomic64_read(&rdev->fence_drv[ring].last_seq)) {
254 mutex_lock(&rdev->ring_lock);
257 /* test if somebody else has already decided that this is a lockup */
258 if (last_activity != rdev->fence_drv[ring].last_activity) {
260 mutex_unlock(&rdev->ring_lock);
265 if (radeon_ring_is_lockup(rdev, ring, &rdev->ring[ring])) {
266 /* good news we believe it's a lockup */
267 dev_warn(rdev->dev, "GPU lockup (waiting for 0x%016llx last fence id 0x%016llx)\n",
270 /* change last activity so nobody else think there is a lockup */
271 for (i = 0; i < RADEON_NUM_RINGS; ++i) {
272 rdev->fence_drv[i].last_activity = jiffies;
275 /* mark the ring as not ready any more */
276 rdev->ring[ring].ready = false;
278 mutex_unlock(&rdev->ring_lock);
284 mutex_unlock(&rdev->ring_lock);
291 int radeon_fence_wait(struct radeon_fence *fence, bool intr)
296 WARN(1, "Querying an invalid fence : %p !\n", fence);
300 r = radeon_fence_wait_seq(fence->rdev, fence->seq,
301 fence->ring, intr, true);
305 fence->seq = RADEON_FENCE_SIGNALED_SEQ;
309 bool radeon_fence_any_seq_signaled(struct radeon_device *rdev, u64 *seq)
313 for (i = 0; i < RADEON_NUM_RINGS; ++i) {
314 if (seq[i] && radeon_fence_seq_signaled(rdev, seq[i], i)) {
321 static int radeon_fence_wait_any_seq(struct radeon_device *rdev,
322 u64 *target_seq, bool intr)
324 unsigned long timeout, last_activity, tmp;
325 unsigned i, ring = RADEON_NUM_RINGS;
329 for (i = 0, last_activity = 0; i < RADEON_NUM_RINGS; ++i) {
330 if (!target_seq[i]) {
334 /* use the most recent one as indicator */
335 if (time_after(rdev->fence_drv[i].last_activity, last_activity)) {
336 last_activity = rdev->fence_drv[i].last_activity;
339 /* For lockup detection just pick the lowest ring we are
340 * actively waiting for
347 /* nothing to wait for ? */
348 if (ring == RADEON_NUM_RINGS) {
352 while (!radeon_fence_any_seq_signaled(rdev, target_seq)) {
353 timeout = jiffies - RADEON_FENCE_JIFFIES_TIMEOUT;
354 if (time_after(last_activity, timeout)) {
355 /* the normal case, timeout is somewhere before last_activity */
356 timeout = last_activity - timeout;
358 /* either jiffies wrapped around, or no fence was signaled in the last 500ms
359 * anyway we will just wait for the minimum amount and then check for a lockup
364 trace_radeon_fence_wait_begin(rdev->ddev, target_seq[ring]);
365 for (i = 0; i < RADEON_NUM_RINGS; ++i) {
367 radeon_irq_kms_sw_irq_get(rdev, i);
371 r = wait_event_interruptible_timeout(rdev->fence_queue,
372 (signaled = radeon_fence_any_seq_signaled(rdev, target_seq)),
375 r = wait_event_timeout(rdev->fence_queue,
376 (signaled = radeon_fence_any_seq_signaled(rdev, target_seq)),
379 for (i = 0; i < RADEON_NUM_RINGS; ++i) {
381 radeon_irq_kms_sw_irq_put(rdev, i);
384 if (unlikely(r < 0)) {
387 trace_radeon_fence_wait_end(rdev->ddev, target_seq[ring]);
389 if (unlikely(!signaled)) {
390 /* we were interrupted for some reason and fence
391 * isn't signaled yet, resume waiting */
396 mutex_lock(&rdev->ring_lock);
397 for (i = 0, tmp = 0; i < RADEON_NUM_RINGS; ++i) {
398 if (time_after(rdev->fence_drv[i].last_activity, tmp)) {
399 tmp = rdev->fence_drv[i].last_activity;
402 /* test if somebody else has already decided that this is a lockup */
403 if (last_activity != tmp) {
405 mutex_unlock(&rdev->ring_lock);
409 if (radeon_ring_is_lockup(rdev, ring, &rdev->ring[ring])) {
410 /* good news we believe it's a lockup */
411 dev_warn(rdev->dev, "GPU lockup (waiting for 0x%016llx)\n",
414 /* change last activity so nobody else think there is a lockup */
415 for (i = 0; i < RADEON_NUM_RINGS; ++i) {
416 rdev->fence_drv[i].last_activity = jiffies;
419 /* mark the ring as not ready any more */
420 rdev->ring[ring].ready = false;
421 mutex_unlock(&rdev->ring_lock);
424 mutex_unlock(&rdev->ring_lock);
430 int radeon_fence_wait_any(struct radeon_device *rdev,
431 struct radeon_fence **fences,
434 uint64_t seq[RADEON_NUM_RINGS];
438 for (i = 0; i < RADEON_NUM_RINGS; ++i) {
445 if (fences[i]->seq == RADEON_FENCE_SIGNALED_SEQ) {
446 /* something was allready signaled */
450 if (fences[i]->seq < RADEON_FENCE_NOTEMITED_SEQ) {
451 seq[i] = fences[i]->seq;
455 r = radeon_fence_wait_any_seq(rdev, seq, intr);
462 int radeon_fence_wait_next_locked(struct radeon_device *rdev, int ring)
466 /* We are not protected by ring lock when reading current seq but
467 * it's ok as worst case is we return to early while we could have
470 seq = atomic64_read(&rdev->fence_drv[ring].last_seq) + 1ULL;
471 if (seq >= rdev->fence_drv[ring].seq) {
472 /* nothing to wait for, last_seq is
473 already the last emited fence */
476 return radeon_fence_wait_seq(rdev, seq, ring, false, false);
479 int radeon_fence_wait_empty_locked(struct radeon_device *rdev, int ring)
481 /* We are not protected by ring lock when reading current seq
482 * but it's ok as wait empty is call from place where no more
483 * activity can be scheduled so there won't be concurrent access
486 return radeon_fence_wait_seq(rdev, rdev->fence_drv[ring].seq,
490 struct radeon_fence *radeon_fence_ref(struct radeon_fence *fence)
492 kref_get(&fence->kref);
496 void radeon_fence_unref(struct radeon_fence **fence)
498 struct radeon_fence *tmp = *fence;
502 kref_put(&tmp->kref, radeon_fence_destroy);
506 unsigned radeon_fence_count_emitted(struct radeon_device *rdev, int ring)
510 /* We are not protected by ring lock when reading the last sequence
511 * but it's ok to report slightly wrong fence count here.
513 radeon_fence_process(rdev, ring);
514 emitted = rdev->fence_drv[ring].seq - atomic64_read(&rdev->fence_drv[ring].last_seq);
515 /* to avoid 32bits warp around */
516 if (emitted > 0x10000000) {
517 emitted = 0x10000000;
519 return (unsigned)emitted;
522 int radeon_fence_driver_start_ring(struct radeon_device *rdev, int ring)
527 radeon_scratch_free(rdev, rdev->fence_drv[ring].scratch_reg);
528 if (rdev->wb.use_event) {
529 rdev->fence_drv[ring].scratch_reg = 0;
530 index = R600_WB_EVENT_OFFSET + ring * 4;
532 r = radeon_scratch_get(rdev, &rdev->fence_drv[ring].scratch_reg);
534 dev_err(rdev->dev, "fence failed to get scratch register\n");
537 index = RADEON_WB_SCRATCH_OFFSET +
538 rdev->fence_drv[ring].scratch_reg -
539 rdev->scratch.reg_base;
541 rdev->fence_drv[ring].cpu_addr = &rdev->wb.wb[index/4];
542 rdev->fence_drv[ring].gpu_addr = rdev->wb.gpu_addr + index;
543 radeon_fence_write(rdev, rdev->fence_drv[ring].seq, ring);
544 rdev->fence_drv[ring].initialized = true;
545 dev_info(rdev->dev, "fence driver on ring %d use gpu addr 0x%016llx and cpu addr 0x%p\n",
546 ring, rdev->fence_drv[ring].gpu_addr, rdev->fence_drv[ring].cpu_addr);
550 static void radeon_fence_driver_init_ring(struct radeon_device *rdev, int ring)
552 rdev->fence_drv[ring].scratch_reg = -1;
553 rdev->fence_drv[ring].cpu_addr = NULL;
554 rdev->fence_drv[ring].gpu_addr = 0;
555 rdev->fence_drv[ring].seq = 0;
556 atomic64_set(&rdev->fence_drv[ring].last_seq, 0);
557 rdev->fence_drv[ring].last_activity = jiffies;
558 rdev->fence_drv[ring].initialized = false;
561 int radeon_fence_driver_init(struct radeon_device *rdev)
565 init_waitqueue_head(&rdev->fence_queue);
566 for (ring = 0; ring < RADEON_NUM_RINGS; ring++) {
567 radeon_fence_driver_init_ring(rdev, ring);
569 if (radeon_debugfs_fence_init(rdev)) {
570 dev_err(rdev->dev, "fence debugfs file creation failed\n");
575 void radeon_fence_driver_fini(struct radeon_device *rdev)
579 mutex_lock(&rdev->ring_lock);
580 for (ring = 0; ring < RADEON_NUM_RINGS; ring++) {
581 if (!rdev->fence_drv[ring].initialized)
583 radeon_fence_wait_empty_locked(rdev, ring);
584 wake_up_all(&rdev->fence_queue);
585 radeon_scratch_free(rdev, rdev->fence_drv[ring].scratch_reg);
586 rdev->fence_drv[ring].initialized = false;
588 mutex_unlock(&rdev->ring_lock);
595 #if defined(CONFIG_DEBUG_FS)
596 static int radeon_debugfs_fence_info(struct seq_file *m, void *data)
598 struct drm_info_node *node = (struct drm_info_node *)m->private;
599 struct drm_device *dev = node->minor->dev;
600 struct radeon_device *rdev = dev->dev_private;
603 for (i = 0; i < RADEON_NUM_RINGS; ++i) {
604 if (!rdev->fence_drv[i].initialized)
607 seq_printf(m, "--- ring %d ---\n", i);
608 seq_printf(m, "Last signaled fence 0x%016lx\n",
609 atomic64_read(&rdev->fence_drv[i].last_seq));
610 seq_printf(m, "Last emitted 0x%016llx\n",
611 rdev->fence_drv[i].seq);
616 static struct drm_info_list radeon_debugfs_fence_list[] = {
617 {"radeon_fence_info", &radeon_debugfs_fence_info, 0, NULL},
621 int radeon_debugfs_fence_init(struct radeon_device *rdev)
623 #if defined(CONFIG_DEBUG_FS)
624 return radeon_debugfs_add_files(rdev, radeon_debugfs_fence_list, 1);