drivers/gpu/drm/radeon/radeon_fence.c

   1 /*
   2  * Copyright 2009 Jerome Glisse.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sub license, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  15  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  16  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  17  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  18  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  19  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  20  *
  21  * The above copyright notice and this permission notice (including the
  22  * next paragraph) shall be included in all copies or substantial portions
  23  * of the Software.
  24  *
  25  */
  26 /*
  27  * Authors:
  28  *    Jerome Glisse <glisse@freedesktop.org>
  29  *    Dave Airlie
  30  */
  31 #include <linux/seq_file.h>
  32 #include <linux/atomic.h>
  33 #include <linux/wait.h>
  34 #include <linux/list.h>
  35 #include <linux/kref.h>
  36 #include <linux/slab.h>
  37 #include "drmP.h"
  38 #include "drm.h"
  39 #include "radeon_reg.h"
  40 #include "radeon.h"
  41 #include "radeon_trace.h"
  42
  43 static void radeon_fence_write(struct radeon_device *rdev, u32 seq, int ring)
  44 {
  45         if (rdev->wb.enabled) {
  46                 *rdev->fence_drv[ring].cpu_addr = cpu_to_le32(seq);
  47         } else {
  48                 WREG32(rdev->fence_drv[ring].scratch_reg, seq);
  49         }
  50 }
  51
  52 static u32 radeon_fence_read(struct radeon_device *rdev, int ring)
  53 {
  54         u32 seq = 0;
  55
  56         if (rdev->wb.enabled) {
  57                 seq = le32_to_cpu(*rdev->fence_drv[ring].cpu_addr);
  58         } else {
  59                 seq = RREG32(rdev->fence_drv[ring].scratch_reg);
  60         }
  61         return seq;
  62 }
  63
  64 int radeon_fence_emit(struct radeon_device *rdev, struct radeon_fence *fence)
  65 {
  66         unsigned long irq_flags;
  67
  68         write_lock_irqsave(&rdev->fence_lock, irq_flags);
  69         if (fence->emitted) {
  70                 write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
  71                 return 0;
  72         }
  73         fence->seq = atomic_add_return(1, &rdev->fence_drv[fence->ring].seq);
  74         radeon_fence_ring_emit(rdev, fence->ring, fence);
  75         trace_radeon_fence_emit(rdev->ddev, fence->seq);
  76         fence->emitted = true;
  77         list_move_tail(&fence->list, &rdev->fence_drv[fence->ring].emitted);
  78         write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
  79         return 0;
  80 }
  81
  82 static bool radeon_fence_poll_locked(struct radeon_device *rdev, int ring)
  83 {
  84         struct radeon_fence *fence;
  85         struct list_head *i, *n;
  86         uint32_t seq;
  87         bool wake = false;
  88         unsigned long cjiffies;
  89
  90         seq = radeon_fence_read(rdev, ring);
  91         if (seq != rdev->fence_drv[ring].last_seq) {
  92                 rdev->fence_drv[ring].last_seq = seq;
  93                 rdev->fence_drv[ring].last_jiffies = jiffies;
  94                 rdev->fence_drv[ring].last_timeout = RADEON_FENCE_JIFFIES_TIMEOUT;
  95         } else {
  96                 cjiffies = jiffies;
  97                 if (time_after(cjiffies, rdev->fence_drv[ring].last_jiffies)) {
  98                         cjiffies -= rdev->fence_drv[ring].last_jiffies;
  99                         if (time_after(rdev->fence_drv[ring].last_timeout, cjiffies)) {
 100                                 /* update the timeout */
 101                                 rdev->fence_drv[ring].last_timeout -= cjiffies;
 102                         } else {
 103                                 /* the 500ms timeout is elapsed we should test
 104                                  * for GPU lockup
 105                                  */
 106                                 rdev->fence_drv[ring].last_timeout = 1;
 107                         }
 108                 } else {
 109                         /* wrap around update last jiffies, we will just wait
 110                          * a little longer
 111                          */
 112                         rdev->fence_drv[ring].last_jiffies = cjiffies;
 113                 }
 114                 return false;
 115         }
 116         n = NULL;
 117         list_for_each(i, &rdev->fence_drv[ring].emitted) {
 118                 fence = list_entry(i, struct radeon_fence, list);
 119                 if (fence->seq == seq) {
 120                         n = i;
 121                         break;
 122                 }
 123         }
 124         /* all fence previous to this one are considered as signaled */
 125         if (n) {
 126                 i = n;
 127                 do {
 128                         n = i->prev;
 129                         list_move_tail(i, &rdev->fence_drv[ring].signaled);
 130                         fence = list_entry(i, struct radeon_fence, list);
 131                         fence->signaled = true;
 132                         i = n;
 133                 } while (i != &rdev->fence_drv[ring].emitted);
 134                 wake = true;
 135         }
 136         return wake;
 137 }
 138
 139 static void radeon_fence_destroy(struct kref *kref)
 140 {
 141         unsigned long irq_flags;
 142         struct radeon_fence *fence;
 143
 144         fence = container_of(kref, struct radeon_fence, kref);
 145         write_lock_irqsave(&fence->rdev->fence_lock, irq_flags);
 146         list_del(&fence->list);
 147         fence->emitted = false;
 148         write_unlock_irqrestore(&fence->rdev->fence_lock, irq_flags);
 149         if (fence->semaphore)
 150                 radeon_semaphore_free(fence->rdev, fence->semaphore);
 151         kfree(fence);
 152 }
 153
 154 int radeon_fence_create(struct radeon_device *rdev,
 155                         struct radeon_fence **fence,
 156                         int ring)
 157 {
 158         unsigned long irq_flags;
 159
 160         *fence = kmalloc(sizeof(struct radeon_fence), GFP_KERNEL);
 161         if ((*fence) == NULL) {
 162                 return -ENOMEM;
 163         }
 164         kref_init(&((*fence)->kref));
 165         (*fence)->rdev = rdev;
 166         (*fence)->emitted = false;
 167         (*fence)->signaled = false;
 168         (*fence)->seq = 0;
 169         (*fence)->ring = ring;
 170         (*fence)->semaphore = NULL;
 171         INIT_LIST_HEAD(&(*fence)->list);
 172
 173         write_lock_irqsave(&rdev->fence_lock, irq_flags);
 174         list_add_tail(&(*fence)->list, &rdev->fence_drv[ring].created);
 175         write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
 176         return 0;
 177 }
 178
 179 bool radeon_fence_signaled(struct radeon_fence *fence)
 180 {
 181         unsigned long irq_flags;
 182         bool signaled = false;
 183
 184         if (!fence)
 185                 return true;
 186
 187         write_lock_irqsave(&fence->rdev->fence_lock, irq_flags);
 188         signaled = fence->signaled;
 189         /* if we are shuting down report all fence as signaled */
 190         if (fence->rdev->shutdown) {
 191                 signaled = true;
 192         }
 193         if (!fence->emitted) {
 194                 WARN(1, "Querying an unemitted fence : %p !\n", fence);
 195                 signaled = true;
 196         }
 197         if (!signaled) {
 198                 radeon_fence_poll_locked(fence->rdev, fence->ring);
 199                 signaled = fence->signaled;
 200         }
 201         write_unlock_irqrestore(&fence->rdev->fence_lock, irq_flags);
 202         return signaled;
 203 }
 204
 205 int radeon_fence_wait(struct radeon_fence *fence, bool intr)
 206 {
 207         struct radeon_device *rdev;
 208         unsigned long irq_flags, timeout;
 209         u32 seq;
 210         int r;
 211
 212         if (fence == NULL) {
 213                 WARN(1, "Querying an invalid fence : %p !\n", fence);
 214                 return 0;
 215         }
 216         rdev = fence->rdev;
 217         if (radeon_fence_signaled(fence)) {
 218                 return 0;
 219         }
 220         timeout = rdev->fence_drv[fence->ring].last_timeout;
 221 retry:
 222         /* save current sequence used to check for GPU lockup */
 223         seq = rdev->fence_drv[fence->ring].last_seq;
 224         trace_radeon_fence_wait_begin(rdev->ddev, seq);
 225         if (intr) {
 226                 radeon_irq_kms_sw_irq_get(rdev, fence->ring);
 227                 r = wait_event_interruptible_timeout(rdev->fence_drv[fence->ring].queue,
 228                                 radeon_fence_signaled(fence), timeout);
 229                 radeon_irq_kms_sw_irq_put(rdev, fence->ring);
 230                 if (unlikely(r < 0)) {
 231                         return r;
 232                 }
 233         } else {
 234                 radeon_irq_kms_sw_irq_get(rdev, fence->ring);
 235                 r = wait_event_timeout(rdev->fence_drv[fence->ring].queue,
 236                          radeon_fence_signaled(fence), timeout);
 237                 radeon_irq_kms_sw_irq_put(rdev, fence->ring);
 238         }
 239         trace_radeon_fence_wait_end(rdev->ddev, seq);
 240         if (unlikely(!radeon_fence_signaled(fence))) {
 241                 /* we were interrupted for some reason and fence isn't
 242                  * isn't signaled yet, resume wait
 243                  */
 244                 if (r) {
 245                         timeout = r;
 246                         goto retry;
 247                 }
 248                 /* don't protect read access to rdev->fence_drv[t].last_seq
 249                  * if we experiencing a lockup the value doesn't change
 250                  */
 251                 if (seq == rdev->fence_drv[fence->ring].last_seq &&
 252                     radeon_ring_is_lockup(rdev, fence->ring, &rdev->ring[fence->ring])) {
 253
 254                         /* good news we believe it's a lockup */
 255                         printk(KERN_WARNING "GPU lockup (waiting for 0x%08X last fence id 0x%08X)\n",
 256                              fence->seq, seq);
 257
 258                         /* mark the ring as not ready any more */
 259                         rdev->ring[fence->ring].ready = false;
 260                         r = radeon_gpu_reset(rdev);
 261                         if (r)
 262                                 return r;
 263                 }
 264                 timeout = RADEON_FENCE_JIFFIES_TIMEOUT;
 265                 write_lock_irqsave(&rdev->fence_lock, irq_flags);
 266                 rdev->fence_drv[fence->ring].last_timeout = RADEON_FENCE_JIFFIES_TIMEOUT;
 267                 rdev->fence_drv[fence->ring].last_jiffies = jiffies;
 268                 write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
 269                 goto retry;
 270         }
 271         return 0;
 272 }
 273
 274 int radeon_fence_wait_next(struct radeon_device *rdev, int ring)
 275 {
 276         unsigned long irq_flags;
 277         struct radeon_fence *fence;
 278         int r;
 279
 280         write_lock_irqsave(&rdev->fence_lock, irq_flags);
 281         if (!rdev->ring[ring].ready) {
 282                 write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
 283                 return -EBUSY;
 284         }
 285         if (list_empty(&rdev->fence_drv[ring].emitted)) {
 286                 write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
 287                 return 0;
 288         }
 289         fence = list_entry(rdev->fence_drv[ring].emitted.next,
 290                            struct radeon_fence, list);
 291         radeon_fence_ref(fence);
 292         write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
 293         r = radeon_fence_wait(fence, false);
 294         radeon_fence_unref(&fence);
 295         return r;
 296 }
 297
 298 int radeon_fence_wait_last(struct radeon_device *rdev, int ring)
 299 {
 300         unsigned long irq_flags;
 301         struct radeon_fence *fence;
 302         int r;
 303
 304         write_lock_irqsave(&rdev->fence_lock, irq_flags);
 305         if (!rdev->ring[ring].ready) {
 306                 write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
 307                 return -EBUSY;
 308         }
 309         if (list_empty(&rdev->fence_drv[ring].emitted)) {
 310                 write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
 311                 return 0;
 312         }
 313         fence = list_entry(rdev->fence_drv[ring].emitted.prev,
 314                            struct radeon_fence, list);
 315         radeon_fence_ref(fence);
 316         write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
 317         r = radeon_fence_wait(fence, false);
 318         radeon_fence_unref(&fence);
 319         return r;
 320 }
 321
 322 struct radeon_fence *radeon_fence_ref(struct radeon_fence *fence)
 323 {
 324         kref_get(&fence->kref);
 325         return fence;
 326 }
 327
 328 void radeon_fence_unref(struct radeon_fence **fence)
 329 {
 330         struct radeon_fence *tmp = *fence;
 331
 332         *fence = NULL;
 333         if (tmp) {
 334                 kref_put(&tmp->kref, radeon_fence_destroy);
 335         }
 336 }
 337
 338 void radeon_fence_process(struct radeon_device *rdev, int ring)
 339 {
 340         unsigned long irq_flags;
 341         bool wake;
 342
 343         write_lock_irqsave(&rdev->fence_lock, irq_flags);
 344         wake = radeon_fence_poll_locked(rdev, ring);
 345         write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
 346         if (wake) {
 347                 wake_up_all(&rdev->fence_drv[ring].queue);
 348         }
 349 }
 350
 351 int radeon_fence_count_emitted(struct radeon_device *rdev, int ring)
 352 {
 353         unsigned long irq_flags;
 354         int not_processed = 0;
 355
 356         read_lock_irqsave(&rdev->fence_lock, irq_flags);
 357         if (!rdev->fence_drv[ring].initialized) {
 358                 read_unlock_irqrestore(&rdev->fence_lock, irq_flags);
 359                 return 0;
 360         }
 361
 362         if (!list_empty(&rdev->fence_drv[ring].emitted)) {
 363                 struct list_head *ptr;
 364                 list_for_each(ptr, &rdev->fence_drv[ring].emitted) {
 365                         /* count up to 3, that's enought info */
 366                         if (++not_processed >= 3)
 367                                 break;
 368                 }
 369         }
 370         read_unlock_irqrestore(&rdev->fence_lock, irq_flags);
 371         return not_processed;
 372 }
 373
 374 int radeon_fence_driver_start_ring(struct radeon_device *rdev, int ring)
 375 {
 376         unsigned long irq_flags;
 377         uint64_t index;
 378         int r;
 379
 380         write_lock_irqsave(&rdev->fence_lock, irq_flags);
 381         radeon_scratch_free(rdev, rdev->fence_drv[ring].scratch_reg);
 382         if (rdev->wb.use_event) {
 383                 rdev->fence_drv[ring].scratch_reg = 0;
 384                 index = R600_WB_EVENT_OFFSET + ring * 4;
 385         } else {
 386                 r = radeon_scratch_get(rdev, &rdev->fence_drv[ring].scratch_reg);
 387                 if (r) {
 388                         dev_err(rdev->dev, "fence failed to get scratch register\n");
 389                         write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
 390                         return r;
 391                 }
 392                 index = RADEON_WB_SCRATCH_OFFSET +
 393                         rdev->fence_drv[ring].scratch_reg -
 394                         rdev->scratch.reg_base;
 395         }
 396         rdev->fence_drv[ring].cpu_addr = &rdev->wb.wb[index/4];
 397         rdev->fence_drv[ring].gpu_addr = rdev->wb.gpu_addr + index;
 398         radeon_fence_write(rdev, atomic_read(&rdev->fence_drv[ring].seq), ring);
 399         rdev->fence_drv[ring].initialized = true;
 400         DRM_INFO("fence driver on ring %d use gpu addr 0x%08Lx and cpu addr 0x%p\n",
 401                  ring, rdev->fence_drv[ring].gpu_addr, rdev->fence_drv[ring].cpu_addr);
 402         write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
 403         return 0;
 404 }
 405
 406 static void radeon_fence_driver_init_ring(struct radeon_device *rdev, int ring)
 407 {
 408         rdev->fence_drv[ring].scratch_reg = -1;
 409         rdev->fence_drv[ring].cpu_addr = NULL;
 410         rdev->fence_drv[ring].gpu_addr = 0;
 411         atomic_set(&rdev->fence_drv[ring].seq, 0);
 412         INIT_LIST_HEAD(&rdev->fence_drv[ring].created);
 413         INIT_LIST_HEAD(&rdev->fence_drv[ring].emitted);
 414         INIT_LIST_HEAD(&rdev->fence_drv[ring].signaled);
 415         init_waitqueue_head(&rdev->fence_drv[ring].queue);
 416         rdev->fence_drv[ring].initialized = false;
 417 }
 418
 419 int radeon_fence_driver_init(struct radeon_device *rdev)
 420 {
 421         unsigned long irq_flags;
 422         int ring;
 423
 424         write_lock_irqsave(&rdev->fence_lock, irq_flags);
 425         for (ring = 0; ring < RADEON_NUM_RINGS; ring++) {
 426                 radeon_fence_driver_init_ring(rdev, ring);
 427         }
 428         write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
 429         if (radeon_debugfs_fence_init(rdev)) {
 430                 dev_err(rdev->dev, "fence debugfs file creation failed\n");
 431         }
 432         return 0;
 433 }
 434
 435 void radeon_fence_driver_fini(struct radeon_device *rdev)
 436 {
 437         unsigned long irq_flags;
 438         int ring;
 439
 440         for (ring = 0; ring < RADEON_NUM_RINGS; ring++) {
 441                 if (!rdev->fence_drv[ring].initialized)
 442                         continue;
 443                 radeon_fence_wait_last(rdev, ring);
 444                 wake_up_all(&rdev->fence_drv[ring].queue);
 445                 write_lock_irqsave(&rdev->fence_lock, irq_flags);
 446                 radeon_scratch_free(rdev, rdev->fence_drv[ring].scratch_reg);
 447                 write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
 448                 rdev->fence_drv[ring].initialized = false;
 449         }
 450 }
 451
 452
 453 /*
 454  * Fence debugfs
 455  */
 456 #if defined(CONFIG_DEBUG_FS)
 457 static int radeon_debugfs_fence_info(struct seq_file *m, void *data)
 458 {
 459         struct drm_info_node *node = (struct drm_info_node *)m->private;
 460         struct drm_device *dev = node->minor->dev;
 461         struct radeon_device *rdev = dev->dev_private;
 462         struct radeon_fence *fence;
 463         int i;
 464
 465         for (i = 0; i < RADEON_NUM_RINGS; ++i) {
 466                 if (!rdev->fence_drv[i].initialized)
 467                         continue;
 468
 469                 seq_printf(m, "--- ring %d ---\n", i);
 470                 seq_printf(m, "Last signaled fence 0x%08X\n",
 471                            radeon_fence_read(rdev, i));
 472                 if (!list_empty(&rdev->fence_drv[i].emitted)) {
 473                         fence = list_entry(rdev->fence_drv[i].emitted.prev,
 474                                            struct radeon_fence, list);
 475                         seq_printf(m, "Last emitted fence %p with 0x%08X\n",
 476                                    fence,  fence->seq);
 477                 }
 478         }
 479         return 0;
 480 }
 481
 482 static struct drm_info_list radeon_debugfs_fence_list[] = {
 483         {"radeon_fence_info", &radeon_debugfs_fence_info, 0, NULL},
 484 };
 485 #endif
 486
 487 int radeon_debugfs_fence_init(struct radeon_device *rdev)
 488 {
 489 #if defined(CONFIG_DEBUG_FS)
 490         return radeon_debugfs_add_files(rdev, radeon_debugfs_fence_list, 1);
 491 #else
 492         return 0;
 493 #endif
 494 }