drivers/gpu/drm/radeon/radeon_fence.c

   1 /*
   2  * Copyright 2009 Jerome Glisse.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sub license, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  15  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  16  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  17  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  18  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  19  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  20  *
  21  * The above copyright notice and this permission notice (including the
  22  * next paragraph) shall be included in all copies or substantial portions
  23  * of the Software.
  24  *
  25  */
  26 /*
  27  * Authors:
  28  *    Jerome Glisse <glisse@freedesktop.org>
  29  *    Dave Airlie
  30  */
  31 #include <linux/seq_file.h>
  32 #include <linux/atomic.h>
  33 #include <linux/wait.h>
  34 #include <linux/list.h>
  35 #include <linux/kref.h>
  36 #include <linux/slab.h>
  37 #include "drmP.h"
  38 #include "drm.h"
  39 #include "radeon_reg.h"
  40 #include "radeon.h"
  41 #include "radeon_trace.h"
  42
  43 static void radeon_fence_write(struct radeon_device *rdev, u32 seq, int ring)
  44 {
  45         if (rdev->wb.enabled) {
  46                 *rdev->fence_drv[ring].cpu_addr = cpu_to_le32(seq);
  47         } else {
  48                 WREG32(rdev->fence_drv[ring].scratch_reg, seq);
  49         }
  50 }
  51
  52 static u32 radeon_fence_read(struct radeon_device *rdev, int ring)
  53 {
  54         u32 seq = 0;
  55
  56         if (rdev->wb.enabled) {
  57                 seq = le32_to_cpu(*rdev->fence_drv[ring].cpu_addr);
  58         } else {
  59                 seq = RREG32(rdev->fence_drv[ring].scratch_reg);
  60         }
  61         return seq;
  62 }
  63
  64 int radeon_fence_emit(struct radeon_device *rdev, struct radeon_fence *fence)
  65 {
  66         /* we are protected by the ring emission mutex */
  67         if (fence->seq && fence->seq < RADEON_FENCE_NOTEMITED_SEQ) {
  68                 return 0;
  69         }
  70         fence->seq = ++rdev->fence_drv[fence->ring].seq;
  71         radeon_fence_ring_emit(rdev, fence->ring, fence);
  72         trace_radeon_fence_emit(rdev->ddev, fence->seq);
  73         return 0;
  74 }
  75
  76 void radeon_fence_process(struct radeon_device *rdev, int ring)
  77 {
  78         uint64_t seq, last_seq;
  79         unsigned count_loop = 0;
  80         bool wake = false;
  81
  82         /* Note there is a scenario here for an infinite loop but it's
  83          * very unlikely to happen. For it to happen, the current polling
  84          * process need to be interrupted by another process and another
  85          * process needs to update the last_seq btw the atomic read and
  86          * xchg of the current process.
  87          *
  88          * More over for this to go in infinite loop there need to be
  89          * continuously new fence signaled ie radeon_fence_read needs
  90          * to return a different value each time for both the currently
  91          * polling process and the other process that xchg the last_seq
  92          * btw atomic read and xchg of the current process. And the
  93          * value the other process set as last seq must be higher than
  94          * the seq value we just read. Which means that current process
  95          * need to be interrupted after radeon_fence_read and before
  96          * atomic xchg.
  97          *
  98          * To be even more safe we count the number of time we loop and
  99          * we bail after 10 loop just accepting the fact that we might
 100          * have temporarly set the last_seq not to the true real last
 101          * seq but to an older one.
 102          */
 103         last_seq = atomic64_read(&rdev->fence_drv[ring].last_seq);
 104         do {
 105                 seq = radeon_fence_read(rdev, ring);
 106                 seq |= last_seq & 0xffffffff00000000LL;
 107                 if (seq < last_seq) {
 108                         seq += 0x100000000LL;
 109                 }
 110
 111                 if (seq == last_seq) {
 112                         break;
 113                 }
 114                 /* If we loop over we don't want to return without
 115                  * checking if a fence is signaled as it means that the
 116                  * seq we just read is different from the previous on.
 117                  */
 118                 wake = true;
 119                 last_seq = seq;
 120                 if ((count_loop++) > 10) {
 121                         /* We looped over too many time leave with the
 122                          * fact that we might have set an older fence
 123                          * seq then the current real last seq as signaled
 124                          * by the hw.
 125                          */
 126                         break;
 127                 }
 128         } while (atomic64_xchg(&rdev->fence_drv[ring].last_seq, seq) > seq);
 129
 130         if (wake) {
 131                 rdev->fence_drv[ring].last_activity = jiffies;
 132                 wake_up_all(&rdev->fence_drv[ring].queue);
 133         }
 134 }
 135
 136 static void radeon_fence_destroy(struct kref *kref)
 137 {
 138         struct radeon_fence *fence;
 139
 140         fence = container_of(kref, struct radeon_fence, kref);
 141         fence->seq = RADEON_FENCE_NOTEMITED_SEQ;
 142         if (fence->semaphore)
 143                 radeon_semaphore_free(fence->rdev, fence->semaphore);
 144         kfree(fence);
 145 }
 146
 147 int radeon_fence_create(struct radeon_device *rdev,
 148                         struct radeon_fence **fence,
 149                         int ring)
 150 {
 151         *fence = kmalloc(sizeof(struct radeon_fence), GFP_KERNEL);
 152         if ((*fence) == NULL) {
 153                 return -ENOMEM;
 154         }
 155         kref_init(&((*fence)->kref));
 156         (*fence)->rdev = rdev;
 157         (*fence)->seq = RADEON_FENCE_NOTEMITED_SEQ;
 158         (*fence)->ring = ring;
 159         (*fence)->semaphore = NULL;
 160         return 0;
 161 }
 162
 163 static bool radeon_fence_seq_signaled(struct radeon_device *rdev,
 164                                       u64 seq, unsigned ring)
 165 {
 166         if (atomic64_read(&rdev->fence_drv[ring].last_seq) >= seq) {
 167                 return true;
 168         }
 169         /* poll new last sequence at least once */
 170         radeon_fence_process(rdev, ring);
 171         if (atomic64_read(&rdev->fence_drv[ring].last_seq) >= seq) {
 172                 return true;
 173         }
 174         return false;
 175 }
 176
 177 bool radeon_fence_signaled(struct radeon_fence *fence)
 178 {
 179         if (!fence) {
 180                 return true;
 181         }
 182         if (fence->seq == RADEON_FENCE_NOTEMITED_SEQ) {
 183                 WARN(1, "Querying an unemitted fence : %p !\n", fence);
 184                 return true;
 185         }
 186         if (fence->seq == RADEON_FENCE_SIGNALED_SEQ) {
 187                 return true;
 188         }
 189         if (radeon_fence_seq_signaled(fence->rdev, fence->seq, fence->ring)) {
 190                 fence->seq = RADEON_FENCE_SIGNALED_SEQ;
 191                 return true;
 192         }
 193         return false;
 194 }
 195
 196 static int radeon_fence_wait_seq(struct radeon_device *rdev, u64 target_seq,
 197                                  unsigned ring, bool intr)
 198 {
 199         unsigned long timeout, last_activity;
 200         uint64_t seq;
 201         unsigned i;
 202         bool signaled;
 203         int r;
 204
 205         while (target_seq > atomic64_read(&rdev->fence_drv[ring].last_seq)) {
 206                 if (!rdev->ring[ring].ready) {
 207                         return -EBUSY;
 208                 }
 209
 210                 timeout = jiffies - RADEON_FENCE_JIFFIES_TIMEOUT;
 211                 if (time_after(rdev->fence_drv[ring].last_activity, timeout)) {
 212                         /* the normal case, timeout is somewhere before last_activity */
 213                         timeout = rdev->fence_drv[ring].last_activity - timeout;
 214                 } else {
 215                         /* either jiffies wrapped around, or no fence was signaled in the last 500ms
 216                          * anyway we will just wait for the minimum amount and then check for a lockup
 217                          */
 218                         timeout = 1;
 219                 }
 220                 seq = atomic64_read(&rdev->fence_drv[ring].last_seq);
 221                 /* Save current last activity valuee, used to check for GPU lockups */
 222                 last_activity = rdev->fence_drv[ring].last_activity;
 223
 224                 trace_radeon_fence_wait_begin(rdev->ddev, seq);
 225                 radeon_irq_kms_sw_irq_get(rdev, ring);
 226                 if (intr) {
 227                         r = wait_event_interruptible_timeout(rdev->fence_drv[ring].queue,
 228                                 (signaled = radeon_fence_seq_signaled(rdev, target_seq, ring)),
 229                                 timeout);
 230                 } else {
 231                         r = wait_event_timeout(rdev->fence_drv[ring].queue,
 232                                 (signaled = radeon_fence_seq_signaled(rdev, target_seq, ring)),
 233                                 timeout);
 234                 }
 235                 radeon_irq_kms_sw_irq_put(rdev, ring);
 236                 if (unlikely(r < 0)) {
 237                         return r;
 238                 }
 239                 trace_radeon_fence_wait_end(rdev->ddev, seq);
 240
 241                 if (unlikely(!signaled)) {
 242                         /* we were interrupted for some reason and fence
 243                          * isn't signaled yet, resume waiting */
 244                         if (r) {
 245                                 continue;
 246                         }
 247
 248                         /* check if sequence value has changed since last_activity */
 249                         if (seq != atomic64_read(&rdev->fence_drv[ring].last_seq)) {
 250                                 continue;
 251                         }
 252                         /* test if somebody else has already decided that this is a lockup */
 253                         if (last_activity != rdev->fence_drv[ring].last_activity) {
 254                                 continue;
 255                         }
 256
 257                         if (radeon_ring_is_lockup(rdev, ring, &rdev->ring[ring])) {
 258                                 /* good news we believe it's a lockup */
 259                                 dev_warn(rdev->dev, "GPU lockup (waiting for 0x%016llx last fence id 0x%016llx)\n",
 260                                          target_seq, seq);
 261
 262                                 /* change last activity so nobody else think there is a lockup */
 263                                 for (i = 0; i < RADEON_NUM_RINGS; ++i) {
 264                                         rdev->fence_drv[i].last_activity = jiffies;
 265                                 }
 266
 267                                 /* change last activity so nobody else think there is a lockup */
 268                                 for (i = 0; i < RADEON_NUM_RINGS; ++i) {
 269                                         rdev->fence_drv[i].last_activity = jiffies;
 270                                 }
 271
 272                                 /* mark the ring as not ready any more */
 273                                 rdev->ring[ring].ready = false;
 274                                 return -EDEADLK;
 275                         }
 276                 }
 277         }
 278         return 0;
 279 }
 280
 281 int radeon_fence_wait(struct radeon_fence *fence, bool intr)
 282 {
 283         int r;
 284
 285         if (fence == NULL) {
 286                 WARN(1, "Querying an invalid fence : %p !\n", fence);
 287                 return -EINVAL;
 288         }
 289
 290         r = radeon_fence_wait_seq(fence->rdev, fence->seq, fence->ring, intr);
 291         if (r) {
 292                 return r;
 293         }
 294         fence->seq = RADEON_FENCE_SIGNALED_SEQ;
 295         return 0;
 296 }
 297
 298 int radeon_fence_wait_next(struct radeon_device *rdev, int ring)
 299 {
 300         uint64_t seq;
 301
 302         /* We are not protected by ring lock when reading current seq but
 303          * it's ok as worst case is we return to early while we could have
 304          * wait.
 305          */
 306         seq = atomic64_read(&rdev->fence_drv[ring].last_seq) + 1ULL;
 307         if (seq >= rdev->fence_drv[ring].seq) {
 308                 /* nothing to wait for, last_seq is already the last emited fence */
 309                 return 0;
 310         }
 311         return radeon_fence_wait_seq(rdev, seq, ring, false);
 312 }
 313
 314 int radeon_fence_wait_empty(struct radeon_device *rdev, int ring)
 315 {
 316         /* We are not protected by ring lock when reading current seq
 317          * but it's ok as wait empty is call from place where no more
 318          * activity can be scheduled so there won't be concurrent access
 319          * to seq value.
 320          */
 321         return radeon_fence_wait_seq(rdev, rdev->fence_drv[ring].seq, ring, false);
 322 }
 323
 324 struct radeon_fence *radeon_fence_ref(struct radeon_fence *fence)
 325 {
 326         kref_get(&fence->kref);
 327         return fence;
 328 }
 329
 330 void radeon_fence_unref(struct radeon_fence **fence)
 331 {
 332         struct radeon_fence *tmp = *fence;
 333
 334         *fence = NULL;
 335         if (tmp) {
 336                 kref_put(&tmp->kref, radeon_fence_destroy);
 337         }
 338 }
 339
 340 unsigned radeon_fence_count_emitted(struct radeon_device *rdev, int ring)
 341 {
 342         uint64_t emitted;
 343
 344         radeon_fence_process(rdev, ring);
 345         /* We are not protected by ring lock when reading the last sequence
 346          * but it's ok to report slightly wrong fence count here.
 347          */
 348         emitted = rdev->fence_drv[ring].seq - atomic64_read(&rdev->fence_drv[ring].last_seq);
 349         /* to avoid 32bits warp around */
 350         if (emitted > 0x10000000) {
 351                 emitted = 0x10000000;
 352         }
 353         return (unsigned)emitted;
 354 }
 355
 356 int radeon_fence_driver_start_ring(struct radeon_device *rdev, int ring)
 357 {
 358         uint64_t index;
 359         int r;
 360
 361         radeon_scratch_free(rdev, rdev->fence_drv[ring].scratch_reg);
 362         if (rdev->wb.use_event) {
 363                 rdev->fence_drv[ring].scratch_reg = 0;
 364                 index = R600_WB_EVENT_OFFSET + ring * 4;
 365         } else {
 366                 r = radeon_scratch_get(rdev, &rdev->fence_drv[ring].scratch_reg);
 367                 if (r) {
 368                         dev_err(rdev->dev, "fence failed to get scratch register\n");
 369                         return r;
 370                 }
 371                 index = RADEON_WB_SCRATCH_OFFSET +
 372                         rdev->fence_drv[ring].scratch_reg -
 373                         rdev->scratch.reg_base;
 374         }
 375         rdev->fence_drv[ring].cpu_addr = &rdev->wb.wb[index/4];
 376         rdev->fence_drv[ring].gpu_addr = rdev->wb.gpu_addr + index;
 377         radeon_fence_write(rdev, rdev->fence_drv[ring].seq, ring);
 378         rdev->fence_drv[ring].initialized = true;
 379         dev_info(rdev->dev, "fence driver on ring %d use gpu addr 0x%016llx and cpu addr 0x%p\n",
 380                  ring, rdev->fence_drv[ring].gpu_addr, rdev->fence_drv[ring].cpu_addr);
 381         return 0;
 382 }
 383
 384 static void radeon_fence_driver_init_ring(struct radeon_device *rdev, int ring)
 385 {
 386         rdev->fence_drv[ring].scratch_reg = -1;
 387         rdev->fence_drv[ring].cpu_addr = NULL;
 388         rdev->fence_drv[ring].gpu_addr = 0;
 389         rdev->fence_drv[ring].seq = 0;
 390         atomic64_set(&rdev->fence_drv[ring].last_seq, 0);
 391         rdev->fence_drv[ring].last_activity = jiffies;
 392         init_waitqueue_head(&rdev->fence_drv[ring].queue);
 393         rdev->fence_drv[ring].initialized = false;
 394 }
 395
 396 int radeon_fence_driver_init(struct radeon_device *rdev)
 397 {
 398         int ring;
 399
 400         for (ring = 0; ring < RADEON_NUM_RINGS; ring++) {
 401                 radeon_fence_driver_init_ring(rdev, ring);
 402         }
 403         if (radeon_debugfs_fence_init(rdev)) {
 404                 dev_err(rdev->dev, "fence debugfs file creation failed\n");
 405         }
 406         return 0;
 407 }
 408
 409 void radeon_fence_driver_fini(struct radeon_device *rdev)
 410 {
 411         int ring;
 412
 413         for (ring = 0; ring < RADEON_NUM_RINGS; ring++) {
 414                 if (!rdev->fence_drv[ring].initialized)
 415                         continue;
 416                 radeon_fence_wait_empty(rdev, ring);
 417                 wake_up_all(&rdev->fence_drv[ring].queue);
 418                 radeon_scratch_free(rdev, rdev->fence_drv[ring].scratch_reg);
 419                 rdev->fence_drv[ring].initialized = false;
 420         }
 421 }
 422
 423
 424 /*
 425  * Fence debugfs
 426  */
 427 #if defined(CONFIG_DEBUG_FS)
 428 static int radeon_debugfs_fence_info(struct seq_file *m, void *data)
 429 {
 430         struct drm_info_node *node = (struct drm_info_node *)m->private;
 431         struct drm_device *dev = node->minor->dev;
 432         struct radeon_device *rdev = dev->dev_private;
 433         int i;
 434
 435         for (i = 0; i < RADEON_NUM_RINGS; ++i) {
 436                 if (!rdev->fence_drv[i].initialized)
 437                         continue;
 438
 439                 seq_printf(m, "--- ring %d ---\n", i);
 440                 seq_printf(m, "Last signaled fence 0x%016lx\n",
 441                            atomic64_read(&rdev->fence_drv[i].last_seq));
 442                 seq_printf(m, "Last emitted  0x%016llx\n",
 443                            rdev->fence_drv[i].seq);
 444         }
 445         return 0;
 446 }
 447
 448 static struct drm_info_list radeon_debugfs_fence_list[] = {
 449         {"radeon_fence_info", &radeon_debugfs_fence_info, 0, NULL},
 450 };
 451 #endif
 452
 453 int radeon_debugfs_fence_init(struct radeon_device *rdev)
 454 {
 455 #if defined(CONFIG_DEBUG_FS)
 456         return radeon_debugfs_add_files(rdev, radeon_debugfs_fence_list, 1);
 457 #else
 458         return 0;
 459 #endif
 460 }