2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
24 * Authors: Dave Airlie
29 #include "drm_sarea.h"
31 #include "radeon_drm.h"
33 #include <linux/vga_switcheroo.h>
34 #include <linux/slab.h>
37 * radeon_driver_unload_kms - Main unload function for KMS.
39 * @dev: drm dev pointer
41 * This is the main unload function for KMS (all asics).
42 * It calls radeon_modeset_fini() to tear down the
43 * displays, and radeon_device_fini() to tear down
44 * the rest of the device (CP, writeback, etc.).
45 * Returns 0 on success.
47 int radeon_driver_unload_kms(struct drm_device *dev)
49 struct radeon_device *rdev = dev->dev_private;
53 radeon_modeset_fini(rdev);
54 radeon_device_fini(rdev);
56 dev->dev_private = NULL;
61 * radeon_driver_load_kms - Main load function for KMS.
63 * @dev: drm dev pointer
64 * @flags: device flags
66 * This is the main load function for KMS (all asics).
67 * It calls radeon_device_init() to set up the non-display
68 * parts of the chip (asic init, CP, writeback, etc.), and
69 * radeon_modeset_init() to set up the display parts
70 * (crtcs, encoders, hotplug detect, etc.).
71 * Returns 0 on success, error on failure.
73 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags)
75 struct radeon_device *rdev;
78 rdev = kzalloc(sizeof(struct radeon_device), GFP_KERNEL);
82 dev->dev_private = (void *)rdev;
85 if (drm_pci_device_is_agp(dev)) {
86 flags |= RADEON_IS_AGP;
87 } else if (pci_is_pcie(dev->pdev)) {
88 flags |= RADEON_IS_PCIE;
90 flags |= RADEON_IS_PCI;
93 /* radeon_device_init should report only fatal error
94 * like memory allocation failure or iomapping failure,
95 * or memory manager initialization failure, it must
96 * properly initialize the GPU MC controller and permit
99 r = radeon_device_init(rdev, dev, dev->pdev, flags);
101 dev_err(&dev->pdev->dev, "Fatal error during GPU init\n");
105 /* Call ACPI methods */
106 acpi_status = radeon_acpi_init(rdev);
108 dev_dbg(&dev->pdev->dev, "Error during ACPI methods call\n");
110 /* Again modeset_init should fail only on fatal error
111 * otherwise it should provide enough functionalities
112 * for shadowfb to run
114 r = radeon_modeset_init(rdev);
116 dev_err(&dev->pdev->dev, "Fatal error during modeset init\n");
119 radeon_driver_unload_kms(dev);
124 * radeon_set_filp_rights - Set filp right.
126 * @dev: drm dev pointer
131 * Sets the filp rights for the device (all asics).
133 static void radeon_set_filp_rights(struct drm_device *dev,
134 struct drm_file **owner,
135 struct drm_file *applier,
138 mutex_lock(&dev->struct_mutex);
143 } else if (*value == 0) {
145 if (*owner == applier)
148 *value = *owner == applier ? 1 : 0;
149 mutex_unlock(&dev->struct_mutex);
153 * Userspace get information ioctl
156 * radeon_info_ioctl - answer a device specific request.
158 * @rdev: radeon device pointer
159 * @data: request object
162 * This function is used to pass device specific parameters to the userspace
163 * drivers. Examples include: pci device id, pipeline parms, tiling params,
165 * Returns 0 on success, -EINVAL on failure.
167 int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
169 struct radeon_device *rdev = dev->dev_private;
170 struct drm_radeon_info *info;
171 struct radeon_mode_info *minfo = &rdev->mode_info;
174 struct drm_crtc *crtc;
178 value_ptr = (uint32_t *)((unsigned long)info->value);
179 if (DRM_COPY_FROM_USER(&value, value_ptr, sizeof(value)))
182 switch (info->request) {
183 case RADEON_INFO_DEVICE_ID:
184 value = dev->pci_device;
186 case RADEON_INFO_NUM_GB_PIPES:
187 value = rdev->num_gb_pipes;
189 case RADEON_INFO_NUM_Z_PIPES:
190 value = rdev->num_z_pipes;
192 case RADEON_INFO_ACCEL_WORKING:
193 /* xf86-video-ati 6.13.0 relies on this being false for evergreen */
194 if ((rdev->family >= CHIP_CEDAR) && (rdev->family <= CHIP_HEMLOCK))
197 value = rdev->accel_working;
199 case RADEON_INFO_CRTC_FROM_ID:
200 for (i = 0, found = 0; i < rdev->num_crtc; i++) {
201 crtc = (struct drm_crtc *)minfo->crtcs[i];
202 if (crtc && crtc->base.id == value) {
203 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
204 value = radeon_crtc->crtc_id;
210 DRM_DEBUG_KMS("unknown crtc id %d\n", value);
214 case RADEON_INFO_ACCEL_WORKING2:
215 value = rdev->accel_working;
217 case RADEON_INFO_TILING_CONFIG:
218 if (rdev->family >= CHIP_TAHITI)
219 value = rdev->config.si.tile_config;
220 else if (rdev->family >= CHIP_CAYMAN)
221 value = rdev->config.cayman.tile_config;
222 else if (rdev->family >= CHIP_CEDAR)
223 value = rdev->config.evergreen.tile_config;
224 else if (rdev->family >= CHIP_RV770)
225 value = rdev->config.rv770.tile_config;
226 else if (rdev->family >= CHIP_R600)
227 value = rdev->config.r600.tile_config;
229 DRM_DEBUG_KMS("tiling config is r6xx+ only!\n");
233 case RADEON_INFO_WANT_HYPERZ:
234 /* The "value" here is both an input and output parameter.
235 * If the input value is 1, filp requests hyper-z access.
236 * If the input value is 0, filp revokes its hyper-z access.
238 * When returning, the value is 1 if filp owns hyper-z access,
241 DRM_DEBUG_KMS("WANT_HYPERZ: invalid value %d\n", value);
244 radeon_set_filp_rights(dev, &rdev->hyperz_filp, filp, &value);
246 case RADEON_INFO_WANT_CMASK:
247 /* The same logic as Hyper-Z. */
249 DRM_DEBUG_KMS("WANT_CMASK: invalid value %d\n", value);
252 radeon_set_filp_rights(dev, &rdev->cmask_filp, filp, &value);
254 case RADEON_INFO_CLOCK_CRYSTAL_FREQ:
255 /* return clock value in KHz */
256 value = rdev->clock.spll.reference_freq * 10;
258 case RADEON_INFO_NUM_BACKENDS:
259 if (rdev->family >= CHIP_TAHITI)
260 value = rdev->config.si.max_backends_per_se *
261 rdev->config.si.max_shader_engines;
262 else if (rdev->family >= CHIP_CAYMAN)
263 value = rdev->config.cayman.max_backends_per_se *
264 rdev->config.cayman.max_shader_engines;
265 else if (rdev->family >= CHIP_CEDAR)
266 value = rdev->config.evergreen.max_backends;
267 else if (rdev->family >= CHIP_RV770)
268 value = rdev->config.rv770.max_backends;
269 else if (rdev->family >= CHIP_R600)
270 value = rdev->config.r600.max_backends;
275 case RADEON_INFO_NUM_TILE_PIPES:
276 if (rdev->family >= CHIP_TAHITI)
277 value = rdev->config.si.max_tile_pipes;
278 else if (rdev->family >= CHIP_CAYMAN)
279 value = rdev->config.cayman.max_tile_pipes;
280 else if (rdev->family >= CHIP_CEDAR)
281 value = rdev->config.evergreen.max_tile_pipes;
282 else if (rdev->family >= CHIP_RV770)
283 value = rdev->config.rv770.max_tile_pipes;
284 else if (rdev->family >= CHIP_R600)
285 value = rdev->config.r600.max_tile_pipes;
290 case RADEON_INFO_FUSION_GART_WORKING:
293 case RADEON_INFO_BACKEND_MAP:
294 if (rdev->family >= CHIP_TAHITI)
295 value = rdev->config.si.backend_map;
296 else if (rdev->family >= CHIP_CAYMAN)
297 value = rdev->config.cayman.backend_map;
298 else if (rdev->family >= CHIP_CEDAR)
299 value = rdev->config.evergreen.backend_map;
300 else if (rdev->family >= CHIP_RV770)
301 value = rdev->config.rv770.backend_map;
302 else if (rdev->family >= CHIP_R600)
303 value = rdev->config.r600.backend_map;
308 case RADEON_INFO_VA_START:
309 /* this is where we report if vm is supported or not */
310 if (rdev->family < CHIP_CAYMAN)
312 value = RADEON_VA_RESERVED_SIZE;
314 case RADEON_INFO_IB_VM_MAX_SIZE:
315 /* this is where we report if vm is supported or not */
316 if (rdev->family < CHIP_CAYMAN)
318 value = RADEON_IB_VM_MAX_SIZE;
320 case RADEON_INFO_MAX_PIPES:
321 if (rdev->family >= CHIP_TAHITI)
322 value = rdev->config.si.max_cu_per_sh;
323 else if (rdev->family >= CHIP_CAYMAN)
324 value = rdev->config.cayman.max_pipes_per_simd;
325 else if (rdev->family >= CHIP_CEDAR)
326 value = rdev->config.evergreen.max_pipes;
327 else if (rdev->family >= CHIP_RV770)
328 value = rdev->config.rv770.max_pipes;
329 else if (rdev->family >= CHIP_R600)
330 value = rdev->config.r600.max_pipes;
336 DRM_DEBUG_KMS("Invalid request %d\n", info->request);
339 if (DRM_COPY_TO_USER(value_ptr, &value, sizeof(uint32_t))) {
340 DRM_ERROR("copy_to_user\n");
348 * Outdated mess for old drm with Xorg being in charge (void function now).
351 * radeon_driver_firstopen_kms - drm callback for first open
353 * @dev: drm dev pointer
355 * Nothing to be done for KMS (all asics).
356 * Returns 0 on success.
358 int radeon_driver_firstopen_kms(struct drm_device *dev)
364 * radeon_driver_firstopen_kms - drm callback for last close
366 * @dev: drm dev pointer
368 * Switch vga switcheroo state after last close (all asics).
370 void radeon_driver_lastclose_kms(struct drm_device *dev)
372 vga_switcheroo_process_delayed_switch();
376 * radeon_driver_open_kms - drm callback for open
378 * @dev: drm dev pointer
379 * @file_priv: drm file
381 * On device open, init vm on cayman+ (all asics).
382 * Returns 0 on success, error on failure.
384 int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv)
386 struct radeon_device *rdev = dev->dev_private;
388 file_priv->driver_priv = NULL;
390 /* new gpu have virtual address space support */
391 if (rdev->family >= CHIP_CAYMAN) {
392 struct radeon_fpriv *fpriv;
395 fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
396 if (unlikely(!fpriv)) {
400 r = radeon_vm_init(rdev, &fpriv->vm);
402 radeon_vm_fini(rdev, &fpriv->vm);
407 file_priv->driver_priv = fpriv;
413 * radeon_driver_postclose_kms - drm callback for post close
415 * @dev: drm dev pointer
416 * @file_priv: drm file
418 * On device post close, tear down vm on cayman+ (all asics).
420 void radeon_driver_postclose_kms(struct drm_device *dev,
421 struct drm_file *file_priv)
423 struct radeon_device *rdev = dev->dev_private;
425 /* new gpu have virtual address space support */
426 if (rdev->family >= CHIP_CAYMAN && file_priv->driver_priv) {
427 struct radeon_fpriv *fpriv = file_priv->driver_priv;
429 radeon_vm_fini(rdev, &fpriv->vm);
431 file_priv->driver_priv = NULL;
436 * radeon_driver_preclose_kms - drm callback for pre close
438 * @dev: drm dev pointer
439 * @file_priv: drm file
441 * On device pre close, tear down hyperz and cmask filps on r1xx-r5xx
444 void radeon_driver_preclose_kms(struct drm_device *dev,
445 struct drm_file *file_priv)
447 struct radeon_device *rdev = dev->dev_private;
448 if (rdev->hyperz_filp == file_priv)
449 rdev->hyperz_filp = NULL;
450 if (rdev->cmask_filp == file_priv)
451 rdev->cmask_filp = NULL;
455 * VBlank related functions.
458 * radeon_get_vblank_counter_kms - get frame count
460 * @dev: drm dev pointer
461 * @crtc: crtc to get the frame count from
463 * Gets the frame count on the requested crtc (all asics).
464 * Returns frame count on success, -EINVAL on failure.
466 u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc)
468 struct radeon_device *rdev = dev->dev_private;
470 if (crtc < 0 || crtc >= rdev->num_crtc) {
471 DRM_ERROR("Invalid crtc %d\n", crtc);
475 return radeon_get_vblank_counter(rdev, crtc);
479 * radeon_enable_vblank_kms - enable vblank interrupt
481 * @dev: drm dev pointer
482 * @crtc: crtc to enable vblank interrupt for
484 * Enable the interrupt on the requested crtc (all asics).
485 * Returns 0 on success, -EINVAL on failure.
487 int radeon_enable_vblank_kms(struct drm_device *dev, int crtc)
489 struct radeon_device *rdev = dev->dev_private;
490 unsigned long irqflags;
493 if (crtc < 0 || crtc >= rdev->num_crtc) {
494 DRM_ERROR("Invalid crtc %d\n", crtc);
498 spin_lock_irqsave(&rdev->irq.lock, irqflags);
499 rdev->irq.crtc_vblank_int[crtc] = true;
500 r = radeon_irq_set(rdev);
501 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
506 * radeon_disable_vblank_kms - disable vblank interrupt
508 * @dev: drm dev pointer
509 * @crtc: crtc to disable vblank interrupt for
511 * Disable the interrupt on the requested crtc (all asics).
513 void radeon_disable_vblank_kms(struct drm_device *dev, int crtc)
515 struct radeon_device *rdev = dev->dev_private;
516 unsigned long irqflags;
518 if (crtc < 0 || crtc >= rdev->num_crtc) {
519 DRM_ERROR("Invalid crtc %d\n", crtc);
523 spin_lock_irqsave(&rdev->irq.lock, irqflags);
524 rdev->irq.crtc_vblank_int[crtc] = false;
525 radeon_irq_set(rdev);
526 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
530 * radeon_get_vblank_timestamp_kms - get vblank timestamp
532 * @dev: drm dev pointer
533 * @crtc: crtc to get the timestamp for
534 * @max_error: max error
535 * @vblank_time: time value
536 * @flags: flags passed to the driver
538 * Gets the timestamp on the requested crtc based on the
539 * scanout position. (all asics).
540 * Returns postive status flags on success, negative error on failure.
542 int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc,
544 struct timeval *vblank_time,
547 struct drm_crtc *drmcrtc;
548 struct radeon_device *rdev = dev->dev_private;
550 if (crtc < 0 || crtc >= dev->num_crtcs) {
551 DRM_ERROR("Invalid crtc %d\n", crtc);
555 /* Get associated drm_crtc: */
556 drmcrtc = &rdev->mode_info.crtcs[crtc]->base;
558 /* Helper routine in DRM core does all the work: */
559 return drm_calc_vbltimestamp_from_scanoutpos(dev, crtc, max_error,
567 int radeon_dma_ioctl_kms(struct drm_device *dev, void *data,
568 struct drm_file *file_priv)
570 /* Not valid in KMS. */
574 #define KMS_INVALID_IOCTL(name) \
575 int name(struct drm_device *dev, void *data, struct drm_file *file_priv)\
577 DRM_ERROR("invalid ioctl with kms %s\n", __func__); \
582 * All these ioctls are invalid in kms world.
584 KMS_INVALID_IOCTL(radeon_cp_init_kms)
585 KMS_INVALID_IOCTL(radeon_cp_start_kms)
586 KMS_INVALID_IOCTL(radeon_cp_stop_kms)
587 KMS_INVALID_IOCTL(radeon_cp_reset_kms)
588 KMS_INVALID_IOCTL(radeon_cp_idle_kms)
589 KMS_INVALID_IOCTL(radeon_cp_resume_kms)
590 KMS_INVALID_IOCTL(radeon_engine_reset_kms)
591 KMS_INVALID_IOCTL(radeon_fullscreen_kms)
592 KMS_INVALID_IOCTL(radeon_cp_swap_kms)
593 KMS_INVALID_IOCTL(radeon_cp_clear_kms)
594 KMS_INVALID_IOCTL(radeon_cp_vertex_kms)
595 KMS_INVALID_IOCTL(radeon_cp_indices_kms)
596 KMS_INVALID_IOCTL(radeon_cp_texture_kms)
597 KMS_INVALID_IOCTL(radeon_cp_stipple_kms)
598 KMS_INVALID_IOCTL(radeon_cp_indirect_kms)
599 KMS_INVALID_IOCTL(radeon_cp_vertex2_kms)
600 KMS_INVALID_IOCTL(radeon_cp_cmdbuf_kms)
601 KMS_INVALID_IOCTL(radeon_cp_getparam_kms)
602 KMS_INVALID_IOCTL(radeon_cp_flip_kms)
603 KMS_INVALID_IOCTL(radeon_mem_alloc_kms)
604 KMS_INVALID_IOCTL(radeon_mem_free_kms)
605 KMS_INVALID_IOCTL(radeon_mem_init_heap_kms)
606 KMS_INVALID_IOCTL(radeon_irq_emit_kms)
607 KMS_INVALID_IOCTL(radeon_irq_wait_kms)
608 KMS_INVALID_IOCTL(radeon_cp_setparam_kms)
609 KMS_INVALID_IOCTL(radeon_surface_alloc_kms)
610 KMS_INVALID_IOCTL(radeon_surface_free_kms)
613 struct drm_ioctl_desc radeon_ioctls_kms[] = {
614 DRM_IOCTL_DEF_DRV(RADEON_CP_INIT, radeon_cp_init_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
615 DRM_IOCTL_DEF_DRV(RADEON_CP_START, radeon_cp_start_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
616 DRM_IOCTL_DEF_DRV(RADEON_CP_STOP, radeon_cp_stop_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
617 DRM_IOCTL_DEF_DRV(RADEON_CP_RESET, radeon_cp_reset_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
618 DRM_IOCTL_DEF_DRV(RADEON_CP_IDLE, radeon_cp_idle_kms, DRM_AUTH),
619 DRM_IOCTL_DEF_DRV(RADEON_CP_RESUME, radeon_cp_resume_kms, DRM_AUTH),
620 DRM_IOCTL_DEF_DRV(RADEON_RESET, radeon_engine_reset_kms, DRM_AUTH),
621 DRM_IOCTL_DEF_DRV(RADEON_FULLSCREEN, radeon_fullscreen_kms, DRM_AUTH),
622 DRM_IOCTL_DEF_DRV(RADEON_SWAP, radeon_cp_swap_kms, DRM_AUTH),
623 DRM_IOCTL_DEF_DRV(RADEON_CLEAR, radeon_cp_clear_kms, DRM_AUTH),
624 DRM_IOCTL_DEF_DRV(RADEON_VERTEX, radeon_cp_vertex_kms, DRM_AUTH),
625 DRM_IOCTL_DEF_DRV(RADEON_INDICES, radeon_cp_indices_kms, DRM_AUTH),
626 DRM_IOCTL_DEF_DRV(RADEON_TEXTURE, radeon_cp_texture_kms, DRM_AUTH),
627 DRM_IOCTL_DEF_DRV(RADEON_STIPPLE, radeon_cp_stipple_kms, DRM_AUTH),
628 DRM_IOCTL_DEF_DRV(RADEON_INDIRECT, radeon_cp_indirect_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
629 DRM_IOCTL_DEF_DRV(RADEON_VERTEX2, radeon_cp_vertex2_kms, DRM_AUTH),
630 DRM_IOCTL_DEF_DRV(RADEON_CMDBUF, radeon_cp_cmdbuf_kms, DRM_AUTH),
631 DRM_IOCTL_DEF_DRV(RADEON_GETPARAM, radeon_cp_getparam_kms, DRM_AUTH),
632 DRM_IOCTL_DEF_DRV(RADEON_FLIP, radeon_cp_flip_kms, DRM_AUTH),
633 DRM_IOCTL_DEF_DRV(RADEON_ALLOC, radeon_mem_alloc_kms, DRM_AUTH),
634 DRM_IOCTL_DEF_DRV(RADEON_FREE, radeon_mem_free_kms, DRM_AUTH),
635 DRM_IOCTL_DEF_DRV(RADEON_INIT_HEAP, radeon_mem_init_heap_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
636 DRM_IOCTL_DEF_DRV(RADEON_IRQ_EMIT, radeon_irq_emit_kms, DRM_AUTH),
637 DRM_IOCTL_DEF_DRV(RADEON_IRQ_WAIT, radeon_irq_wait_kms, DRM_AUTH),
638 DRM_IOCTL_DEF_DRV(RADEON_SETPARAM, radeon_cp_setparam_kms, DRM_AUTH),
639 DRM_IOCTL_DEF_DRV(RADEON_SURF_ALLOC, radeon_surface_alloc_kms, DRM_AUTH),
640 DRM_IOCTL_DEF_DRV(RADEON_SURF_FREE, radeon_surface_free_kms, DRM_AUTH),
642 DRM_IOCTL_DEF_DRV(RADEON_GEM_INFO, radeon_gem_info_ioctl, DRM_AUTH|DRM_UNLOCKED),
643 DRM_IOCTL_DEF_DRV(RADEON_GEM_CREATE, radeon_gem_create_ioctl, DRM_AUTH|DRM_UNLOCKED),
644 DRM_IOCTL_DEF_DRV(RADEON_GEM_MMAP, radeon_gem_mmap_ioctl, DRM_AUTH|DRM_UNLOCKED),
645 DRM_IOCTL_DEF_DRV(RADEON_GEM_SET_DOMAIN, radeon_gem_set_domain_ioctl, DRM_AUTH|DRM_UNLOCKED),
646 DRM_IOCTL_DEF_DRV(RADEON_GEM_PREAD, radeon_gem_pread_ioctl, DRM_AUTH|DRM_UNLOCKED),
647 DRM_IOCTL_DEF_DRV(RADEON_GEM_PWRITE, radeon_gem_pwrite_ioctl, DRM_AUTH|DRM_UNLOCKED),
648 DRM_IOCTL_DEF_DRV(RADEON_GEM_WAIT_IDLE, radeon_gem_wait_idle_ioctl, DRM_AUTH|DRM_UNLOCKED),
649 DRM_IOCTL_DEF_DRV(RADEON_CS, radeon_cs_ioctl, DRM_AUTH|DRM_UNLOCKED),
650 DRM_IOCTL_DEF_DRV(RADEON_INFO, radeon_info_ioctl, DRM_AUTH|DRM_UNLOCKED),
651 DRM_IOCTL_DEF_DRV(RADEON_GEM_SET_TILING, radeon_gem_set_tiling_ioctl, DRM_AUTH|DRM_UNLOCKED),
652 DRM_IOCTL_DEF_DRV(RADEON_GEM_GET_TILING, radeon_gem_get_tiling_ioctl, DRM_AUTH|DRM_UNLOCKED),
653 DRM_IOCTL_DEF_DRV(RADEON_GEM_BUSY, radeon_gem_busy_ioctl, DRM_AUTH|DRM_UNLOCKED),
654 DRM_IOCTL_DEF_DRV(RADEON_GEM_VA, radeon_gem_va_ioctl, DRM_AUTH|DRM_UNLOCKED),
656 int radeon_max_kms_ioctl = DRM_ARRAY_SIZE(radeon_ioctls_kms);