drivers/gpu/drm/radeon/radeon_kms.c

   1 /*
   2  * Copyright 2008 Advanced Micro Devices, Inc.
   3  * Copyright 2008 Red Hat Inc.
   4  * Copyright 2009 Jerome Glisse.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22  * OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors: Dave Airlie
  25  *          Alex Deucher
  26  *          Jerome Glisse
  27  */
  28 #include "drmP.h"
  29 #include "drm_sarea.h"
  30 #include "radeon.h"
  31 #include "radeon_drm.h"
  32 #include "radeon_asic.h"
  33
  34 #include <linux/vga_switcheroo.h>
  35 #include <linux/slab.h>
  36
  37 /**
  38  * radeon_driver_unload_kms - Main unload function for KMS.
  39  *
  40  * @dev: drm dev pointer
  41  *
  42  * This is the main unload function for KMS (all asics).
  43  * It calls radeon_modeset_fini() to tear down the
  44  * displays, and radeon_device_fini() to tear down
  45  * the rest of the device (CP, writeback, etc.).
  46  * Returns 0 on success.
  47  */
  48 int radeon_driver_unload_kms(struct drm_device *dev)
  49 {
  50         struct radeon_device *rdev = dev->dev_private;
  51
  52         if (rdev == NULL)
  53                 return 0;
  54         radeon_modeset_fini(rdev);
  55         radeon_device_fini(rdev);
  56         kfree(rdev);
  57         dev->dev_private = NULL;
  58         return 0;
  59 }
  60
  61 /**
  62  * radeon_driver_load_kms - Main load function for KMS.
  63  *
  64  * @dev: drm dev pointer
  65  * @flags: device flags
  66  *
  67  * This is the main load function for KMS (all asics).
  68  * It calls radeon_device_init() to set up the non-display
  69  * parts of the chip (asic init, CP, writeback, etc.), and
  70  * radeon_modeset_init() to set up the display parts
  71  * (crtcs, encoders, hotplug detect, etc.).
  72  * Returns 0 on success, error on failure.
  73  */
  74 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags)
  75 {
  76         struct radeon_device *rdev;
  77         int r, acpi_status;
  78
  79         rdev = kzalloc(sizeof(struct radeon_device), GFP_KERNEL);
  80         if (rdev == NULL) {
  81                 return -ENOMEM;
  82         }
  83         dev->dev_private = (void *)rdev;
  84
  85         /* update BUS flag */
  86         if (drm_pci_device_is_agp(dev)) {
  87                 flags |= RADEON_IS_AGP;
  88         } else if (pci_is_pcie(dev->pdev)) {
  89                 flags |= RADEON_IS_PCIE;
  90         } else {
  91                 flags |= RADEON_IS_PCI;
  92         }
  93
  94         /* radeon_device_init should report only fatal error
  95          * like memory allocation failure or iomapping failure,
  96          * or memory manager initialization failure, it must
  97          * properly initialize the GPU MC controller and permit
  98          * VRAM allocation
  99          */
 100         r = radeon_device_init(rdev, dev, dev->pdev, flags);
 101         if (r) {
 102                 dev_err(&dev->pdev->dev, "Fatal error during GPU init\n");
 103                 goto out;
 104         }
 105
 106         /* Call ACPI methods */
 107         acpi_status = radeon_acpi_init(rdev);
 108         if (acpi_status)
 109                 dev_dbg(&dev->pdev->dev, "Error during ACPI methods call\n");
 110
 111         /* Again modeset_init should fail only on fatal error
 112          * otherwise it should provide enough functionalities
 113          * for shadowfb to run
 114          */
 115         r = radeon_modeset_init(rdev);
 116         if (r)
 117                 dev_err(&dev->pdev->dev, "Fatal error during modeset init\n");
 118 out:
 119         if (r)
 120                 radeon_driver_unload_kms(dev);
 121         return r;
 122 }
 123
 124 /**
 125  * radeon_set_filp_rights - Set filp right.
 126  *
 127  * @dev: drm dev pointer
 128  * @owner: drm file
 129  * @applier: drm file
 130  * @value: value
 131  *
 132  * Sets the filp rights for the device (all asics).
 133  */
 134 static void radeon_set_filp_rights(struct drm_device *dev,
 135                                    struct drm_file **owner,
 136                                    struct drm_file *applier,
 137                                    uint32_t *value)
 138 {
 139         mutex_lock(&dev->struct_mutex);
 140         if (*value == 1) {
 141                 /* wants rights */
 142                 if (!*owner)
 143                         *owner = applier;
 144         } else if (*value == 0) {
 145                 /* revokes rights */
 146                 if (*owner == applier)
 147                         *owner = NULL;
 148         }
 149         *value = *owner == applier ? 1 : 0;
 150         mutex_unlock(&dev->struct_mutex);
 151 }
 152
 153 /*
 154  * Userspace get information ioctl
 155  */
 156 /**
 157  * radeon_info_ioctl - answer a device specific request.
 158  *
 159  * @rdev: radeon device pointer
 160  * @data: request object
 161  * @filp: drm filp
 162  *
 163  * This function is used to pass device specific parameters to the userspace
 164  * drivers.  Examples include: pci device id, pipeline parms, tiling params,
 165  * etc. (all asics).
 166  * Returns 0 on success, -EINVAL on failure.
 167  */
 168 int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
 169 {
 170         struct radeon_device *rdev = dev->dev_private;
 171         struct drm_radeon_info *info = data;
 172         struct radeon_mode_info *minfo = &rdev->mode_info;
 173         uint32_t value, *value_ptr;
 174         uint64_t value64, *value_ptr64;
 175         struct drm_crtc *crtc;
 176         int i, found;
 177
 178         /* TIMESTAMP is a 64-bit value, needs special handling. */
 179         if (info->request == RADEON_INFO_TIMESTAMP) {
 180                 if (rdev->family >= CHIP_R600) {
 181                         value_ptr64 = (uint64_t*)((unsigned long)info->value);
 182                         if (rdev->family >= CHIP_TAHITI) {
 183                                 value64 = si_get_gpu_clock(rdev);
 184                         } else {
 185                                 value64 = r600_get_gpu_clock(rdev);
 186                         }
 187
 188                         if (DRM_COPY_TO_USER(value_ptr64, &value64, sizeof(value64))) {
 189                                 DRM_ERROR("copy_to_user %s:%u\n", __func__, __LINE__);
 190                                 return -EFAULT;
 191                         }
 192                         return 0;
 193                 } else {
 194                         DRM_DEBUG_KMS("timestamp is r6xx+ only!\n");
 195                         return -EINVAL;
 196                 }
 197         }
 198
 199         value_ptr = (uint32_t *)((unsigned long)info->value);
 200         if (DRM_COPY_FROM_USER(&value, value_ptr, sizeof(value))) {
 201                 DRM_ERROR("copy_from_user %s:%u\n", __func__, __LINE__);
 202                 return -EFAULT;
 203         }
 204
 205         switch (info->request) {
 206         case RADEON_INFO_DEVICE_ID:
 207                 value = dev->pci_device;
 208                 break;
 209         case RADEON_INFO_NUM_GB_PIPES:
 210                 value = rdev->num_gb_pipes;
 211                 break;
 212         case RADEON_INFO_NUM_Z_PIPES:
 213                 value = rdev->num_z_pipes;
 214                 break;
 215         case RADEON_INFO_ACCEL_WORKING:
 216                 /* xf86-video-ati 6.13.0 relies on this being false for evergreen */
 217                 if ((rdev->family >= CHIP_CEDAR) && (rdev->family <= CHIP_HEMLOCK))
 218                         value = false;
 219                 else
 220                         value = rdev->accel_working;
 221                 break;
 222         case RADEON_INFO_CRTC_FROM_ID:
 223                 for (i = 0, found = 0; i < rdev->num_crtc; i++) {
 224                         crtc = (struct drm_crtc *)minfo->crtcs[i];
 225                         if (crtc && crtc->base.id == value) {
 226                                 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
 227                                 value = radeon_crtc->crtc_id;
 228                                 found = 1;
 229                                 break;
 230                         }
 231                 }
 232                 if (!found) {
 233                         DRM_DEBUG_KMS("unknown crtc id %d\n", value);
 234                         return -EINVAL;
 235                 }
 236                 break;
 237         case RADEON_INFO_ACCEL_WORKING2:
 238                 value = rdev->accel_working;
 239                 break;
 240         case RADEON_INFO_TILING_CONFIG:
 241                 if (rdev->family >= CHIP_TAHITI)
 242                         value = rdev->config.si.tile_config;
 243                 else if (rdev->family >= CHIP_CAYMAN)
 244                         value = rdev->config.cayman.tile_config;
 245                 else if (rdev->family >= CHIP_CEDAR)
 246                         value = rdev->config.evergreen.tile_config;
 247                 else if (rdev->family >= CHIP_RV770)
 248                         value = rdev->config.rv770.tile_config;
 249                 else if (rdev->family >= CHIP_R600)
 250                         value = rdev->config.r600.tile_config;
 251                 else {
 252                         DRM_DEBUG_KMS("tiling config is r6xx+ only!\n");
 253                         return -EINVAL;
 254                 }
 255                 break;
 256         case RADEON_INFO_WANT_HYPERZ:
 257                 /* The "value" here is both an input and output parameter.
 258                  * If the input value is 1, filp requests hyper-z access.
 259                  * If the input value is 0, filp revokes its hyper-z access.
 260                  *
 261                  * When returning, the value is 1 if filp owns hyper-z access,
 262                  * 0 otherwise. */
 263                 if (value >= 2) {
 264                         DRM_DEBUG_KMS("WANT_HYPERZ: invalid value %d\n", value);
 265                         return -EINVAL;
 266                 }
 267                 radeon_set_filp_rights(dev, &rdev->hyperz_filp, filp, &value);
 268                 break;
 269         case RADEON_INFO_WANT_CMASK:
 270                 /* The same logic as Hyper-Z. */
 271                 if (value >= 2) {
 272                         DRM_DEBUG_KMS("WANT_CMASK: invalid value %d\n", value);
 273                         return -EINVAL;
 274                 }
 275                 radeon_set_filp_rights(dev, &rdev->cmask_filp, filp, &value);
 276                 break;
 277         case RADEON_INFO_CLOCK_CRYSTAL_FREQ:
 278                 /* return clock value in KHz */
 279                 value = rdev->clock.spll.reference_freq * 10;
 280                 break;
 281         case RADEON_INFO_NUM_BACKENDS:
 282                 if (rdev->family >= CHIP_TAHITI)
 283                         value = rdev->config.si.max_backends_per_se *
 284                                 rdev->config.si.max_shader_engines;
 285                 else if (rdev->family >= CHIP_CAYMAN)
 286                         value = rdev->config.cayman.max_backends_per_se *
 287                                 rdev->config.cayman.max_shader_engines;
 288                 else if (rdev->family >= CHIP_CEDAR)
 289                         value = rdev->config.evergreen.max_backends;
 290                 else if (rdev->family >= CHIP_RV770)
 291                         value = rdev->config.rv770.max_backends;
 292                 else if (rdev->family >= CHIP_R600)
 293                         value = rdev->config.r600.max_backends;
 294                 else {
 295                         return -EINVAL;
 296                 }
 297                 break;
 298         case RADEON_INFO_NUM_TILE_PIPES:
 299                 if (rdev->family >= CHIP_TAHITI)
 300                         value = rdev->config.si.max_tile_pipes;
 301                 else if (rdev->family >= CHIP_CAYMAN)
 302                         value = rdev->config.cayman.max_tile_pipes;
 303                 else if (rdev->family >= CHIP_CEDAR)
 304                         value = rdev->config.evergreen.max_tile_pipes;
 305                 else if (rdev->family >= CHIP_RV770)
 306                         value = rdev->config.rv770.max_tile_pipes;
 307                 else if (rdev->family >= CHIP_R600)
 308                         value = rdev->config.r600.max_tile_pipes;
 309                 else {
 310                         return -EINVAL;
 311                 }
 312                 break;
 313         case RADEON_INFO_FUSION_GART_WORKING:
 314                 value = 1;
 315                 break;
 316         case RADEON_INFO_BACKEND_MAP:
 317                 if (rdev->family >= CHIP_TAHITI)
 318                         value = rdev->config.si.backend_map;
 319                 else if (rdev->family >= CHIP_CAYMAN)
 320                         value = rdev->config.cayman.backend_map;
 321                 else if (rdev->family >= CHIP_CEDAR)
 322                         value = rdev->config.evergreen.backend_map;
 323                 else if (rdev->family >= CHIP_RV770)
 324                         value = rdev->config.rv770.backend_map;
 325                 else if (rdev->family >= CHIP_R600)
 326                         value = rdev->config.r600.backend_map;
 327                 else {
 328                         return -EINVAL;
 329                 }
 330                 break;
 331         case RADEON_INFO_VA_START:
 332                 /* this is where we report if vm is supported or not */
 333                 if (rdev->family < CHIP_CAYMAN)
 334                         return -EINVAL;
 335                 value = RADEON_VA_RESERVED_SIZE;
 336                 break;
 337         case RADEON_INFO_IB_VM_MAX_SIZE:
 338                 /* this is where we report if vm is supported or not */
 339                 if (rdev->family < CHIP_CAYMAN)
 340                         return -EINVAL;
 341                 value = RADEON_IB_VM_MAX_SIZE;
 342                 break;
 343         case RADEON_INFO_MAX_PIPES:
 344                 if (rdev->family >= CHIP_TAHITI)
 345                         value = rdev->config.si.max_cu_per_sh;
 346                 else if (rdev->family >= CHIP_CAYMAN)
 347                         value = rdev->config.cayman.max_pipes_per_simd;
 348                 else if (rdev->family >= CHIP_CEDAR)
 349                         value = rdev->config.evergreen.max_pipes;
 350                 else if (rdev->family >= CHIP_RV770)
 351                         value = rdev->config.rv770.max_pipes;
 352                 else if (rdev->family >= CHIP_R600)
 353                         value = rdev->config.r600.max_pipes;
 354                 else {
 355                         return -EINVAL;
 356                 }
 357                 break;
 358         default:
 359                 DRM_DEBUG_KMS("Invalid request %d\n", info->request);
 360                 return -EINVAL;
 361         }
 362         if (DRM_COPY_TO_USER(value_ptr, &value, sizeof(uint32_t))) {
 363                 DRM_ERROR("copy_to_user %s:%u\n", __func__, __LINE__);
 364                 return -EFAULT;
 365         }
 366         return 0;
 367 }
 368
 369
 370 /*
 371  * Outdated mess for old drm with Xorg being in charge (void function now).
 372  */
 373 /**
 374  * radeon_driver_firstopen_kms - drm callback for first open
 375  *
 376  * @dev: drm dev pointer
 377  *
 378  * Nothing to be done for KMS (all asics).
 379  * Returns 0 on success.
 380  */
 381 int radeon_driver_firstopen_kms(struct drm_device *dev)
 382 {
 383         return 0;
 384 }
 385
 386 /**
 387  * radeon_driver_firstopen_kms - drm callback for last close
 388  *
 389  * @dev: drm dev pointer
 390  *
 391  * Switch vga switcheroo state after last close (all asics).
 392  */
 393 void radeon_driver_lastclose_kms(struct drm_device *dev)
 394 {
 395         vga_switcheroo_process_delayed_switch();
 396 }
 397
 398 /**
 399  * radeon_driver_open_kms - drm callback for open
 400  *
 401  * @dev: drm dev pointer
 402  * @file_priv: drm file
 403  *
 404  * On device open, init vm on cayman+ (all asics).
 405  * Returns 0 on success, error on failure.
 406  */
 407 int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv)
 408 {
 409         struct radeon_device *rdev = dev->dev_private;
 410
 411         file_priv->driver_priv = NULL;
 412
 413         /* new gpu have virtual address space support */
 414         if (rdev->family >= CHIP_CAYMAN) {
 415                 struct radeon_fpriv *fpriv;
 416                 int r;
 417
 418                 fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
 419                 if (unlikely(!fpriv)) {
 420                         return -ENOMEM;
 421                 }
 422
 423                 r = radeon_vm_init(rdev, &fpriv->vm);
 424                 if (r) {
 425                         radeon_vm_fini(rdev, &fpriv->vm);
 426                         kfree(fpriv);
 427                         return r;
 428                 }
 429
 430                 file_priv->driver_priv = fpriv;
 431         }
 432         return 0;
 433 }
 434
 435 /**
 436  * radeon_driver_postclose_kms - drm callback for post close
 437  *
 438  * @dev: drm dev pointer
 439  * @file_priv: drm file
 440  *
 441  * On device post close, tear down vm on cayman+ (all asics).
 442  */
 443 void radeon_driver_postclose_kms(struct drm_device *dev,
 444                                  struct drm_file *file_priv)
 445 {
 446         struct radeon_device *rdev = dev->dev_private;
 447
 448         /* new gpu have virtual address space support */
 449         if (rdev->family >= CHIP_CAYMAN && file_priv->driver_priv) {
 450                 struct radeon_fpriv *fpriv = file_priv->driver_priv;
 451
 452                 radeon_vm_fini(rdev, &fpriv->vm);
 453                 kfree(fpriv);
 454                 file_priv->driver_priv = NULL;
 455         }
 456 }
 457
 458 /**
 459  * radeon_driver_preclose_kms - drm callback for pre close
 460  *
 461  * @dev: drm dev pointer
 462  * @file_priv: drm file
 463  *
 464  * On device pre close, tear down hyperz and cmask filps on r1xx-r5xx
 465  * (all asics).
 466  */
 467 void radeon_driver_preclose_kms(struct drm_device *dev,
 468                                 struct drm_file *file_priv)
 469 {
 470         struct radeon_device *rdev = dev->dev_private;
 471         if (rdev->hyperz_filp == file_priv)
 472                 rdev->hyperz_filp = NULL;
 473         if (rdev->cmask_filp == file_priv)
 474                 rdev->cmask_filp = NULL;
 475 }
 476
 477 /*
 478  * VBlank related functions.
 479  */
 480 /**
 481  * radeon_get_vblank_counter_kms - get frame count
 482  *
 483  * @dev: drm dev pointer
 484  * @crtc: crtc to get the frame count from
 485  *
 486  * Gets the frame count on the requested crtc (all asics).
 487  * Returns frame count on success, -EINVAL on failure.
 488  */
 489 u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc)
 490 {
 491         struct radeon_device *rdev = dev->dev_private;
 492
 493         if (crtc < 0 || crtc >= rdev->num_crtc) {
 494                 DRM_ERROR("Invalid crtc %d\n", crtc);
 495                 return -EINVAL;
 496         }
 497
 498         return radeon_get_vblank_counter(rdev, crtc);
 499 }
 500
 501 /**
 502  * radeon_enable_vblank_kms - enable vblank interrupt
 503  *
 504  * @dev: drm dev pointer
 505  * @crtc: crtc to enable vblank interrupt for
 506  *
 507  * Enable the interrupt on the requested crtc (all asics).
 508  * Returns 0 on success, -EINVAL on failure.
 509  */
 510 int radeon_enable_vblank_kms(struct drm_device *dev, int crtc)
 511 {
 512         struct radeon_device *rdev = dev->dev_private;
 513         unsigned long irqflags;
 514         int r;
 515
 516         if (crtc < 0 || crtc >= rdev->num_crtc) {
 517                 DRM_ERROR("Invalid crtc %d\n", crtc);
 518                 return -EINVAL;
 519         }
 520
 521         spin_lock_irqsave(&rdev->irq.lock, irqflags);
 522         rdev->irq.crtc_vblank_int[crtc] = true;
 523         r = radeon_irq_set(rdev);
 524         spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 525         return r;
 526 }
 527
 528 /**
 529  * radeon_disable_vblank_kms - disable vblank interrupt
 530  *
 531  * @dev: drm dev pointer
 532  * @crtc: crtc to disable vblank interrupt for
 533  *
 534  * Disable the interrupt on the requested crtc (all asics).
 535  */
 536 void radeon_disable_vblank_kms(struct drm_device *dev, int crtc)
 537 {
 538         struct radeon_device *rdev = dev->dev_private;
 539         unsigned long irqflags;
 540
 541         if (crtc < 0 || crtc >= rdev->num_crtc) {
 542                 DRM_ERROR("Invalid crtc %d\n", crtc);
 543                 return;
 544         }
 545
 546         spin_lock_irqsave(&rdev->irq.lock, irqflags);
 547         rdev->irq.crtc_vblank_int[crtc] = false;
 548         radeon_irq_set(rdev);
 549         spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 550 }
 551
 552 /**
 553  * radeon_get_vblank_timestamp_kms - get vblank timestamp
 554  *
 555  * @dev: drm dev pointer
 556  * @crtc: crtc to get the timestamp for
 557  * @max_error: max error
 558  * @vblank_time: time value
 559  * @flags: flags passed to the driver
 560  *
 561  * Gets the timestamp on the requested crtc based on the
 562  * scanout position.  (all asics).
 563  * Returns postive status flags on success, negative error on failure.
 564  */
 565 int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc,
 566                                     int *max_error,
 567                                     struct timeval *vblank_time,
 568                                     unsigned flags)
 569 {
 570         struct drm_crtc *drmcrtc;
 571         struct radeon_device *rdev = dev->dev_private;
 572
 573         if (crtc < 0 || crtc >= dev->num_crtcs) {
 574                 DRM_ERROR("Invalid crtc %d\n", crtc);
 575                 return -EINVAL;
 576         }
 577
 578         /* Get associated drm_crtc: */
 579         drmcrtc = &rdev->mode_info.crtcs[crtc]->base;
 580
 581         /* Helper routine in DRM core does all the work: */
 582         return drm_calc_vbltimestamp_from_scanoutpos(dev, crtc, max_error,
 583                                                      vblank_time, flags,
 584                                                      drmcrtc);
 585 }
 586
 587 /*
 588  * IOCTL.
 589  */
 590 int radeon_dma_ioctl_kms(struct drm_device *dev, void *data,
 591                          struct drm_file *file_priv)
 592 {
 593         /* Not valid in KMS. */
 594         return -EINVAL;
 595 }
 596
 597 #define KMS_INVALID_IOCTL(name)                                         \
 598 int name(struct drm_device *dev, void *data, struct drm_file *file_priv)\
 599 {                                                                       \
 600         DRM_ERROR("invalid ioctl with kms %s\n", __func__);             \
 601         return -EINVAL;                                                 \
 602 }
 603
 604 /*
 605  * All these ioctls are invalid in kms world.
 606  */
 607 KMS_INVALID_IOCTL(radeon_cp_init_kms)
 608 KMS_INVALID_IOCTL(radeon_cp_start_kms)
 609 KMS_INVALID_IOCTL(radeon_cp_stop_kms)
 610 KMS_INVALID_IOCTL(radeon_cp_reset_kms)
 611 KMS_INVALID_IOCTL(radeon_cp_idle_kms)
 612 KMS_INVALID_IOCTL(radeon_cp_resume_kms)
 613 KMS_INVALID_IOCTL(radeon_engine_reset_kms)
 614 KMS_INVALID_IOCTL(radeon_fullscreen_kms)
 615 KMS_INVALID_IOCTL(radeon_cp_swap_kms)
 616 KMS_INVALID_IOCTL(radeon_cp_clear_kms)
 617 KMS_INVALID_IOCTL(radeon_cp_vertex_kms)
 618 KMS_INVALID_IOCTL(radeon_cp_indices_kms)
 619 KMS_INVALID_IOCTL(radeon_cp_texture_kms)
 620 KMS_INVALID_IOCTL(radeon_cp_stipple_kms)
 621 KMS_INVALID_IOCTL(radeon_cp_indirect_kms)
 622 KMS_INVALID_IOCTL(radeon_cp_vertex2_kms)
 623 KMS_INVALID_IOCTL(radeon_cp_cmdbuf_kms)
 624 KMS_INVALID_IOCTL(radeon_cp_getparam_kms)
 625 KMS_INVALID_IOCTL(radeon_cp_flip_kms)
 626 KMS_INVALID_IOCTL(radeon_mem_alloc_kms)
 627 KMS_INVALID_IOCTL(radeon_mem_free_kms)
 628 KMS_INVALID_IOCTL(radeon_mem_init_heap_kms)
 629 KMS_INVALID_IOCTL(radeon_irq_emit_kms)
 630 KMS_INVALID_IOCTL(radeon_irq_wait_kms)
 631 KMS_INVALID_IOCTL(radeon_cp_setparam_kms)
 632 KMS_INVALID_IOCTL(radeon_surface_alloc_kms)
 633 KMS_INVALID_IOCTL(radeon_surface_free_kms)
 634
 635
 636 struct drm_ioctl_desc radeon_ioctls_kms[] = {
 637         DRM_IOCTL_DEF_DRV(RADEON_CP_INIT, radeon_cp_init_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
 638         DRM_IOCTL_DEF_DRV(RADEON_CP_START, radeon_cp_start_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
 639         DRM_IOCTL_DEF_DRV(RADEON_CP_STOP, radeon_cp_stop_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
 640         DRM_IOCTL_DEF_DRV(RADEON_CP_RESET, radeon_cp_reset_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
 641         DRM_IOCTL_DEF_DRV(RADEON_CP_IDLE, radeon_cp_idle_kms, DRM_AUTH),
 642         DRM_IOCTL_DEF_DRV(RADEON_CP_RESUME, radeon_cp_resume_kms, DRM_AUTH),
 643         DRM_IOCTL_DEF_DRV(RADEON_RESET, radeon_engine_reset_kms, DRM_AUTH),
 644         DRM_IOCTL_DEF_DRV(RADEON_FULLSCREEN, radeon_fullscreen_kms, DRM_AUTH),
 645         DRM_IOCTL_DEF_DRV(RADEON_SWAP, radeon_cp_swap_kms, DRM_AUTH),
 646         DRM_IOCTL_DEF_DRV(RADEON_CLEAR, radeon_cp_clear_kms, DRM_AUTH),
 647         DRM_IOCTL_DEF_DRV(RADEON_VERTEX, radeon_cp_vertex_kms, DRM_AUTH),
 648         DRM_IOCTL_DEF_DRV(RADEON_INDICES, radeon_cp_indices_kms, DRM_AUTH),
 649         DRM_IOCTL_DEF_DRV(RADEON_TEXTURE, radeon_cp_texture_kms, DRM_AUTH),
 650         DRM_IOCTL_DEF_DRV(RADEON_STIPPLE, radeon_cp_stipple_kms, DRM_AUTH),
 651         DRM_IOCTL_DEF_DRV(RADEON_INDIRECT, radeon_cp_indirect_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
 652         DRM_IOCTL_DEF_DRV(RADEON_VERTEX2, radeon_cp_vertex2_kms, DRM_AUTH),
 653         DRM_IOCTL_DEF_DRV(RADEON_CMDBUF, radeon_cp_cmdbuf_kms, DRM_AUTH),
 654         DRM_IOCTL_DEF_DRV(RADEON_GETPARAM, radeon_cp_getparam_kms, DRM_AUTH),
 655         DRM_IOCTL_DEF_DRV(RADEON_FLIP, radeon_cp_flip_kms, DRM_AUTH),
 656         DRM_IOCTL_DEF_DRV(RADEON_ALLOC, radeon_mem_alloc_kms, DRM_AUTH),
 657         DRM_IOCTL_DEF_DRV(RADEON_FREE, radeon_mem_free_kms, DRM_AUTH),
 658         DRM_IOCTL_DEF_DRV(RADEON_INIT_HEAP, radeon_mem_init_heap_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
 659         DRM_IOCTL_DEF_DRV(RADEON_IRQ_EMIT, radeon_irq_emit_kms, DRM_AUTH),
 660         DRM_IOCTL_DEF_DRV(RADEON_IRQ_WAIT, radeon_irq_wait_kms, DRM_AUTH),
 661         DRM_IOCTL_DEF_DRV(RADEON_SETPARAM, radeon_cp_setparam_kms, DRM_AUTH),
 662         DRM_IOCTL_DEF_DRV(RADEON_SURF_ALLOC, radeon_surface_alloc_kms, DRM_AUTH),
 663         DRM_IOCTL_DEF_DRV(RADEON_SURF_FREE, radeon_surface_free_kms, DRM_AUTH),
 664         /* KMS */
 665         DRM_IOCTL_DEF_DRV(RADEON_GEM_INFO, radeon_gem_info_ioctl, DRM_AUTH|DRM_UNLOCKED),
 666         DRM_IOCTL_DEF_DRV(RADEON_GEM_CREATE, radeon_gem_create_ioctl, DRM_AUTH|DRM_UNLOCKED),
 667         DRM_IOCTL_DEF_DRV(RADEON_GEM_MMAP, radeon_gem_mmap_ioctl, DRM_AUTH|DRM_UNLOCKED),
 668         DRM_IOCTL_DEF_DRV(RADEON_GEM_SET_DOMAIN, radeon_gem_set_domain_ioctl, DRM_AUTH|DRM_UNLOCKED),
 669         DRM_IOCTL_DEF_DRV(RADEON_GEM_PREAD, radeon_gem_pread_ioctl, DRM_AUTH|DRM_UNLOCKED),
 670         DRM_IOCTL_DEF_DRV(RADEON_GEM_PWRITE, radeon_gem_pwrite_ioctl, DRM_AUTH|DRM_UNLOCKED),
 671         DRM_IOCTL_DEF_DRV(RADEON_GEM_WAIT_IDLE, radeon_gem_wait_idle_ioctl, DRM_AUTH|DRM_UNLOCKED),
 672         DRM_IOCTL_DEF_DRV(RADEON_CS, radeon_cs_ioctl, DRM_AUTH|DRM_UNLOCKED),
 673         DRM_IOCTL_DEF_DRV(RADEON_INFO, radeon_info_ioctl, DRM_AUTH|DRM_UNLOCKED),
 674         DRM_IOCTL_DEF_DRV(RADEON_GEM_SET_TILING, radeon_gem_set_tiling_ioctl, DRM_AUTH|DRM_UNLOCKED),
 675         DRM_IOCTL_DEF_DRV(RADEON_GEM_GET_TILING, radeon_gem_get_tiling_ioctl, DRM_AUTH|DRM_UNLOCKED),
 676         DRM_IOCTL_DEF_DRV(RADEON_GEM_BUSY, radeon_gem_busy_ioctl, DRM_AUTH|DRM_UNLOCKED),
 677         DRM_IOCTL_DEF_DRV(RADEON_GEM_VA, radeon_gem_va_ioctl, DRM_AUTH|DRM_UNLOCKED),
 678 };
 679 int radeon_max_kms_ioctl = DRM_ARRAY_SIZE(radeon_ioctls_kms);