2 * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
3 * VA Linux Systems Inc., Fremont, California.
4 * Copyright 2008 Red Hat Inc.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
25 * Kevin E. Martin, Rickard E. Faith, Alan Hourihane
27 * Kernel port Author: Dave Airlie
36 #include <linux/i2c.h>
37 #include <linux/i2c-id.h>
38 #include <linux/i2c-algo-bit.h>
39 #include "radeon_fixed.h"
43 #define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base)
44 #define to_radeon_connector(x) container_of(x, struct radeon_connector, base)
45 #define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base)
46 #define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base)
48 enum radeon_connector_type {
59 CONNECTOR_HDMI_TYPE_A,
60 CONNECTOR_HDMI_TYPE_B,
64 CONNECTOR_DISPLAY_PORT,
68 enum radeon_dvi_type {
74 enum radeon_rmx_type {
92 /* radeon gpio-based i2c
93 * 1. "mask" reg and bits
94 * grabs the gpio pins for software use
99 * 3. "en" reg and bits
100 * sets the pin direction
102 * 4. "y" reg and bits
106 struct radeon_i2c_bus_rec {
108 uint32_t mask_clk_reg;
109 uint32_t mask_data_reg;
113 uint32_t en_data_reg;
116 uint32_t mask_clk_mask;
117 uint32_t mask_data_mask;
119 uint32_t a_data_mask;
120 uint32_t en_clk_mask;
121 uint32_t en_data_mask;
123 uint32_t y_data_mask;
126 struct radeon_tmds_pll {
131 #define RADEON_MAX_BIOS_CONNECTOR 16
133 #define RADEON_PLL_USE_BIOS_DIVS (1 << 0)
134 #define RADEON_PLL_NO_ODD_POST_DIV (1 << 1)
135 #define RADEON_PLL_USE_REF_DIV (1 << 2)
136 #define RADEON_PLL_LEGACY (1 << 3)
137 #define RADEON_PLL_PREFER_LOW_REF_DIV (1 << 4)
138 #define RADEON_PLL_PREFER_HIGH_REF_DIV (1 << 5)
139 #define RADEON_PLL_PREFER_LOW_FB_DIV (1 << 6)
140 #define RADEON_PLL_PREFER_HIGH_FB_DIV (1 << 7)
141 #define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8)
142 #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9)
143 #define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10)
144 #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11)
147 uint16_t reference_freq;
148 uint16_t reference_div;
151 uint32_t pll_out_min;
152 uint32_t pll_out_max;
155 uint32_t min_ref_div;
156 uint32_t max_ref_div;
157 uint32_t min_post_div;
158 uint32_t max_post_div;
159 uint32_t min_feedback_div;
160 uint32_t max_feedback_div;
161 uint32_t min_frac_feedback_div;
162 uint32_t max_frac_feedback_div;
166 struct radeon_i2c_chan {
167 struct drm_device *dev;
168 struct i2c_adapter adapter;
169 struct i2c_algo_bit_data algo;
170 struct radeon_i2c_bus_rec rec;
173 /* mostly for macs, but really any system without connector tables */
174 enum radeon_connector_table {
178 CT_POWERBOOK_EXTERNAL,
179 CT_POWERBOOK_INTERNAL,
187 enum radeon_dvo_chip {
192 struct radeon_mode_info {
193 struct atom_context *atom_context;
194 struct card_info *atom_card_info;
195 enum radeon_connector_table connector_table;
196 bool mode_config_initialized;
197 struct radeon_crtc *crtcs[2];
198 /* DVI-I properties */
199 struct drm_property *coherent_mode_property;
200 /* DAC enable load detect */
201 struct drm_property *load_detect_property;
202 /* TV standard load detect */
203 struct drm_property *tv_std_property;
204 /* legacy TMDS PLL detect */
205 struct drm_property *tmds_pll_property;
209 #define MAX_H_CODE_TIMING_LEN 32
210 #define MAX_V_CODE_TIMING_LEN 32
212 /* need to store these as reading
213 back code tables is excessive */
214 struct radeon_tv_regs {
216 uint32_t timing_cntl;
220 uint16_t h_code_timing[MAX_H_CODE_TIMING_LEN];
221 uint16_t v_code_timing[MAX_V_CODE_TIMING_LEN];
225 struct drm_crtc base;
227 u16 lut_r[256], lut_g[256], lut_b[256];
230 uint32_t crtc_offset;
231 struct drm_gem_object *cursor_bo;
232 uint64_t cursor_addr;
235 uint32_t legacy_display_base_addr;
236 uint32_t legacy_cursor_offset;
237 enum radeon_rmx_type rmx_type;
240 struct drm_display_mode native_mode;
243 struct radeon_encoder_primary_dac {
244 /* legacy primary dac */
245 uint32_t ps2_pdac_adj;
248 struct radeon_encoder_lvds {
250 uint16_t panel_vcc_delay;
251 uint8_t panel_pwr_delay;
252 uint8_t panel_digon_delay;
253 uint8_t panel_blon_delay;
254 uint16_t panel_ref_divider;
255 uint8_t panel_post_divider;
256 uint16_t panel_fb_divider;
257 bool use_bios_dividers;
258 uint32_t lvds_gen_cntl;
260 struct drm_display_mode native_mode;
263 struct radeon_encoder_tv_dac {
265 uint32_t ps2_tvdac_adj;
266 uint32_t ntsc_tvdac_adj;
267 uint32_t pal_tvdac_adj;
272 int supported_tv_stds;
274 enum radeon_tv_std tv_std;
275 struct radeon_tv_regs tv;
278 struct radeon_encoder_int_tmds {
279 /* legacy int tmds */
280 struct radeon_tmds_pll tmds_pll[4];
283 struct radeon_encoder_ext_tmds {
285 struct radeon_i2c_chan *i2c_bus;
287 enum radeon_dvo_chip dvo_chip;
290 /* spread spectrum */
291 struct radeon_atom_ss {
300 struct radeon_encoder_atom_dig {
306 uint16_t panel_pwr_delay;
307 struct radeon_atom_ss *ss;
309 struct drm_display_mode native_mode;
312 struct radeon_encoder_atom_dac {
313 enum radeon_tv_std tv_std;
316 struct radeon_encoder {
317 struct drm_encoder base;
320 uint32_t active_device;
322 uint32_t pixel_clock;
323 enum radeon_rmx_type rmx_type;
324 struct drm_display_mode native_mode;
328 struct radeon_connector_atom_dig {
329 uint32_t igp_lane_info;
333 struct radeon_connector {
334 struct drm_connector base;
335 uint32_t connector_id;
337 struct radeon_i2c_chan *ddc_bus;
338 /* some systems have a an hdmi and vga port with a shared ddc line */
341 /* we need to mind the EDID between detect
342 and get modes due to analog/digital/tvencoder */
345 bool dac_load_detect;
346 uint16_t connector_object_id;
349 struct radeon_framebuffer {
350 struct drm_framebuffer base;
351 struct drm_gem_object *obj;
354 extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev,
355 struct radeon_i2c_bus_rec *rec,
357 extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c);
358 extern void radeon_i2c_sw_get_byte(struct radeon_i2c_chan *i2c_bus,
362 extern void radeon_i2c_sw_put_byte(struct radeon_i2c_chan *i2c,
366 extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector);
367 extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector);
369 extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector);
371 extern void radeon_compute_pll(struct radeon_pll *pll,
373 uint32_t *dot_clock_p,
375 uint32_t *frac_fb_div_p,
377 uint32_t *post_div_p,
380 struct drm_encoder *radeon_encoder_legacy_lvds_add(struct drm_device *dev, int bios_index);
381 struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev, int bios_index, int with_tv);
382 struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv);
383 struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index);
384 struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index);
385 extern void atombios_external_tmds_setup(struct drm_encoder *encoder, int action);
386 extern int atombios_get_encoder_mode(struct drm_encoder *encoder);
387 extern void radeon_encoder_set_active_device(struct drm_encoder *encoder);
389 extern void radeon_crtc_load_lut(struct drm_crtc *crtc);
390 extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
391 struct drm_framebuffer *old_fb);
392 extern int atombios_crtc_mode_set(struct drm_crtc *crtc,
393 struct drm_display_mode *mode,
394 struct drm_display_mode *adjusted_mode,
396 struct drm_framebuffer *old_fb);
397 extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode);
399 extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
400 struct drm_framebuffer *old_fb);
401 extern void radeon_legacy_atom_set_surface(struct drm_crtc *crtc);
403 extern int radeon_crtc_cursor_set(struct drm_crtc *crtc,
404 struct drm_file *file_priv,
408 extern int radeon_crtc_cursor_move(struct drm_crtc *crtc,
411 extern bool radeon_atom_get_clock_info(struct drm_device *dev);
412 extern bool radeon_combios_get_clock_info(struct drm_device *dev);
413 extern struct radeon_encoder_atom_dig *
414 radeon_atombios_get_lvds_info(struct radeon_encoder *encoder);
415 extern bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder,
416 struct radeon_encoder_int_tmds *tmds);
417 extern bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder,
418 struct radeon_encoder_int_tmds *tmds);
419 extern bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder,
420 struct radeon_encoder_int_tmds *tmds);
421 extern bool radeon_legacy_get_ext_tmds_info_from_combios(struct radeon_encoder *encoder,
422 struct radeon_encoder_ext_tmds *tmds);
423 extern bool radeon_legacy_get_ext_tmds_info_from_table(struct radeon_encoder *encoder,
424 struct radeon_encoder_ext_tmds *tmds);
425 extern struct radeon_encoder_primary_dac *
426 radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder);
427 extern struct radeon_encoder_tv_dac *
428 radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder);
429 extern struct radeon_encoder_lvds *
430 radeon_combios_get_lvds_info(struct radeon_encoder *encoder);
431 extern void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder);
432 extern struct radeon_encoder_tv_dac *
433 radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder);
434 extern struct radeon_encoder_primary_dac *
435 radeon_combios_get_primary_dac_info(struct radeon_encoder *encoder);
436 extern bool radeon_combios_external_tmds_setup(struct drm_encoder *encoder);
437 extern void radeon_external_tmds_setup(struct drm_encoder *encoder);
438 extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock);
439 extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev);
440 extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock);
441 extern void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev);
442 extern void radeon_save_bios_scratch_regs(struct radeon_device *rdev);
443 extern void radeon_restore_bios_scratch_regs(struct radeon_device *rdev);
445 radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
447 radeon_atombios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
449 radeon_combios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
451 radeon_combios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
452 extern void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
453 u16 blue, int regno);
454 extern void radeon_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
455 u16 *blue, int regno);
456 struct drm_framebuffer *radeon_framebuffer_create(struct drm_device *dev,
457 struct drm_mode_fb_cmd *mode_cmd,
458 struct drm_gem_object *obj);
460 int radeonfb_probe(struct drm_device *dev);
462 int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb);
463 bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev);
464 bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev);
465 void radeon_atombios_init_crtc(struct drm_device *dev,
466 struct radeon_crtc *radeon_crtc);
467 void radeon_legacy_init_crtc(struct drm_device *dev,
468 struct radeon_crtc *radeon_crtc);
469 extern void radeon_i2c_do_lock(struct radeon_i2c_chan *i2c, int lock_state);
471 void radeon_get_clock_info(struct drm_device *dev);
473 extern bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev);
474 extern bool radeon_get_atom_connector_info_from_supported_devices_table(struct drm_device *dev);
476 void radeon_enc_destroy(struct drm_encoder *encoder);
477 void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj);
478 void radeon_combios_asic_init(struct drm_device *dev);
479 extern int radeon_static_clocks_init(struct drm_device *dev);
480 bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
481 struct drm_display_mode *mode,
482 struct drm_display_mode *adjusted_mode);
483 void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc);
486 void radeon_legacy_tv_adjust_crtc_reg(struct drm_encoder *encoder,
487 uint32_t *h_total_disp, uint32_t *h_sync_strt_wid,
488 uint32_t *v_total_disp, uint32_t *v_sync_strt_wid);
489 void radeon_legacy_tv_adjust_pll1(struct drm_encoder *encoder,
490 uint32_t *htotal_cntl, uint32_t *ppll_ref_div,
491 uint32_t *ppll_div_3, uint32_t *pixclks_cntl);
492 void radeon_legacy_tv_adjust_pll2(struct drm_encoder *encoder,
493 uint32_t *htotal2_cntl, uint32_t *p2pll_ref_div,
494 uint32_t *p2pll_div_0, uint32_t *pixclks_cntl);
495 void radeon_legacy_tv_mode_set(struct drm_encoder *encoder,
496 struct drm_display_mode *mode,
497 struct drm_display_mode *adjusted_mode);