2 * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
3 * VA Linux Systems Inc., Fremont, California.
4 * Copyright 2008 Red Hat Inc.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
25 * Kevin E. Martin, Rickard E. Faith, Alan Hourihane
27 * Kernel port Author: Dave Airlie
33 #include <drm/drm_crtc.h>
34 #include <drm/drm_edid.h>
35 #include <drm/drm_dp_helper.h>
36 #include <drm/drm_fixed.h>
37 #include <drm/drm_crtc_helper.h>
38 #include <linux/i2c.h>
39 #include <linux/i2c-algo-bit.h>
44 #define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base)
45 #define to_radeon_connector(x) container_of(x, struct radeon_connector, base)
46 #define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base)
47 #define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base)
49 enum radeon_rmx_type {
68 enum radeon_underscan_type {
81 RADEON_HPD_NONE = 0xff,
84 #define RADEON_MAX_I2C_BUS 16
86 /* radeon gpio-based i2c
87 * 1. "mask" reg and bits
88 * grabs the gpio pins for software use
93 * 3. "en" reg and bits
94 * sets the pin direction
100 struct radeon_i2c_bus_rec {
102 /* id used by atom */
104 /* id used by atom */
105 enum radeon_hpd_id hpd;
106 /* can be used with hw i2c engine */
108 /* uses multi-media i2c engine */
111 uint32_t mask_clk_reg;
112 uint32_t mask_data_reg;
116 uint32_t en_data_reg;
119 uint32_t mask_clk_mask;
120 uint32_t mask_data_mask;
122 uint32_t a_data_mask;
123 uint32_t en_clk_mask;
124 uint32_t en_data_mask;
126 uint32_t y_data_mask;
129 struct radeon_tmds_pll {
134 #define RADEON_MAX_BIOS_CONNECTOR 16
137 #define RADEON_PLL_USE_BIOS_DIVS (1 << 0)
138 #define RADEON_PLL_NO_ODD_POST_DIV (1 << 1)
139 #define RADEON_PLL_USE_REF_DIV (1 << 2)
140 #define RADEON_PLL_LEGACY (1 << 3)
141 #define RADEON_PLL_PREFER_LOW_REF_DIV (1 << 4)
142 #define RADEON_PLL_PREFER_HIGH_REF_DIV (1 << 5)
143 #define RADEON_PLL_PREFER_LOW_FB_DIV (1 << 6)
144 #define RADEON_PLL_PREFER_HIGH_FB_DIV (1 << 7)
145 #define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8)
146 #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9)
147 #define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10)
148 #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11)
149 #define RADEON_PLL_USE_POST_DIV (1 << 12)
150 #define RADEON_PLL_IS_LCD (1 << 13)
151 #define RADEON_PLL_PREFER_MINM_OVER_MAXP (1 << 14)
154 /* reference frequency */
155 uint32_t reference_freq;
158 uint32_t reference_div;
161 /* pll in/out limits */
164 uint32_t pll_out_min;
165 uint32_t pll_out_max;
166 uint32_t lcd_pll_out_min;
167 uint32_t lcd_pll_out_max;
171 uint32_t min_ref_div;
172 uint32_t max_ref_div;
173 uint32_t min_post_div;
174 uint32_t max_post_div;
175 uint32_t min_feedback_div;
176 uint32_t max_feedback_div;
177 uint32_t min_frac_feedback_div;
178 uint32_t max_frac_feedback_div;
180 /* flags for the current clock */
187 struct radeon_i2c_chan {
188 struct i2c_adapter adapter;
189 struct drm_device *dev;
191 struct i2c_algo_bit_data bit;
192 struct i2c_algo_dp_aux_data dp;
194 struct radeon_i2c_bus_rec rec;
197 /* mostly for macs, but really any system without connector tables */
198 enum radeon_connector_table {
202 CT_POWERBOOK_EXTERNAL,
203 CT_POWERBOOK_INTERNAL,
216 enum radeon_dvo_chip {
226 bool last_buffer_filled_status;
228 struct r600_audio_pin *pin;
231 struct radeon_mode_info {
232 struct atom_context *atom_context;
233 struct card_info *atom_card_info;
234 enum radeon_connector_table connector_table;
235 bool mode_config_initialized;
236 struct radeon_crtc *crtcs[6];
237 struct radeon_afmt *afmt[7];
238 /* DVI-I properties */
239 struct drm_property *coherent_mode_property;
240 /* DAC enable load detect */
241 struct drm_property *load_detect_property;
243 struct drm_property *tv_std_property;
244 /* legacy TMDS PLL detect */
245 struct drm_property *tmds_pll_property;
247 struct drm_property *underscan_property;
248 struct drm_property *underscan_hborder_property;
249 struct drm_property *underscan_vborder_property;
251 struct drm_property *audio_property;
252 /* hardcoded DFP edid from BIOS */
253 struct edid *bios_hardcoded_edid;
254 int bios_hardcoded_edid_size;
256 /* pointer to fbdev info structure */
257 struct radeon_fbdev *rfbdev;
260 /* pointer to backlight encoder */
261 struct radeon_encoder *bl_encoder;
264 #define RADEON_MAX_BL_LEVEL 0xFF
266 #if defined(CONFIG_BACKLIGHT_CLASS_DEVICE) || defined(CONFIG_BACKLIGHT_CLASS_DEVICE_MODULE)
268 struct radeon_backlight_privdata {
269 struct radeon_encoder *encoder;
275 #define MAX_H_CODE_TIMING_LEN 32
276 #define MAX_V_CODE_TIMING_LEN 32
278 /* need to store these as reading
279 back code tables is excessive */
280 struct radeon_tv_regs {
282 uint32_t timing_cntl;
286 uint16_t h_code_timing[MAX_H_CODE_TIMING_LEN];
287 uint16_t v_code_timing[MAX_V_CODE_TIMING_LEN];
290 struct radeon_atom_ss {
303 struct drm_crtc base;
305 u16 lut_r[256], lut_g[256], lut_b[256];
308 uint32_t crtc_offset;
309 struct drm_gem_object *cursor_bo;
310 uint64_t cursor_addr;
313 int max_cursor_width;
314 int max_cursor_height;
315 uint32_t legacy_display_base_addr;
316 uint32_t legacy_cursor_offset;
317 enum radeon_rmx_type rmx_type;
322 struct drm_display_mode native_mode;
325 struct radeon_unpin_work *unpin_work;
326 int deferred_flip_completion;
328 struct radeon_atom_ss ss;
332 u32 pll_reference_div;
335 struct drm_encoder *encoder;
336 struct drm_connector *connector;
341 struct drm_display_mode hw_mode;
344 struct radeon_encoder_primary_dac {
345 /* legacy primary dac */
346 uint32_t ps2_pdac_adj;
349 struct radeon_encoder_lvds {
351 uint16_t panel_vcc_delay;
352 uint8_t panel_pwr_delay;
353 uint8_t panel_digon_delay;
354 uint8_t panel_blon_delay;
355 uint16_t panel_ref_divider;
356 uint8_t panel_post_divider;
357 uint16_t panel_fb_divider;
358 bool use_bios_dividers;
359 uint32_t lvds_gen_cntl;
361 struct drm_display_mode native_mode;
362 struct backlight_device *bl_dev;
364 uint8_t backlight_level;
367 struct radeon_encoder_tv_dac {
369 uint32_t ps2_tvdac_adj;
370 uint32_t ntsc_tvdac_adj;
371 uint32_t pal_tvdac_adj;
376 int supported_tv_stds;
378 enum radeon_tv_std tv_std;
379 struct radeon_tv_regs tv;
382 struct radeon_encoder_int_tmds {
383 /* legacy int tmds */
384 struct radeon_tmds_pll tmds_pll[4];
387 struct radeon_encoder_ext_tmds {
389 struct radeon_i2c_chan *i2c_bus;
391 enum radeon_dvo_chip dvo_chip;
394 /* spread spectrum */
395 struct radeon_encoder_atom_dig {
399 int dig_encoder; /* -1 disabled, 0 DIGA, 1 DIGB, etc. */
402 uint16_t panel_pwr_delay;
405 struct drm_display_mode native_mode;
406 struct backlight_device *bl_dev;
408 uint8_t backlight_level;
410 struct radeon_afmt *afmt;
413 struct radeon_encoder_atom_dac {
414 enum radeon_tv_std tv_std;
417 struct radeon_encoder {
418 struct drm_encoder base;
419 uint32_t encoder_enum;
422 uint32_t active_device;
424 uint32_t pixel_clock;
425 enum radeon_rmx_type rmx_type;
426 enum radeon_underscan_type underscan_type;
427 uint32_t underscan_hborder;
428 uint32_t underscan_vborder;
429 struct drm_display_mode native_mode;
431 int audio_polling_active;
436 struct radeon_connector_atom_dig {
437 uint32_t igp_lane_info;
439 struct radeon_i2c_chan *dp_i2c_bus;
440 u8 dpcd[DP_RECEIVER_CAP_SIZE];
447 struct radeon_gpio_rec {
455 enum radeon_hpd_id hpd;
457 struct radeon_gpio_rec gpio;
460 struct radeon_router {
462 struct radeon_i2c_bus_rec i2c_info;
467 u8 ddc_mux_control_pin;
472 u8 cd_mux_control_pin;
476 enum radeon_connector_audio {
477 RADEON_AUDIO_DISABLE = 0,
478 RADEON_AUDIO_ENABLE = 1,
479 RADEON_AUDIO_AUTO = 2
482 struct radeon_connector {
483 struct drm_connector base;
484 uint32_t connector_id;
486 struct radeon_i2c_chan *ddc_bus;
487 /* some systems have an hdmi and vga port with a shared ddc line */
490 /* we need to mind the EDID between detect
491 and get modes due to analog/digital/tvencoder */
494 bool dac_load_detect;
495 bool detected_by_load; /* if the connection status was determined by load */
496 uint16_t connector_object_id;
497 struct radeon_hpd hpd;
498 struct radeon_router router;
499 struct radeon_i2c_chan *router_bus;
500 enum radeon_connector_audio audio;
503 struct radeon_framebuffer {
504 struct drm_framebuffer base;
505 struct drm_gem_object *obj;
508 #define ENCODER_MODE_IS_DP(em) (((em) == ATOM_ENCODER_MODE_DP) || \
509 ((em) == ATOM_ENCODER_MODE_DP_MST))
511 struct atom_clock_dividers {
517 u32 whole_fb_div : 12;
518 u32 frac_fb_div : 14;
520 u32 frac_fb_div : 14;
521 u32 whole_fb_div : 12;
528 bool enable_post_div;
537 struct atom_mpll_param {
561 #define MEM_TYPE_GDDR5 0x50
562 #define MEM_TYPE_GDDR4 0x40
563 #define MEM_TYPE_GDDR3 0x30
564 #define MEM_TYPE_DDR2 0x20
565 #define MEM_TYPE_GDDR1 0x10
566 #define MEM_TYPE_DDR3 0xb0
567 #define MEM_TYPE_MASK 0xf0
569 struct atom_memory_info {
574 #define MAX_AC_TIMING_ENTRIES 16
576 struct atom_memory_clock_range_table
580 u32 mclk[MAX_AC_TIMING_ENTRIES];
583 #define VBIOS_MC_REGISTER_ARRAY_SIZE 32
584 #define VBIOS_MAX_AC_TIMING_ENTRIES 20
586 struct atom_mc_reg_entry {
588 u32 mc_data[VBIOS_MC_REGISTER_ARRAY_SIZE];
591 struct atom_mc_register_address {
596 struct atom_mc_reg_table {
599 struct atom_mc_reg_entry mc_reg_table_entry[VBIOS_MAX_AC_TIMING_ENTRIES];
600 struct atom_mc_register_address mc_reg_address[VBIOS_MC_REGISTER_ARRAY_SIZE];
603 #define MAX_VOLTAGE_ENTRIES 32
605 struct atom_voltage_table_entry
611 struct atom_voltage_table
616 struct atom_voltage_table_entry entries[MAX_VOLTAGE_ENTRIES];
619 extern enum radeon_tv_std
620 radeon_combios_get_tv_info(struct radeon_device *rdev);
621 extern enum radeon_tv_std
622 radeon_atombios_get_tv_info(struct radeon_device *rdev);
623 extern void radeon_atombios_get_default_voltages(struct radeon_device *rdev,
624 u16 *vddc, u16 *vddci, u16 *mvdd);
626 extern struct drm_connector *
627 radeon_get_connector_for_encoder(struct drm_encoder *encoder);
628 extern struct drm_connector *
629 radeon_get_connector_for_encoder_init(struct drm_encoder *encoder);
630 extern bool radeon_dig_monitor_is_duallink(struct drm_encoder *encoder,
633 extern u16 radeon_encoder_get_dp_bridge_encoder_id(struct drm_encoder *encoder);
634 extern u16 radeon_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector);
635 extern bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector);
636 extern bool radeon_connector_is_dp12_capable(struct drm_connector *connector);
637 extern int radeon_get_monitor_bpc(struct drm_connector *connector);
639 extern void radeon_connector_hotplug(struct drm_connector *connector);
640 extern int radeon_dp_mode_valid_helper(struct drm_connector *connector,
641 struct drm_display_mode *mode);
642 extern void radeon_dp_set_link_config(struct drm_connector *connector,
643 const struct drm_display_mode *mode);
644 extern void radeon_dp_link_train(struct drm_encoder *encoder,
645 struct drm_connector *connector);
646 extern bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector);
647 extern u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector);
648 extern bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector);
649 extern int radeon_dp_get_panel_mode(struct drm_encoder *encoder,
650 struct drm_connector *connector);
651 extern void atombios_dig_encoder_setup(struct drm_encoder *encoder, int action, int panel_mode);
652 extern void radeon_atom_encoder_init(struct radeon_device *rdev);
653 extern void radeon_atom_disp_eng_pll_init(struct radeon_device *rdev);
654 extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder,
655 int action, uint8_t lane_num,
657 extern void radeon_atom_ext_encoder_setup_ddc(struct drm_encoder *encoder);
658 extern struct drm_encoder *radeon_get_external_encoder(struct drm_encoder *encoder);
659 extern int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
660 u8 write_byte, u8 *read_byte);
662 extern void radeon_i2c_init(struct radeon_device *rdev);
663 extern void radeon_i2c_fini(struct radeon_device *rdev);
664 extern void radeon_combios_i2c_init(struct radeon_device *rdev);
665 extern void radeon_atombios_i2c_init(struct radeon_device *rdev);
666 extern void radeon_i2c_add(struct radeon_device *rdev,
667 struct radeon_i2c_bus_rec *rec,
669 extern struct radeon_i2c_chan *radeon_i2c_lookup(struct radeon_device *rdev,
670 struct radeon_i2c_bus_rec *i2c_bus);
671 extern struct radeon_i2c_chan *radeon_i2c_create_dp(struct drm_device *dev,
672 struct radeon_i2c_bus_rec *rec,
674 extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev,
675 struct radeon_i2c_bus_rec *rec,
677 extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c);
678 extern void radeon_i2c_get_byte(struct radeon_i2c_chan *i2c_bus,
682 extern void radeon_i2c_put_byte(struct radeon_i2c_chan *i2c,
686 extern void radeon_router_select_ddc_port(struct radeon_connector *radeon_connector);
687 extern void radeon_router_select_cd_port(struct radeon_connector *radeon_connector);
688 extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector, bool use_aux);
689 extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector);
691 extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector);
693 extern bool radeon_atombios_get_ppll_ss_info(struct radeon_device *rdev,
694 struct radeon_atom_ss *ss,
696 extern bool radeon_atombios_get_asic_ss_info(struct radeon_device *rdev,
697 struct radeon_atom_ss *ss,
700 extern void radeon_compute_pll_legacy(struct radeon_pll *pll,
702 uint32_t *dot_clock_p,
704 uint32_t *frac_fb_div_p,
706 uint32_t *post_div_p);
708 extern void radeon_compute_pll_avivo(struct radeon_pll *pll,
716 extern void radeon_setup_encoder_clones(struct drm_device *dev);
718 struct drm_encoder *radeon_encoder_legacy_lvds_add(struct drm_device *dev, int bios_index);
719 struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev, int bios_index, int with_tv);
720 struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv);
721 struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index);
722 struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index);
723 extern void atombios_dvo_setup(struct drm_encoder *encoder, int action);
724 extern void atombios_digital_setup(struct drm_encoder *encoder, int action);
725 extern int atombios_get_encoder_mode(struct drm_encoder *encoder);
726 extern bool atombios_set_edp_panel_power(struct drm_connector *connector, int action);
727 extern void radeon_encoder_set_active_device(struct drm_encoder *encoder);
729 extern void radeon_crtc_load_lut(struct drm_crtc *crtc);
730 extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
731 struct drm_framebuffer *old_fb);
732 extern int atombios_crtc_set_base_atomic(struct drm_crtc *crtc,
733 struct drm_framebuffer *fb,
735 enum mode_set_atomic state);
736 extern int atombios_crtc_mode_set(struct drm_crtc *crtc,
737 struct drm_display_mode *mode,
738 struct drm_display_mode *adjusted_mode,
740 struct drm_framebuffer *old_fb);
741 extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode);
743 extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
744 struct drm_framebuffer *old_fb);
745 extern int radeon_crtc_set_base_atomic(struct drm_crtc *crtc,
746 struct drm_framebuffer *fb,
748 enum mode_set_atomic state);
749 extern int radeon_crtc_do_set_base(struct drm_crtc *crtc,
750 struct drm_framebuffer *fb,
751 int x, int y, int atomic);
752 extern int radeon_crtc_cursor_set(struct drm_crtc *crtc,
753 struct drm_file *file_priv,
757 extern int radeon_crtc_cursor_move(struct drm_crtc *crtc,
760 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
761 int *vpos, int *hpos);
763 extern bool radeon_combios_check_hardcoded_edid(struct radeon_device *rdev);
765 radeon_bios_get_hardcoded_edid(struct radeon_device *rdev);
766 extern bool radeon_atom_get_clock_info(struct drm_device *dev);
767 extern bool radeon_combios_get_clock_info(struct drm_device *dev);
768 extern struct radeon_encoder_atom_dig *
769 radeon_atombios_get_lvds_info(struct radeon_encoder *encoder);
770 extern bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder,
771 struct radeon_encoder_int_tmds *tmds);
772 extern bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder,
773 struct radeon_encoder_int_tmds *tmds);
774 extern bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder,
775 struct radeon_encoder_int_tmds *tmds);
776 extern bool radeon_legacy_get_ext_tmds_info_from_combios(struct radeon_encoder *encoder,
777 struct radeon_encoder_ext_tmds *tmds);
778 extern bool radeon_legacy_get_ext_tmds_info_from_table(struct radeon_encoder *encoder,
779 struct radeon_encoder_ext_tmds *tmds);
780 extern struct radeon_encoder_primary_dac *
781 radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder);
782 extern struct radeon_encoder_tv_dac *
783 radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder);
784 extern struct radeon_encoder_lvds *
785 radeon_combios_get_lvds_info(struct radeon_encoder *encoder);
786 extern void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder);
787 extern struct radeon_encoder_tv_dac *
788 radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder);
789 extern struct radeon_encoder_primary_dac *
790 radeon_combios_get_primary_dac_info(struct radeon_encoder *encoder);
791 extern bool radeon_combios_external_tmds_setup(struct drm_encoder *encoder);
792 extern void radeon_external_tmds_setup(struct drm_encoder *encoder);
793 extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock);
794 extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev);
795 extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock);
796 extern void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev);
797 extern void radeon_save_bios_scratch_regs(struct radeon_device *rdev);
798 extern void radeon_restore_bios_scratch_regs(struct radeon_device *rdev);
800 radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
802 radeon_atombios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
804 radeon_combios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
806 radeon_combios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
807 extern void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
808 u16 blue, int regno);
809 extern void radeon_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
810 u16 *blue, int regno);
811 int radeon_framebuffer_init(struct drm_device *dev,
812 struct radeon_framebuffer *rfb,
813 struct drm_mode_fb_cmd2 *mode_cmd,
814 struct drm_gem_object *obj);
816 int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb);
817 bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev);
818 bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev);
819 void radeon_atombios_init_crtc(struct drm_device *dev,
820 struct radeon_crtc *radeon_crtc);
821 void radeon_legacy_init_crtc(struct drm_device *dev,
822 struct radeon_crtc *radeon_crtc);
824 void radeon_get_clock_info(struct drm_device *dev);
826 extern bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev);
827 extern bool radeon_get_atom_connector_info_from_supported_devices_table(struct drm_device *dev);
829 void radeon_enc_destroy(struct drm_encoder *encoder);
830 void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj);
831 void radeon_combios_asic_init(struct drm_device *dev);
832 bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
833 const struct drm_display_mode *mode,
834 struct drm_display_mode *adjusted_mode);
835 void radeon_panel_mode_fixup(struct drm_encoder *encoder,
836 struct drm_display_mode *adjusted_mode);
837 void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc);
840 void radeon_legacy_tv_adjust_crtc_reg(struct drm_encoder *encoder,
841 uint32_t *h_total_disp, uint32_t *h_sync_strt_wid,
842 uint32_t *v_total_disp, uint32_t *v_sync_strt_wid);
843 void radeon_legacy_tv_adjust_pll1(struct drm_encoder *encoder,
844 uint32_t *htotal_cntl, uint32_t *ppll_ref_div,
845 uint32_t *ppll_div_3, uint32_t *pixclks_cntl);
846 void radeon_legacy_tv_adjust_pll2(struct drm_encoder *encoder,
847 uint32_t *htotal2_cntl, uint32_t *p2pll_ref_div,
848 uint32_t *p2pll_div_0, uint32_t *pixclks_cntl);
849 void radeon_legacy_tv_mode_set(struct drm_encoder *encoder,
850 struct drm_display_mode *mode,
851 struct drm_display_mode *adjusted_mode);
854 int radeon_fbdev_init(struct radeon_device *rdev);
855 void radeon_fbdev_fini(struct radeon_device *rdev);
856 void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state);
857 int radeon_fbdev_total_size(struct radeon_device *rdev);
858 bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj);
860 void radeon_fb_output_poll_changed(struct radeon_device *rdev);
862 void radeon_crtc_handle_flip(struct radeon_device *rdev, int crtc_id);
864 int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled);